Named Electrical Device Patents (Class 430/319)
  • Publication number: 20110229805
    Abstract: A photomask for exposure of a semiconductor wafer using dipole illumination and method of manufacturing the same is disclosed. A method of forming a pattern on a semiconductor using the photomask is also disclosed. The photomask may have an array of islands that are used for printing lines using dipole illumination. The photomask may have sub-resolution assist features (SRAF) to assist in printing the lines. The SRAF may include an array of holes.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 22, 2011
    Inventors: Chun-Ming Wang, Chen-Che Huang, Masaaki Higashitani
  • Publication number: 20110229826
    Abstract: This invention discloses a method to form a resist pattern on a to-be-processed substrate by immersion exposure. A resist film is formed on the central portion of the upper surface of the to-be-processed substrate, on a bevel portion of the upper surface, which is obtained by chamfering the peripheral portion of the to-be-processed substrate, and on the end portion of the to-be-processed substrate. Pattern exposure for forming the latent image of a desired pattern on the resist film is executed while a liquid whose refractive index is higher than that of air exists between the resist film and a constituent element of a projection optical system of an exposure apparatus, which is nearest to the to-be-processed substrate. The resist film formed on the end portion of the to-be-processed substrate is removed by supplying a rinse solution to the end portion of the to-be-processed substrate after executing pattern exposure.
    Type: Application
    Filed: May 31, 2011
    Publication date: September 22, 2011
    Inventors: Daisuke KAWAMURA, Eishi Shiobara, Tomoyuki Takeishi, Kei Hayasaki, Yasunobu Onishi, Shinichi Ito, Tatsuhiko Higashiki
  • Publication number: 20110229807
    Abstract: [Object] A photomask blank for use in producing a photomask for exposure with an ArF excimer laser. The photomask blank is intended to be applied to the 32-nm DRAM half-pitch (hp) and succeeding generations in the semiconductor design rule. [Solution] The photomask blank is for use in producing a photomask to which an exposure light having a wavelength not longer than 200 nm is applied. The photomask blank is characterized by comprising a transparent substrate, a light-shielding film formed on the transparent substrate and containing molybdenum and silicon, and an etching mask film formed directly on the light-shielding film and containing chromium. The photomask blank is further characterized in that the light-shielding film comprises a light-shielding layer and an antireflection layer which have been disposed in this order from the transparent substrate side, the light-shielding layer having a molybdenum content of 9-40 at %, and that the etching mask film has a chromium content of 45 at % or lower.
    Type: Application
    Filed: September 30, 2009
    Publication date: September 22, 2011
    Applicant: HOYA CORPORATION
    Inventors: Masahiro Hashimoto, Atsushi Kominato
  • Publication number: 20110230058
    Abstract: There is provided underlayer films of high-energy radiation resists that are applied onto semiconductor substrates in a lithography process for producing semiconductor devices and that are used to prevent reflection, static electrification, and development defects and to suppress outgassing during the exposure of resist layers with high-energy radiation. A composition for forming an underlayer film of a high-energy radiation resist, the composition comprising a film component having an aromatic ring structure or a hetero ring structure. The film component having an aromatic ring structure or a hetero ring structure is contained preferably in a film at a proportion of 5 to 85% by mass. The film component may be a compound having an aromatic ring structure or a hetero ring structure, and the compound may be a polymer or a polymer precursor including a specific repeating unit. The aromatic ring may be a benzene ring or fused benzene ring, and the hetero ring structure may be triazinetrione ring.
    Type: Application
    Filed: November 19, 2009
    Publication date: September 22, 2011
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Rikimaru Sakamoto, Bangching Ho, Takafumi Endo
  • Publication number: 20110229825
    Abstract: To provide a production method of a liquid crystal display device and a liquid crystal display device, in which generation of a joint line on a display screen is suppressed and yield can be improved even if a substrate is subjected to an alignment treatment by completing exposure for the substrate through several exposures in a liquid crystal display device including pixels each having two or more domains.
    Type: Application
    Filed: December 3, 2010
    Publication date: September 22, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Iichiro INOUE, Hiroyuki Hakoi, Shinichi Terashita, Koichi Miyachi
  • Patent number: 8021826
    Abstract: The present invention provides an organic anti-reflection coating composition comprising a copolymer represented by the following Formula 1, a light absorbent, a thermal acid generating agent, and a curing agent: wherein R1, R2 and R3 are each independent to each; R1 represents hydrogen or an alkyl group having 1 to 10 carbon atoms; R2 represents hydrogen, an alkyl group having 1 to 10 carbon atoms or an arylalkyl group having 1 to 20 carbon atoms; R3 is hydrogen or a methyl group; m and n are repeating units in the main chain, while m+n=1, and they have values of 0.05<m/(m+n)<0.95 and 0.05<n/(m+n)<0.95. The anti-reflection coating using the polymer of the invention has excellent adhesiveness and storage stability, and a very high dry etching rate, and exhibits excellent resolution in both C/H patterns and L/S patterns.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: September 20, 2011
    Assignee: Korea Kumho Petrochemicals Co., Ltd.
    Inventors: Myung-Woong Kim, Joo-Hyeon Park, Young-Taek Lim, Hyung-Gi Kim, Jun-Ho Lee, Jong-Don Lee, Seung-Duk Cho
  • Publication number: 20110217660
    Abstract: System and method of selective optical pattern enhancement for semiconductor manufacturing. A method for performing a photolithography process includes providing a reticle pattern for a photomask, the reticle pattern including one or more active areas, the photomask including at least a first active area and a first insulation area. The method also includes identifying a first structure pattern defined by the reticle pattern. Additionally, the method includes defining a block area covering the first structure, the block area being positioned within the active area. The method further includes applying at least a first optical proximity correction to the reticle pattern to form a corrected pattern, the first optical proximity correction being restricted to the block area. Also, the method includes transferring the corrected pattern to a wafer.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: CHI YUAN HUNG
  • Publication number: 20110217659
    Abstract: In a method for producing a proton-conductive, structured electrolyte membrane, particularly for a fuel cell, a coating, which comprises at least one ion-conductive cross-linking component having at least one acid group and at least one photoactive substances interacting therewith, is applied onto a solid body surface. The coating is optically masked in that at least one region of the coating, in which the electrolyte membrane is supposed to be, is exposed such that the cross-linking component cross-links with the photoactive substances to form a polymer and/or copolymer network adhering to the solid body surface. At least one unexposed region of the coating is removed in order to structure the electrolyte membrane.
    Type: Application
    Filed: January 10, 2011
    Publication date: September 8, 2011
    Inventors: Gilbert ERDLER, Holger Reinecke, Mirko Frank, Claas Mueller, Jochen Kerres
  • Patent number: 8012670
    Abstract: New photoresist systems are provided that comprise an underlying processing (or barrier) layer composition and an overcoated photoresist layer. Systems of the invention can exhibit significant adhesion to SiON and other inorganic surface layers.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: September 6, 2011
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Gary N. Taylor, Cheng-Bai Xu
  • Publication number: 20110212402
    Abstract: A photosensitive resin composition comprising: a photosensitive polyimide of formula (I); an acrylate monomer; and a photoinitiator, wherein A, B, D, J, m, and n are as defined in the specification.
    Type: Application
    Filed: July 15, 2010
    Publication date: September 1, 2011
    Inventors: Meng-Yen Chou, Chuan-Zong Lee, Pi-Jen Cheng, Jui-Kai Hu
  • Publication number: 20110212392
    Abstract: A photomask blank is for use in manufacturing a photomask to be applied with exposure light having a wavelength of 200 nm or less. The photomask blank has a light-transmitting substrate and a light-shielding film formed thereon. The light-shielding film has a light-shielding layer containing a transition metal and silicon and a front-surface antireflection layer formed contiguously on the light-shielding layer and made of a material containing at least one of oxygen and nitrogen. The light-shielding film has a front-surface reflectance of a predetermined value or less for the exposure light and has a property capable of controlling the change width of the front-surface reflectance at the exposure wavelength to be within 2% when the thickness of the front-surface antireflection layer changes in the range of 2 nm. The material of the front-surface antireflection layer having a refractive index n and an extinction coefficient k capable of achieving such property is selected.
    Type: Application
    Filed: October 27, 2009
    Publication date: September 1, 2011
    Applicant: HOYA CORPORATION
    Inventors: Hiroyuki Iwashita, Atsushi Kominato, Masahiro Hashimoto, Hiroaki Shishido
  • Patent number: 8007987
    Abstract: A manufacturing method of asymmetric bumps is provided. First, a substrate is provided. A film layer is then formed on the substrate. Next, a complex photomask including at least one transparent region, a number of opaque regions, and a number of semi-transparent regions is provided. Each of the semi-transparent regions is disposed between two adjacent opaque regions, and at least one light-shielding pattern is randomly disposed in each of the semi-transparent regions. The film layer is then patterned with use of the complex photomask, and multiple asymmetric bumps are formed on the substrate. By using the complex photomask, manufacturing steps of the asymmetric bumps can be reduced. Besides, a manufacturing method of a pixel structure having the above-mentioned asymmetric bumps is also provided.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: August 30, 2011
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Te-Yu Chen, Chin-Lung Yeh, Yu-Fang Wang
  • Publication number: 20110207055
    Abstract: In a fabricating method of a touch screen panel, a conductive layer and an insulating layer are sequentially formed on a same surface of a transparent substrate. The conductive layer and the insulating layer are co-patterned using a halftone mask to form first connection patterns having separated patterns and the insulating layer being patterned on the first connection patterns to expose regions of the first connection patterns. A transparent electrode layer is formed on the transparent substrate having the first connection patterns and the insulating layer. The transparent electrode layer is patterned to form first sensing patterns connected to the first connection patterns through the exposed regions of the first connection patterns and connected along a first direction, and to form second sensing patterns disposed between the first sensing patterns, wherein the second sensing patterns are insulated from the first sensing patterns and connected along a second direction.
    Type: Application
    Filed: December 1, 2010
    Publication date: August 25, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Woo-Sik JUN, Do-Youb Kim, Ung-Soo Lee
  • Publication number: 20110207056
    Abstract: Improvements in the fabrication of integrated circuits are driven by the decrease of the size of the features printed on the wafers. Current lithography techniques limits have been extended through the use of phase-shifting masks, off-axis illumination, and proximity effect correction. More recently, liquid immersion lithography has been proposed as a way to extend even further the limits of optical lithography. This invention described a methodology based on contact or proximity printing using a projection lens to define the image of the mask onto the wafer. As the imaging is performed in a solid material, larger refractive indices can be obtained and the resolution of the imaging system can be increased.
    Type: Application
    Filed: April 25, 2011
    Publication date: August 25, 2011
    Inventors: Christophe Pierrat, Alfred Kwok-Kit Wong
  • Publication number: 20110207054
    Abstract: Embodiments of the invention provide a method and an apparatus for performing self-aligned, sub-wavelength optical lithography. One embodiment provides a region of photoresist above a conductive surface having a plurality of periodically arrayed openings extending therethrough. At least a portion of the region of photoresist is then exposed to a light, wherein the intensity of the light is less than the intensity required to cure the photoresist. In so doing, at least one self-aligned, sub-wavelength location in at least one location of the region of photoresist is cured.
    Type: Application
    Filed: May 4, 2011
    Publication date: August 25, 2011
    Inventors: David Fattal, Jason Blackstock
  • Patent number: 8003307
    Abstract: A method for fabricating an image sensor includes forming an insulation layer over a substrate in a logic circuit region and a pixel region, forming a photoresist over the insulation layer, patterning the photoresist to form a photoresist pattern where the insulation layer in the pixel region is exposed and the insulation layer in the logic circuit region is not exposed, wherein a thickness of the photoresist pattern is gradually decreased in an interfacial region between the pixel region and the logic circuit region in a direction of the logic circuit region to the pixel region, and performing an etch back process over the insulation layer and the photoresist pattern in conditions that an etch rate of the photoresist pattern are substantially the same as that of the insulation layer.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: August 23, 2011
    Assignee: Crosstek Capital, LLC
    Inventors: Hyun-Hee Nam, Jeong-Lyeol Park
  • Patent number: 8003304
    Abstract: A method for manufacturing a magnetic write head for perpendicular magnetic recording. The method provides for accurate definition of a device feature such as a write pole flare point. A functional lapping guide is formed to determine when a lapping operation should be terminated to define an air bearing surface of a slider. In order to provide accurate compensation for manufacturing variations in the functional lapping guide, a dummy lapping guide is provided. An amount of variation of a front edge of the dummy lapping guide, which is defined by the same process step as a writer pole flare point, can be calculated by measuring the width (stripe height) of the dummy lapping guide based on its electrical resistance.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: August 23, 2011
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Vladimir Nikitin, Yi Zheng
  • Publication number: 20110200920
    Abstract: A reflective mask blank for EUV lithography having a low-reflective layer which has a low reflectivity with respect to wavelengths of EUV light and a mask pattern inspection light and which satisfies a predetermined reflectivity (405 nm: <40%, 600 to 650 nm: 30 to 50%, 800 to 900 nm: >50%, 1,000 to 1,200 nm: <90%) in a wavelength region (400 to 1,200 nm) required for the mask production process and the pattern transcription process. A reflective mask blank for EUV lithography having a reflective layer for reflecting EUV light, an absorbing layer for absorbing EUV light and a low-reflective layer with respect to a mask pattern inspection light (wavelength: 190 to 260 nm), which are formed in this order on a substrate, wherein the low-reflective layer contains at least tantalum (Ta), oxygen (O) and hydrogen (H), and the low-reflective layer has a Ta+O total content that is between 85 and 99.9 at % and an H content that is between 0.1 and 15 at %.
    Type: Application
    Filed: April 26, 2011
    Publication date: August 18, 2011
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventor: Kazuyuki Hayashi
  • Publication number: 20110200937
    Abstract: The present invention provides a positive photosensitive resin composition for spray coating, which comprises an alkali-soluble resin, a compound which generates an acid when exposed to light and a solvent, and which has a viscosity of 0.5 to 200 cP. By using the positive photosensitive resin composition, it is possible to form a coating film having a uniform thickness on the inner surface of a hole having a high aspect ratio. By using a coating film pattern, which is obtained by exposing and developing a predetermined region of the obtained coating film, as an insulating film or mask for forming an insulating film pattern, it is possible to suppress generation of leakage current in a hole and to form a through electrode with a high yield.
    Type: Application
    Filed: October 15, 2009
    Publication date: August 18, 2011
    Applicant: SUMITOMO BAKELITE CO., LTD.
    Inventors: Hideki Orihara, Toshio Banba
  • Publication number: 20110200945
    Abstract: An alignment mark having high precision and good visibility is formed in a simple manner without modification of a manufacturing line or a significant increase of man hours and a flat panel display is manufactured at low cost and with good productivity. To achieve this, the method includes a step of forming a photosensitive film on a substrate, a step of forming an alignment mark by exposing the photosensitive film by using an exposing mask, and a step of performing position alignment by recognizing the alignment mark in an undeveloped state of the photosensitive film.
    Type: Application
    Filed: November 12, 2009
    Publication date: August 18, 2011
    Inventors: Eiichi Uriu, Motohiro Taniguchi, Tomohiro Murakoso, Toshiya Otani, Souji Yamamoto, Toshiaki Fujiwara, Takashi Sesei, Noriyuki Matsubara
  • Publication number: 20110193202
    Abstract: Apparatus and methods are disclosed herein for fabricating semiconductor device features with a half-pitch node of 22 nm and beyond using single exposure and single etch (1P1E) photolithography techniques. The method includes exposing in a single exposure a photoresist layer to the exposure source through a photolithography mask where the photolithography mask has on it an island pattern of a material having high percentage transmission. The photoresist layer is developed using a negative tone developer to form a hole pattern in the photoresist layer. The 1P1E does not require the second photo exposure of the double patterning method. Furthermore, the method circumvents the island pattern collapsing issues and the need for strong illumination associated with exiting single 1P1E processes.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Vincent Yu, Shih-Che Wang, Chun-Kuang Chen
  • Publication number: 20110195352
    Abstract: A mask for laser induced thermal imaging and a method of fabricating an organic electro-luminescence display device using the mask. A mask includes a transparent substrate including a transmitting region; a reflective layer pattern on a first surface of the transparent substrate other than the transmitting region; and a scattering unit on at least one of the first surface or a second surface opposite the first surface of the transparent substrate, and the scattering unit is at a position corresponding to the reflective layer pattern. The mask can accurately irradiate a laser to a donor substrate and prevent or reduce damage of the laser generator due to the laser beam being reflected by the mask.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 11, 2011
    Inventors: Do-Young KIM, Young-Gil Kwon, Seung-Mook Lee, Dae-Hoon Kim, Sun-Hoe Kim, Min-Chul Suh
  • Patent number: 7994592
    Abstract: MEMs devices are integrally fabricated with included micro or nanoparticles by providing a mixture of a sacrificial material and a multiplicity of particles, disposing the mixture onto a substrate, fabricating a MEMs structure on the substrate including at least part of the mixture, so that at least some of the mixture is enclosed in the MEMs structure, removing the sacrificial material, and leaving at least some of the multiplicity of particles substantially free and enclosed in the MEMs structure. The step of fabricating a MEMs structure is quite general and is contemplated as including one or a multiplicity of additional steps for creating some type of structure in which the particles, which may be microbeads or nanobeads, are included. A wide variety of useful applications for MEMs integrated with micro or nanoparticles are available.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: August 9, 2011
    Assignee: California Institute of Technology
    Inventors: Yu-Chong Tai, Qing He
  • Publication number: 20110189595
    Abstract: In a simulation step, based on information of a main surface shape of a transparent substrate and shape information of a mask stage of an exposure apparatus and using a deflection differential equation taking into account a twist deformation, height information at a plurality of measurement points is obtained by simulating a state where the transparent substrate is set in the exposure apparatus. Based on the height information obtained through the simulation, a flatness of the transparent substrate when it is set in the exposure apparatus is calculated in a flatness calculation step. Then, by judging in a selection step whether or not the calculated flatness satisfies a specification, the transparent substrate whose flatness satisfies the specification is used as a substrate for a mask blank.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 4, 2011
    Applicant: HOYA CORPORATION
    Inventor: Masaru TANABE
  • Publication number: 20110189615
    Abstract: A method of manufacturing MOS transistor includes providing a substrate having a gate formed thereon; forming a hard mask layer on the substrate, performing an acid treatment to a surface of the hard mask layer, forming a photoresist layer on the hard mask layer after performing the acid treatment, performing a photolithography process to pattern the photoresist layer and the hard mask layer, performing an etching process to form recesses in the substrate, and performing a SEG method to form epitaxial layers respectively in the recesses.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 4, 2011
    Inventors: Tsung-Yu Hou, Tai-Heng Yu, Chien-Wei Su, Wen-Yi Teng
  • Patent number: 7989147
    Abstract: Disclosed is a method for fabricating a liquid crystal display device comprising: providing a first substrate having a pixel portion and a pad portion; sequentially laminating a gate insulating layer, a semiconductor layer and a first conductive layer on the first substrate where a gate electrode is formed; forming a first PR pattern, which is patterned relatively thin on a channel region of a transistor to be formed, on the first conductive layer with a half-tone mask; patterning the first conductive layer with the first PR pattern; forming a second PR pattern which is aligned with an outer periphery of the first conductive layer by performing a first ashing process on the first PR pattern; patterning the semiconductor layer using the second PR pattern; forming source/drain electrodes using the second PR pattern; forming a passivation layer and a pixel electrode on the first substrate; attaching a second substrate to the first substrate; and forming a liquid crystal layer between the first substrate and the
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: August 2, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Woong Sik Kim, Wang-Sun Lee
  • Patent number: 7989148
    Abstract: In a method for forming a photoelectric composite board (10) on which a photoelectric transducer (5) is mounted, photo-masks (111, 112, 113) which are used in processes to form the photoelectric composite board (10) are respectively disposed on the basis of a reference mark (33) previously formed on a metal thin film (101). In addition, openings (22) are formed on solder resist layers (8) by irradiating laser beams at positions defined on the basis of a reference point (4a) defined above a light deflector (4) formed on an end of a light guide (3).
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Tooru Nakashiba, Hiroyuki Yagyu, Shinji Hashimoto, Yuuki Kasai
  • Publication number: 20110183269
    Abstract: Some embodiments include methods of forming patterns. Photoresist features may be formed over a base, with the individual photoresist features having heights and widths. The photoresist features may be exposed to a combination of chloroform, oxidant and additional carbon-containing material besides chloroform to reduce the widths of the photoresist features while substantially maintaining the heights of the photoresist features. The photoresist features may then be used as a mask to pattern the underlying base, and/or spacers may be formed to be aligned to sidewalls of the photoresist features, and the spacers may be used as the mask to pattern the underlying base.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Inventor: Hongbin Zhu
  • Publication number: 20110177458
    Abstract: According to one embodiment, a deviation amount distribution of a two-dimensional shape parameter between a mask pattern formed on a mask and a desired mask pattern is acquired as a mask pattern map. Such that a deviation amount of the two-dimensional shape parameter between a pattern on substrate formed when the mask is subjected to exposure shot to form a pattern on a substrate and a desired pattern on substrate fits within a predetermined range, an exposure is determined for each position in the exposure shot in forming the pattern on substrate based on the mask pattern map.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 21, 2011
    Inventors: Toshiya KOTANI, Kazuya Fukuhara, Michiya Takimoto, Hidefumi Mukai, Soichi Inoue
  • Publication number: 20110177457
    Abstract: According to the embodiment, a pattern after lithography is derived by using a mask pattern. The mask pattern is corrected by moving a first moving target pattern so that a first evaluation value calculated with respect to this pattern after lithography satisfies a first condition. Next, a pattern after lithography is derived by using the mask pattern after correction. The mask pattern after correction is further corrected by moving a second moving target pattern so that a second evaluation value calculated with respect to this pattern after lithography satisfies a second condition.
    Type: Application
    Filed: January 4, 2011
    Publication date: July 21, 2011
    Inventors: Shimon MAEDA, Norikazu Ooishi, Sachiko Kobayashi
  • Publication number: 20110171584
    Abstract: A method of forming a high resolution organic thin film pattern, the method including forming a first organic layer on a substrate; selectively removing the first organic layer by selectively irradiating light energy onto the first organic layer, and forming a remaining part of the first organic layer as a sacrifice layer; forming a second organic layer on the substrate and the entire surface of the sacrifice layer; and lifting off the second organic layer formed on the sacrifice layer by removing the sacrifice layer using a solvent, and forming the remaining second organic layer as a second organic layer pattern.
    Type: Application
    Filed: December 27, 2010
    Publication date: July 14, 2011
    Applicants: Samsung Mobile Display Co., Ltd., SNU R&DB FOUNDATION
    Inventors: Min-Chul SUH, Sin-Doo Lee, Woo-Suk Choi, Min-Hoi Kim
  • Publication number: 20110171566
    Abstract: A reflective mask blank for EUV lithography having an absorbing layer which has a low reflectivity with respect to wavelength regions of EUV light and pattern inspection light, and which is easily controllable to obtain desired film composition and film thickness. The reflective mask blank for EUV lithography having a reflective layer for reflecting EUV light and an absorbing layer for absorbing EUV light which are formed in this order on a substrate, wherein the absorbing layer contains at least tantalum (Ta), boron (B), nitrogen (N) and hydrogen (H), and the absorbing layer has a B content that is 1 at % or greater but less than 5 at %, an H content that is between 0.1 and 5 at %, a Ta+N total content that is between 90 and 98.9%, and a Ta:N composition ratio (Ta:N) that is between 8:1 and 1:1.
    Type: Application
    Filed: March 24, 2011
    Publication date: July 14, 2011
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventor: Kazuyuki HAYASHI
  • Publication number: 20110171568
    Abstract: Provided is a mask blank substrate that can reduce the change in flatness of a main surface thereof before and after chucking to make very small the position offset caused by a photomask and that can significantly reduce the difference in tendency of substrate deformation before and after chucking between photomasks.
    Type: Application
    Filed: October 25, 2009
    Publication date: July 14, 2011
    Applicant: HOYA CORPORATION
    Inventors: Tatsuya Sasaki, Takahiro Miyazaki
  • Publication number: 20110171583
    Abstract: Process solutions comprising one or more surfactants are used to reduce the number of defects in the manufacture of semiconductor devices. In certain embodiments, the process solution may reduce post-development defects such as pattern collapse or line width roughness when employed as a rinse solution either during or after the development of the patterned photoresist layer. Also disclosed is a method for reducing the number of defects such as pattern collapse and/or line width roughness on a plurality of photoresist coated substrates employing the process solution of the present invention.
    Type: Application
    Filed: December 2, 2010
    Publication date: July 14, 2011
    Applicant: Air Products and Chemicals, Inc.
    Inventors: Peng Zhang, Danielle Megan King Curzi, Eugene Joseph Karwacki, JR., Leslie Cox Barber
  • Patent number: 7975364
    Abstract: A method for producing a tuning-fork type crystal vibrating piece relates to a crystal tuning fork comprising a basal portion, a first vibrating arm, and a second vibrating arm, wherein both arms extend from the basal portion. The method for producing a crystal tuning fork comprises a step of forming a first metallic film into a shape including the contours of the basal portion, the first vibrating arm and second vibrating arm on a first surface of a quartz wafer; a step of forming a second metallic film on the second surface opposite to the first surface of the quartz wafer into a shape covering at least a root area near the basal portion between the first vibrating arm and the second vibrating arm, and a step of wet-etching the quartz substrate in etching solution after forming the first and second metallic films.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: July 12, 2011
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Takehiro Takahashi
  • Publication number: 20110165504
    Abstract: Provision of an EUV mask whereby influence of EUV reflected light from an absorber film surface in the peripheral portion of a mask pattern region is suppressed at a time of carrying out EUV lithography; an EUV mask blank to be employed for producing the above EUV mask; and a process for producing the EUV mask blank.
    Type: Application
    Filed: March 2, 2011
    Publication date: July 7, 2011
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventor: Yoshiaki IKUTA
  • Publication number: 20110159442
    Abstract: A semiconductor device is manufactured by a method including processes of trimming and molding resist patterns. A resist layer formed on a substrate is exposed and developed to form the resist patterns. The resist patterns are trimmed using a first gas plasma to change the profiles of the resist patterns. Widths of the trimmed resist patterns are increased using a second gas plasma to form processed resist patterns.
    Type: Application
    Filed: August 30, 2010
    Publication date: June 30, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tokashiki Ken, Chul-ho Shin, Sang-Kuk Kim, Do-haing Lee, Dong-seok Lee
  • Publication number: 20110149378
    Abstract: Disclosed is an electrophoretic display device and a method for manufacturing the same, which facilitate high reflectivity, high contrast ratio and easy removal of line-shaped spots occurring when a release film is removed from an electrophoretic film. The electrophoretic display device comprising a substrate; a gate line, a data line, a storage electrode and a switching element on the substrate; a first passivation film on the gate line, data line, storage electrode, switching element and substrate, the first passivation film including first and second regions, the first region corresponding to the gate line, data line and switching element, the second region being a region other than the first region; a plurality of first dielectric patterns on the second region, the plurality of first dielectric patterns being apart from one another; a pixel electrode on the plurality of first dielectric patterns; and an electrophoretic film on the pixel electrode.
    Type: Application
    Filed: July 14, 2010
    Publication date: June 23, 2011
    Inventor: Sung Jin PARK
  • Publication number: 20110151382
    Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed. In particular, the application discloses a method that performs a lithography process using a material capable of increasing a depth of focus so as to prevent efficiency of the lithography process from being degraded due to high integration of a semiconductor device, and a pressure-type bake oven as an apparatus for forming a high refractive material on a semiconductor substrate, having advantages of reducing manufacturing costs of a semiconductor manufacturing process and increasing efficiency of the lithography process.
    Type: Application
    Filed: January 6, 2011
    Publication date: June 23, 2011
    Inventors: Hak Joon KIM, Jun Hyung Park
  • Publication number: 20110140181
    Abstract: Methods for removing a masking material, for example, a photoresist, and electronic devices formed by removing a masking material are presented. For example, a method for removing a masking material includes contacting the masking material with a solution comprising cerium. The cerium may be comprised in a salt. The salt may be cerium ammonium nitrate.
    Type: Application
    Filed: December 11, 2009
    Publication date: June 16, 2011
    Applicants: International Business Machines Corporation, Advanced Technology Materials, Inc.
    Inventors: Ali Afzali-Ardakani, Emanuel Israel Cooper, Mahmoud Khojasteh, Ronald W. Nunes, George Gabriel Totir
  • Publication number: 20110132639
    Abstract: A method produces an undercoat-covered smoothed printed wiring board, requiring no step of polishing the surface of the printed wiring board. A method for producing a solder-resist-covered printed wiring board causes no depression in an area between circuit traces. A printed wiring board so produced is also described. The method for producing a printed wiring board includes applying a photo- and heat-curable resin composition onto at least a part of a surface of a printed wiring substrate; placing an optically transparent smoothing member on the resin layer; moving a hard roller on the smoothing member to thin the applied resin layer to a thickness of interest; placing a negative-image mask on the smoothing member; exposing the applied resin layer to light via the negative-image mask; removing the optically transparent smoothing member; removing a light-unexposed portion of the applied resin layer through development; and completely heat-curing the cured light-exposed portion.
    Type: Application
    Filed: September 2, 2010
    Publication date: June 9, 2011
    Applicant: SAN-EI KAGAKU CO., LTD.
    Inventors: Takeshi SAITO, Kazunori KITAMURA, Yukihiro KOGA
  • Patent number: 7955764
    Abstract: Methods of forming color filters having a light blocking material therebetween. A color filter is formed such that a trench is defined between a color filter and an adjacent color filter. The trench may be formed by exposing the color filter to polymerizing conditions such as, for example, ultraviolet radiation and heat. The trench may also be formed by etching between adjacent color filters. A material is formed within the trench.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: June 7, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Saijin Liu, Ulrich C. Boettiger
  • Patent number: 7955783
    Abstract: A method for masking regions of photoresist in the manufacture of a soldermask for printed circuit boards is disclosed. Following application of photoresist over patterned traces on a substrate, a sheet-like thin film is applied over the photosensitive material. The thin film may adhere to the photosensitive material by way of the adhesive state of the photosensitive material or by way of an adhesive applied to the photosensitive material or the thin film or carried by the thin film. Digital mask printing may proceed on the surface of the thin film. The photosensitive material may then be exposed through the printed photomask, the thin film (with photomask) removed, and the photosensitive material developed.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: June 7, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Eric Shrader, Uma Srinivasan, Clark Crawford, Scott Limb
  • Publication number: 20110129780
    Abstract: According to one embodiment, a manufacturing method includes performing lithography processes for manufacturing a semiconductor device that includes a three-dimensional stacked device. The stacked device includes layers stacked above a substrate. Each of the layers includes a device circuit. The lithography processes include a lithography process for forming a lower layer of the layers by using a first original plate that has quality not less than a certain level. The first original plate is selected from original plates. Each of the original plates includes a pattern corresponding to the device circuit. The original plates are ranked according to quality based on defect. The lithography processes further include a lithography process for forming a higher layer of the layers by using a second original plate that has quality lower than the certain level. The second original plate is selected from the original plates.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 2, 2011
    Inventor: Koji HASHIMOTO
  • Publication number: 20110129779
    Abstract: A laser induced thermal imaging (LITI) method, a method of patterning an organic layer using the same and a method of manufacturing an organic light emitting diode (OLED) display device using the same. The LITI method includes preparing a substrate including a transfer layer, preparing a donor substrate including a base film and a light-to-heat conversion layer disposed on the base film, aligning the substrate with the donor substrate, and irradiating laser to the base layer of the donor substrate. Here, the laser is irradiated to the base layer in a region excluding a region corresponding to a pattern to be formed on the substrate. Thus, according to the method, regardless of the size of the pattern to be formed and the size of the laser beam, stitching mura can be prevented.
    Type: Application
    Filed: October 26, 2010
    Publication date: June 2, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Hyun-Chul LEE, Jin-Han Park, Hyung-Sik Kim, Won-Kyu Lim, Cheol-Lae Roh
  • Publication number: 20110127651
    Abstract: Polymers for extreme ultraviolet and 193 nm photoresists are disclosed. The polymers comprise a photoacid generator (PAG) residue, an acid cleavable residue and a diacid joined by ester linkages. The polymers include a photoacid generating diol, a diacid and an acid table diol.
    Type: Application
    Filed: February 20, 2009
    Publication date: June 2, 2011
    Applicant: THE RESEARCH FOUNDATION OF STATE UNIVERSITY OF NEW
    Inventors: Robert L. Brainard, Srividya Revuru
  • Publication number: 20110123912
    Abstract: There are provided a manufacturing method of a transparent substrate for a mask blank, a mask blank, or an exposure mask adapted to prevent occurrence of a transfer pattern defect or a mask pattern defect, by correcting a recessed defect existing on the surface of the transparent substrate, and a defect correction method of an exposure mask. With respect to an exposure mask having a transparent substrate 1 formed thereon with a mask pattern 2 which becomes a transfer pattern, correction is performed by removing, by the use of a needle-shaped member 4, a peripheral portion of a recessed defect 3 formed on a surface 1a of the substrate, where the mask pattern 2 is not formed, so as to induce a reduction in transmission light quantity which causes a transfer pattern defect, thereby reducing a level difference between the surface of the substrate and the depth of the recessed defect.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 26, 2011
    Applicant: HOYA CORPORATION
    Inventors: Masaru TANABE, Masaru MITSUI
  • Publication number: 20110122390
    Abstract: According to one embodiment, on a substrate, a resist layer is laminated on an upper side of a pattern formation layer on which a desired pattern is formed. A diffraction pattern that diffracts exposure light irradiated on the substrate is formed further on the upper side than the resist layer. Overall exposure is performed from above the diffraction pattern using a deformed light having illumination light source shape determined according to the desired pattern. Diffracted light diffracted on the resist layer.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 26, 2011
    Inventors: Masanori TAKAHASHI, Takashi Sato, Satoshi Tanaka, Soichi Inoue, Takamasa Takaki
  • Patent number: 7943287
    Abstract: An object is to provide a display device that can be manufactured with increased use efficiency of a material by a simplified manufacturing process and a manufacturing technique thereof. A light-absorbing layer is formed, an insulating layer is formed over the light-absorbing layer, the light-absorbing layer and the insulating layer are selectively irradiated with laser light, so that an irradiated region of the light-absorbing layer and an irradiated region of the insulating layer are removed, and accordingly an opening is formed in the light-absorbing layer and the insulating layer, and a conductive film is formed in the opening so as to be in contact with the light-absorbing film. The conductive film is formed in the opening so as to be in contact with the exposed light-absorbing layer, so that the light-absorbing layer and the conductive film are electrically connected to each other with the insulating layer interposed therebetween.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Energy laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka, Hironobu Shoji, Yasuyuki Arai
  • Publication number: 20110104595
    Abstract: Provision of an EUV mask whereby an influence of reflected light from a region outside a mask pattern region is suppressed, and an EUV mask blank to be employed for production of such an EUV mask. A reflective mask for EUV lithography (EUVL), comprising a substrate having a mask pattern region and an EUV light-absorbing region located outside the mask pattern region; a reflective layer provided on the mask pattern region of the substrate for reflecting EUV light and having a portion on which an absorber layer is present and a portion on which no absorber layer is present; the portion on which an absorber layer is present and the portion on which no absorber layer is present being arranged so as to constitute a mask pattern; wherein the reflectivity of a surface of the absorber layer for EUV light is from 5 to 15% and the reflectivity of a surface of the EUV light-absorbing region for EUV light is at most 1%.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 5, 2011
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Kazuyuki HAYASHI, Toshiyuki Uno, Ken Ebihara