Having Metal Oxide Or Copper Sulfide Compound Semiconductor Component Patents (Class 438/104)
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Publication number: 20150011048Abstract: To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as a transistor is miniaturized can be suppressed. The semiconductor device includes a first semiconductor film, a source electrode and a drain electrode electrically connected to the first semiconductor film, a gate insulating film, and a gate electrode in contact with the gate insulating film. The gate insulating film includes a first insulating film and a trap film, and charge is trapped in a charge trap state in an interface between the first insulating film and the trap film or inside the trap film.Type: ApplicationFiled: July 2, 2014Publication date: January 8, 2015Inventors: Tetsuhiro Tanaka, Takayuki Inoue, Yoshitaka Yamamoto, Hideomi Suzawa, Tamae Moriwaka
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Publication number: 20150008428Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.Type: ApplicationFiled: June 24, 2014Publication date: January 8, 2015Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE, Takayuki INOUE, Shunpei YAMAZAKI
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Publication number: 20150011046Abstract: A manufacturing method of a semiconductor device in which the threshold voltage is adjusted is provided. The semiconductor device includes a first semiconductor, an electrode electrically connected to the first semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the first semiconductor. By performing heat treatment at higher than or equal to 125° C. and lower than or equal to 450° C. and, at the same time, keeping a potential of the gate electrode higher than a potential of the electrode for 1 second or more, the threshold voltage is increased.Type: ApplicationFiled: June 24, 2014Publication date: January 8, 2015Inventors: Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE, Takayuki INOUE, Shunpei YAMAZAKI
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Publication number: 20150011049Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.Type: ApplicationFiled: July 10, 2014Publication date: January 8, 2015Inventors: Toshinari SASAKI, Hiroki OHARA, Junichiro SAKATA
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Publication number: 20150011045Abstract: Provided are a method of forming an oxide thin film using hydrogen peroxide, and a method of fabricating an oxide thin film transistor using hydrogen peroxide. Embodiments of the present disclosure provide methods of forming an oxide film, including: mixing hydrogen peroxide with a precursor solution in which a precursor material is dissolved in a solvent; applying the precursor solution mixed with the hydrogen peroxide to a substrate; heat treating the substrate.Type: ApplicationFiled: April 3, 2014Publication date: January 8, 2015Inventors: Hyun Jae Kim, Jeong Moo Kwon
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Publication number: 20150011047Abstract: Methods for fabricating an IGZO layer and fabricating TFT are provided in the present invention. The method for fabricating TFT includes the following steps: (1) depositing an IGZO layer and forming a surface oxidizing gas protective layer on the IGZO layer; (2) coating the IGZO layer with a photoresist, and then subjecting the photoresist to an exposing and developing process to form a photoresist pattern; and (3) subjecting the IGZO layer to an etching process, and then removing the photoresist. By forming an oxidizing gas protective layer, the present methods for fabricating an IGZO layer and fabricating TFT can effectively reduce the effect of hydrogen atom on IGZO layer and avoid the change of IGZO layer from semiconductor to conductor, thereby improving the stability of the IGZO layer and thus the TFT, and reducing the negative bias of threshold voltage generated by the long-term continuous use of the device.Type: ApplicationFiled: June 27, 2014Publication date: January 8, 2015Inventors: Chia-chi HUANG, Min-ching HSU, Hsueh-ming TSAI, Wen-xia ZUO
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Patent number: 8927981Abstract: The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.Type: GrantFiled: March 17, 2010Date of Patent: January 6, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kengo Akimoto, Hiromichi Godo, Akiharu Miyanaga
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Patent number: 8927983Abstract: Disclosed herein is a thin film transistor array substrate. The thin film transistor array substrate includes a display area and a non-display area. The non-display area includes a signal line, a connecting line and a metal contact. The connecting line is formed in a first patterned metal layer. The signal line and the metal contact are formed in a second patterned metal layer. The connecting line is connected to the signal line by a first through-hole, and the connecting line is connected to the metal contact by a second through-hole. Furthermore, a method of fabricating the thin film transistor array substrate is also disclosed.Type: GrantFiled: August 19, 2012Date of Patent: January 6, 2015Assignee: E Ink Holdings Inc.Inventors: Wen-Chung Tang, Fang-An Shu, Yao-Chou Tsai, Ted-Hong Shinn
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Patent number: 8927990Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.Type: GrantFiled: October 15, 2012Date of Patent: January 6, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Kosei Noda, Yuhei Sato, Yuta Endo
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Patent number: 8927331Abstract: A method of manufacturing a nonvolatile memory device includes: forming a tantalum oxide material layer including an oxygen-deficient transition metal oxide; forming a tantalum oxide material layer including a transition metal oxide and having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the tantalum oxide material layer; and exposing, after the forming of a tantalum oxide material layer, the tantalum oxide material layer to plasma generated from a noble gas.Type: GrantFiled: March 9, 2012Date of Patent: January 6, 2015Assignee: Panasonic CorporationInventors: Ichirou Takahashi, Takumi Mikawa
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Patent number: 8927330Abstract: Disclosed herein is a method for manufacturing a metal-oxide thin film transistor. The method includes the steps of: (a1) forming a gate electrode on a substrate; (a2) forming a gate insulating layer over the gate electrode; (a3) forming a metal-oxide semiconductor layer having a channel region on the gate insulating layer; (a4) forming a source electrode and a drain electrode on the metal-oxide semiconductor layer, wherein the source electrode is spaced apart from the drain electrode by a gap exposing the channel region; (a5) forming a mobility-enhancing layer on the channel region, wherein the mobility-enhancing layer is not in contact with the source electrode and the drain electrode; and (a6) annealing the metal-oxide semiconductor layer and the mobility-enhancing layer in an environment at a temperature of about 200° C. to 350° C.Type: GrantFiled: August 13, 2012Date of Patent: January 6, 2015Assignee: E Ink Holdings Inc.Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chun-Cheng Yeh, Liang-Hao Chen
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Patent number: 8927982Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.Type: GrantFiled: March 8, 2012Date of Patent: January 6, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Patent number: 8927329Abstract: The amount of water and hydrogen contained in an oxide semiconductor film is reduced, and oxygen is supplied sufficiently from a base film to the oxide semiconductor film in order to reduce oxygen deficiencies. A stacked base film is formed, a first heat treatment is performed, an oxide semiconductor film is formed over and in contact with the stacked base film, and a second heat treatment is performed. In the stacked base film, a first base film and a second base film are stacked in this order. The first base film is an insulating oxide film from which oxygen is released by heating. The second base film is an insulating metal oxide film. An oxygen diffusion coefficient of the second base film is smaller than that of the first base film.Type: GrantFiled: March 20, 2012Date of Patent: January 6, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuki Imoto, Yuhei Sato
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Publication number: 20150001534Abstract: A thin film transistor and a fabricating method thereof are provided. The thin film transistor includes a semiconductor stacked layer, an insulating layer, a gate, a dielectric layer, a source and a drain. The semiconductor stacked layer includes a first metal oxide semiconductor layer and a second metal oxide semiconductor layer disposed on the first metal oxide semiconductor layer. A resistance value of the first metal oxide semiconductor layer is less than a resistance value of the second metal oxide semiconductor layer. The insulating layer is disposed on the semiconductor stacked layer. The gate is disposed on the insulating layer. The dielectric layer covers the gate, wherein the dielectric layer has a plurality of contact openings. The source and the drain are disposed on the dielectric layer, and filled into the contact openings to electrically connect with the semiconductor stacked layer.Type: ApplicationFiled: June 25, 2014Publication date: January 1, 2015Inventors: Chih-Pang Chang, Tzu-Yin Kuo
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Publication number: 20150001542Abstract: The present disclosure relates to a thin film transistor substrate having a metal oxide semiconductor for the fringe field type flat panel displays and a method for manufacturing the same. The thin film transistor substrate having an oxide semiconductor layer can include a substrate including pixel region; a gate element formed on the substrate; a gate insulating layer covering the gate element; a channel layer on the gate insulating layer, a source area expanded form a first side of the channel layer, a drain area expanded from a second side of the channel layer, and a pixel electrode expanded from the drain area to the pixel region; an etch stopper formed on the channel layer; a data element formed on the etch stopper; and a common electrode formed on the passivation layer and within the pixel region.Type: ApplicationFiled: June 20, 2014Publication date: January 1, 2015Inventors: Hun JANG, Sul LEE
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Publication number: 20150004746Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.Type: ApplicationFiled: September 18, 2014Publication date: January 1, 2015Inventors: Shunpei YAMAZAKI, Hiromichi GODO, Hideyuki KISHIDA
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Publication number: 20150001537Abstract: A vertical charge ordered transistor is disclosed. A thin charge ordered layer is employed as a tunnel barrier between two electrodes. A gate-induced accumulation of charge destabilizes the charge ordered state around the circumference of the device, opening up a parallel ohmic conduction channel, which leads to an exponential increase in source-drain current. VCOT devices have the potential to exhibit very large on/off ratios, low off-state currents, and sub-threshold slopes below 60 mV/dec.Type: ApplicationFiled: February 15, 2013Publication date: January 1, 2015Applicants: Drexel University, The Trustees of the University of PennsylvaniaInventors: Steven May, Jonathan Spanier, James Rondinelli, Mitra Taheri, Robert Charles Devlin, Andrew Marshall Rappe
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Publication number: 20150001536Abstract: An object of the present invention is to achieve improvement in performance of a thin film transistor including an oxide as a gate insulating layer, or simplification and energy saving in the processes of producing such a thin film transistor. A thin film transistor (100) of the present invention includes a first oxide layer (possibly containing inevitable impurities) (32) consisting of lanthanum (La) and tantalum (Ta), which has a surface (32a) formed after a precursor layer obtained from a precursor solution as a start material including a precursor containing lanthanum (La) and a precursor containing tantalum (Ta) as solutes is exposed to a hydrochloric acid vapor, between a gate electrode (20) and a channel (52). Moreover, in the thin film transistor, the surface (32a) of the first oxide layer (32) is in contact with the channel (52).Type: ApplicationFiled: December 20, 2012Publication date: January 1, 2015Inventors: Tatsuya Shimoda, Hirokazu Tsukada, Takaaki Miyasako
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Publication number: 20150004745Abstract: It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.Type: ApplicationFiled: September 15, 2014Publication date: January 1, 2015Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA
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Publication number: 20150001456Abstract: A resistance variable element includes a first electrode, a second electrode and an ion conductor layer interposed between the first and second electrodes. Metal ions supplied from the first electrode into the ion conductor layer accept electrons from the second electrode and are turned into metal. The so formed metal is precipitated to cross-link and interconnect the first and second electrodes to provide for voltage variations. The ion conductor layer has a stacked layer structure comprised of a first ion conductor layer formed by a compound containing oxygen and carbon and a second ion conductor layer formed by a metal oxide. The metal oxide that forms the second ion conductor layer includes at least one out of zirconium oxide and hafnium oxide.Type: ApplicationFiled: May 10, 2012Publication date: January 1, 2015Applicant: NEC CORPORATIONInventors: Naoki Banno, Munehiro Tada
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Publication number: 20150000728Abstract: Provided is a titanium oxide laminated film that includes the titanium oxide film consisting of anatase-type plate-like crystals in which (001) faces with a high chemical activity are grown more than normal and the (001) faces are grown in a vertical or inclined direction with respect to a deposition surface of a base material, and is capable of having a specific surface area greater than that of the titanium oxide film alone. A titanium oxide laminated film (1) is formed by sequentially laminating, on a base material (11), a first titanium oxide film (12) consisting of a plurality of anatase-type plate-like crystals in which (001) faces are grown in a vertical or inclined direction with respect to a deposition surface (11a) of the base material (11), and a second titanium oxide film (13) having a specific surface area greater than that of the first titanium oxide film (12) and consisting of a plurality of titanium oxide fine particles.Type: ApplicationFiled: December 19, 2012Publication date: January 1, 2015Inventors: Masato Maitani, Keita Tanaka, Yuji Wada
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Publication number: 20150004747Abstract: A resistive random access memory (ReRAM) includes a first metal layer having a first metal and a metal-oxide layer on the first metal layer. The metal-oxide layer includes the first metal. The ReRAM further includes a second metal layer over the metal-oxide layer and a first continuous conductive barrier layer in physical contact with sidewalls of the first metal layer and of the metal-oxide layer.Type: ApplicationFiled: September 18, 2014Publication date: January 1, 2015Inventors: CHEONG M. HONG, KO-MIN CHANG, FENG ZHOU
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Publication number: 20150001528Abstract: A method for preparing a sol-gel film is disclosed. The method comprises providing a sol-gel composition comprising one or more sol-gel film precursors and a crystallization aid, and processing the sol-gel composition by solution processing to form the sol-gel film. In certain embodiments, the sol-gel film comprises one or more metal oxides. A preferred crystallization aid includes triphenylphosphine oxide. A composition for making a sol-gel film, a sol-gel film, a device including a sol-gel film and a method for making such device are also disclosed.Type: ApplicationFiled: June 4, 2014Publication date: January 1, 2015Inventors: YUHUA NIU, PETER T. KAZLAS
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Patent number: 8921156Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.Type: GrantFiled: October 4, 2013Date of Patent: December 30, 2014Assignee: Intermolecular, Inc.Inventors: Prashant B Phatak, Tony P. Chiang, Pragati Kumar, Michael Miller
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Patent number: 8921154Abstract: Embodiments of the invention include a nonvolatile memory device that contains nonvolatile resistive random access memory device with improved device performance and lifetime. In some embodiments, nonvolatile resistive random access memory device includes a diode, a metal silicon nitride embedded resistor, and a resistive switching layer disposed between a first electrode layer and a second electrode layer. In some embodiments, the method of forming a resistive random access memory device includes forming a diode, forming a metal silicon nitride embedded resistor, forming a first electrode layer, forming a second electrode layer, and forming a resistive switching layer disposed between the first electrode layer and the second electrode layer.Type: GrantFiled: August 26, 2014Date of Patent: December 30, 2014Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLCInventors: Mihir Tendulkar, David Chi
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Patent number: 8921155Abstract: A resistive random access memory cell uses a substrate and includes a gate stack over the substrate. The gate stack includes a first copper layer over the substrate, a copper oxide layer over the first copper layer, and a second copper layer over the copper oxide layer.Type: GrantFiled: April 12, 2011Date of Patent: December 30, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Feng Zhou, Ko-Min Chang, Cheong Min Hong
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Patent number: 8921236Abstract: A method of producing a patterned inorganic thin film element includes providing a substrate. A thin layer of polymeric inhibitor is uniformly depositing on the substrate. A patterned mask having open areas is provided on the thin layer of polymeric inhibitor. The thin layer of polymeric inhibitor is patterned by removing inhibitor from areas exposed by the open areas of the patterned mask using a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in the areas exposed by the removal of the thin layer of polymeric inhibitor using an atomic layer deposition process.Type: GrantFiled: June 21, 2013Date of Patent: December 30, 2014Assignee: Eastman Kodak CompanyInventors: Carolyn R. Ellinger, Shelby F. Nelson, Kurt D. Sieber
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Publication number: 20140374743Abstract: To provide a crystalline oxide semiconductor film, an ion is made to collide with a target including a crystalline In—Ga—Zn oxide, thereby separating a flat-plate-like In—Ga—Zn oxide in which a first layer including a gallium atom, a zinc atom, and an oxygen atom, a second layer including an indium atom and an oxygen atom, and a third layer including a gallium atom, a zinc atom, and an oxygen atom are stacked in this order; and the flat-plate-like In—Ga—Zn oxide is irregularly deposited over a substrate while the crystallinity is maintained.Type: ApplicationFiled: June 3, 2014Publication date: December 25, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei YAMAZAKI
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Publication number: 20140377905Abstract: A display apparatus includes a base substrate and a buffer layer disposed on the base substrate. The display apparatus further includes an oxide semiconductor layer disposed on the buffer layer and including a source electrode, a drain electrode, and a channel portion. The display apparatus further includes a gate insulating layer disposed on the channel portion, a gate electrode disposed on the gate insulating layer, and a protective layer disposed on the gate electrode and the buffer layer and having a contact hole. The display apparatus further includes a transparent electrode overlapping a portion of the protective layer and electrically connected to one of the source electrode and the drain electrode through the contact hole. The transparent electrode includes a transparent metal layer and a transparent conductive oxide layer overlapping the transparent metal layer.Type: ApplicationFiled: September 4, 2014Publication date: December 25, 2014Inventors: Honglong Ning, Byeong-Beom Kim, Kyungseop Kim, Joonyong Park, Changoh Jeong, Sangwon Shin, Dongmin Lee
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Publication number: 20140377906Abstract: Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.Type: ApplicationFiled: September 5, 2014Publication date: December 25, 2014Inventors: Hsin-Hung LIN, Jung-Fang CHANG, Ker-Yih KAO
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Publication number: 20140374609Abstract: Provided is a radiation detecting element, including: a semiconductor layer including a tin oxide crystal; and a detecting unit configured to detect, as an electrical signal, charges generated in the semiconductor layer when the semiconductor layer is irradiated with radiation, in which a resistivity of the semiconductor layer is 107 ?·cm or more.Type: ApplicationFiled: June 11, 2014Publication date: December 25, 2014Inventors: Tatsuya Iwasaki, Tatsuya Saito, Toru Den, Yoshinobu Nakamura, Hidenori Takagi
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Publication number: 20140374746Abstract: A thin film transistor (TFT) includes a gate, a drain, a source, an insulating layer, a metal oxide layer, and an etch stopper layer. The metal oxide layer includes a source area, a drain area, and a channel area. The source is electrically coupled to the source area and the drain is electrically coupled to the drain area. Oxygen ions are implanted into the channel area via a surface treatment process to make an oxygen concentration of the channel area be greater than an oxygen concentration of each of the source area and the drain area.Type: ApplicationFiled: June 17, 2014Publication date: December 25, 2014Inventors: CHIH-LUNG LEE, PO-LI SHIH
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Publication number: 20140377907Abstract: An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.Type: ApplicationFiled: September 9, 2014Publication date: December 25, 2014Inventors: Toshinari SASAKI, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
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Publication number: 20140377904Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.Type: ApplicationFiled: September 4, 2014Publication date: December 25, 2014Inventors: DOO HYOUNG LEE, CHAN WOO YANG, SEUNG-HO JUNG, DOO NA KIM, BO SUNG KIM, EUN HYE PARK, JUNE WHAN CHOI
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Publication number: 20140374739Abstract: An oxide semiconductor thin film transistor includes a source, a drain, a channel layer, an insulation layer, a first conductor and a second conductor. The channel layer is disposed between the source and the drain, and separated from the source and the drain. The insulation layer covers the source, the drain and the channel layer. The first conductor is at least disposed in a first opening of the insulation layer so as to touch the source and the channel layer. The second conductor is at least disposed in a second opening of the insulation layer so as to touch the drain and the channel layer.Type: ApplicationFiled: August 12, 2013Publication date: December 25, 2014Applicant: Chunghwa Picture Tubes, LTD.Inventor: Hsi-Ming Chang
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Publication number: 20140374740Abstract: A TFT array substrate is disclosed. The substrate includes a TFT having a gate insulation layer, and an active layer partly thereon. The TFT also has a first part of an etch barrier layer on the active layer, and a source and drain on the first part of the etch barrier layer. The substrate also includes a capacitance having a first electrode plate, a second part of the gate insulation layer on the first electrode plate, a second part of the etch barrier layer on the second part of the gate insulation layer, and a second electrode plate on the second part of the etch barrier layer. The second part of the etch barrier layer has a thickness less than the first part of the etch barrier layer, and/or there is no etch barrier layer between the second part of the gate insulation layer and the second electrode plate.Type: ApplicationFiled: November 26, 2013Publication date: December 25, 2014Applicants: Tianma Micro-Electronics Co., Ltd., Shanghai Tianma Micro-Electronics Co., Ltd.Inventors: Junhui LOU, Sitao HOU
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Patent number: 8916865Abstract: An object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. In a transistor including an oxide semiconductor film, the oxide semiconductor film is subjected to dehydration or dehydrogenation performed by heat treatment. In addition, as a gate insulating film in contact with the oxide semiconductor film, an insulating film containing oxygen, preferably, a gate insulating film including a region containing oxygen with a higher proportion than the stoichiometric composition is used. Thus, oxygen is supplied from the gate insulating film to the oxide semiconductor film. Further, a metal oxide film is used as part of the gate insulating film, whereby reincorporation of an impurity such as hydrogen or water into the oxide semiconductor is suppressed.Type: GrantFiled: June 7, 2011Date of Patent: December 23, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Publication number: 20140370657Abstract: In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.Type: ApplicationFiled: September 4, 2014Publication date: December 18, 2014Inventors: Shunpei YAMAZAKI, Yuhei SATO, Keiji SATO, Tetsunori MARUYAMA, Junichi KOEZUKA
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Publication number: 20140370654Abstract: A step for forming an island-shaped semiconductor layer of a semiconductor device used in a display device is omitted in order to manufacture the semiconductor device with high productivity and low cost. The semiconductor device is manufactured through four photolithography processes: four steps for forming a gate electrode, for forming a source electrode and a drain electrode, for forming a contact hole, and for forming a pixel electrode. In the step for forming the contact hole, a groove portion in which a semiconductor layer is removed is formed, whereby formation of a parasitic transistor is prevented. An oxide semiconductor is used as a material of the semiconductor layer in which a channel is formed, and an oxide semiconductor having a higher insulating property than the semiconductor layer is provided over the semiconductor layer.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Inventors: Shunpei Yamazaki, Jun Koyama
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Publication number: 20140370656Abstract: A semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed. The transistor including the oxide semiconductor film subjected to the dehydration or dehydrogenation by the heat treatment and the oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.Type: ApplicationFiled: September 4, 2014Publication date: December 18, 2014Inventor: Shunpei Yamazaki
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Publication number: 20140370653Abstract: An object is to provide a deposition technique for depositing an oxide semiconductor film. Another object is to provide a method for manufacturing a highly reliable semiconductor element using the oxide semiconductor film. A novel sputtering target obtained by removing an alkali metal, an alkaline earth metal, and hydrogen that are impurities in a sputtering target used for deposition is used, whereby an oxide semiconductor film containing a small amount of those impurities can be deposited.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Inventor: Shunpei Yamazaki
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Publication number: 20140367674Abstract: A process for forming an amorphous conductive oxide film, comprising the steps of: applying a composition which comprises (A1) a×y parts by mole of at least one metal compound selected from the group consisting of carboxylate salts, alkoxides, diketonates, nitrate salts and halides of a metal selected from among lanthanoids (excluding cerium), (A2) a×(1?y) parts by mole of at least one metal compound selected from the group consisting of carboxylate salts, alkoxides, diketonates, nitrate salts and halides of a metal selected from among lead, bismuth, nickel, palladium, copper and silver, (B) 1 part by mole of at least one metal compound selected from the group consisting of carboxylate salts, alkoxides, diketonates, nitrate salts, halides, nitrosylcarboxylate salts, nitrosylnitrate salts, nitrosylsulfate salts and nitrosylhalides of a metal selected from among ruthenium, iridium, rhodium and cobalt, and (C) a solvent containing at least one selected from the group consisting of carboxylic acids, alcohols, ketType: ApplicationFiled: November 15, 2012Publication date: December 18, 2014Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCYInventors: Tatsuya Shimoda, Jinwang Li
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Publication number: 20140367676Abstract: The invention relates to a process for the production of electrically semiconducting or conducting metal-oxide layers having improved conductivity which is suitable, in particular, for the production of flexible thin-film transistors, to metal-oxide layers produced thereby, and to the use thereof for the production of electronic components.Type: ApplicationFiled: January 10, 2013Publication date: December 18, 2014Applicant: MERCK PATENT GMBHInventors: Marc Haeming, Andreas Klyszcz, Klaus Bonrad, Peer Kirsch, Alexander Issanin, Daniel Walker
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Publication number: 20140367677Abstract: This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8) including a dielectric layer (8a) formed over the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the dielectric layer (8a) interposed between them, and the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film.Type: ApplicationFiled: January 24, 2013Publication date: December 18, 2014Inventors: Tadayoshi Miyamoto, Kazuatsu Ito, Shigeyasu Mori, Mitsunobu Miyamoto, Yasuyuki Ogawa, Makoto Nakazawa, Takuya Matsuo, Seiichi Uchida
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Publication number: 20140370655Abstract: A method is provided for fabricating a thin-film transistor (TFT). The method includes forming a semiconductor layer over a gate insulator that covers a gate electrode, and depositing an insulator layer over the semiconductor layer, as well as etching the insulator layer to form a patterned etch-stop without losing the gate insulator. The method also includes forming a source electrode and a drain electrode over the semiconductor layer and the patterned etch-stop. The method further includes removing a portion of the semiconductor layer beyond the source electrode and the drain electrode such that a remaining portion of the semiconductor layer covers the gate insulator in a first overlapping area of the source electrode and the gate electrode and a second overlapping area of the drain electrode and gate electrode.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Inventors: Ming-Chin Hung, Kyung Wook Kim, Young Bae Park, Hao-Lin Chiu, Chun-Yao Huang, Shih Chang Chang
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Patent number: 8913418Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A stack including a defect source layer, a defect blocking layer, and a defect acceptor layer disposed between the defect source layer and the defect blocking layer may be subjected to annealing. During the annealing, defects are transferred in a controllable manner from the defect source layer to the defect acceptor layer. At the same time, the defects are not transferred into the defect blocking layer thereby creating a lowest concentration zone within the defect acceptor layer. This zone is responsible for resistive switching. The precise control over the size of the zone and the defect concentration within the zone allows substantially improvement of resistive switching characteristics of the ReRAM cell. In some embodiments, the defect source layer includes aluminum oxynitride, the defect blocking layer includes titanium nitride, and the defect acceptor layer includes aluminum oxide.Type: GrantFiled: May 10, 2013Date of Patent: December 16, 2014Assignees: Intermolecular, Inc., Kabushiki Kaisha Toshiba, SanDisk 3D LLCInventors: Yun Wang, Vidyut Gopal, Chien-Lan Hsueh
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Patent number: 8912041Abstract: A method for forming an interconnect structure includes forming a dielectric material layer on a semiconductor substrate. An oxygen-rich layer is formed over the dielectric material layer. The dielectric material layer and the oxygen-rich layer are patterned to form a plurality of vias in the semiconductor substrate. A barrier layer is formed in the plurality of vias and on the dielectric material layer leaving a portion of the oxygen-rich layer exposed. A metal layer is formed on the barrier layer and on the exposed portion of the oxygen-rich layer, wherein the metal layer fills the plurality of vias. The semiconductor substrate is annealed at a predetermined temperature range and at a predetermined pressure to transform the exposed portion of the oxygen-rich layer into a metal-oxide stop layer.Type: GrantFiled: March 8, 2013Date of Patent: December 16, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chao-Hsien Peng, Hsiang-Huan Lee, Shau-Lin Shue
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Patent number: 8912536Abstract: An oxide transistor includes: a channel layer formed of an oxide semiconductor; a source electrode contacting a first end portion of the channel layer; a drain electrode contacting a second end portion of the channel layer; a gate corresponding to the channel layer; and a gate insulating layer disposed between the channel layer and the gate. The oxide semiconductor includes hafnium-indium-zinc-oxide (HfInZnO). An electrical conductivity of a back channel region of the channel layer is lower than an electrical conductivity of a front channel region of the channel layer.Type: GrantFiled: June 9, 2011Date of Patent: December 16, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Wan-joo Maeng, Myung-kwan Ryu, Tae-sang Kim, Joon-seok Park
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Patent number: 8912518Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from doped metal oxides and/or nitrides. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature annealing. In some embodiments, the breakdown voltage of a current limiting layer may be at least about 8V. Some examples of such current limiting layers include titanium oxide doped with niobium, tin oxide doped with antimony, and zinc oxide doped with aluminum. Dopants and base materials may be deposited as separate sub-layers and then redistributed by annealing or may be co-deposited using reactive sputtering or co-sputtering. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layer while maintaining their performance.Type: GrantFiled: November 8, 2012Date of Patent: December 16, 2014Assignee: Intermolecular, Inc.Inventors: David Chi, Vidyut Gopal, Minh Huu Le, Minh Anh Nguyen, Dipankar Pramanik, Milind Weling
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Patent number: 8912080Abstract: The semiconductor device is manufactured through the following steps: after first heat treatment is performed on an oxide semiconductor film, the oxide semiconductor film is processed to form an oxide semiconductor layer; immediately after that, side walls of the oxide semiconductor layer are covered with an insulating oxide; and in second heat treatment, the side surfaces of the oxide semiconductor layer are prevented from being exposed to a vacuum and defects (oxygen deficiency) in the oxide semiconductor layer are reduced.Type: GrantFiled: January 9, 2012Date of Patent: December 16, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki