Abstract: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions. At the same time, the source/drain regions can be annealed out. The gate electrodes of tantalum can withstand this heat treatment.

Abstract: A method of manufacturing a semiconductor device that forms laminate layers includes the steps of reducing contamination containing the single bond of carbon on at least one part of a surface on which the laminate films are formed by activated hydrogen before the laminate films are formed, and forming the laminate films on the surface on which the laminate films are formed.

Abstract: In one implementation, A method of forming semiconductive material active area having a proximity gettering region received therein includes providing a substrate comprising bulk semiconductive material. A proximity gettering region is formed within the bulk semiconductive material within a desired active area by ion implanting at least one impurity into the bulk semiconductive material. After forming the proximity gettering region, thickness of the bulk semiconductive material is increased in a blanket manner at least within the desired active area. In one implementation, a method of processing a monocrystalline silicon substrate includes forming a proximity gettering region within monocrystalline silicon of a monocrystalline silicon substrate. After forming the proximity gettering region, epitaxial monocrystalline silicon is formed on the substrate monocrystalline silicon to blanketly increase its thickness at least over the proximity gettering region.

Abstract: A method of fabricating a semiconductor wafer is disclosed. The method reduces the number of processing steps and produces a low cost semiconductor wafer having external gettering. The method includes slicing the wafer from a single silicon crystal ingot and etching the wafer to clean impurities and residue from slicing. Thereafter, the wafer is double side polished which creates damage on both the front and back surfaces. The damage on the front surface is then removed in a subsequent plasma assisted chemical etching step and touch polishing operation which significantly improves the flatness of the wafer. The damage on the back surface created by the double side polishing remains and getters defects from the front surface and bulk regions of the wafer.

Abstract: An amorphous silicon film is deposited on a quartz substrate, and a metal of Ni is introduced into the amorphous silicon film so that the amorphous silicon film is crystallized. Phosphorus is ion-implanted with an oxide pattern used as a mask. A heating process is performed in a nitrogen atmosphere, by which Ni is gettered. A heating process is performed in an O2 atmosphere, by which Ni is gettered into the oxide. Like this, by performing the first gettering in a non-oxidative atmosphere, the Ni concentration can be reduced to such a level that oxidation does not cause any increase of irregularities or occurrence of pinholes. Thus, in a second gettering, enough oxidation can be effected without minding any increase of irregularities and occurrence of pinholes, so that the Ni concentration can be reduced to an extremely low level. Also, a high-quality crystalline silicon film free from surface irregularities and pinholes can be obtained.

Abstract: Transient enhanced diffusion (TED) of ion implanted dopant impurities within a silicon semiconductor substrate is eliminated or substantially reduced by displacing “knocked-on” oxygen atoms from an overlying oxygen-containing layer into the substrate by ion implantation. The “knocked-on” oxygen atoms getter silicon interstitial atoms generated within the substrate by dopant implantation, which are responsible for TED.

Abstract: The present invention provides an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.

Abstract: A single-crystal silicon substrate is provided, which makes it possible to accurately control the concentration and profile of an introduced impurity. This silicon substrate is comprised of a single-crystal Si base layer and a single-crystal Si low oxygen-concentration layer formed on the base layer. The base layer has a first oxygen concentration and the low oxygen-concentration layer has a second oxygen concentration lower than the first oxygen concentration. This silicon substrate is fabricated by (a) growing a single-crystal Si epitaxial layer on the main surface of a single-crystal Si base material in such a way that the epitaxial layer has a second oxygen concentration lower than of the first oxygen concentration, or (b) heat-treating a single-crystal Si base material to cause outward diffusion of oxygen existing in the base material through the main surface thereof, thereby forming a low oxygen-concentration layer extending along the main surface of the base material in the base material.

Abstract: Wafers, each including an MOS semiconductor component thereon, are introduced one by one into a single-wafer heat treatment system. First, hydrogen is introduced into the system and the wafer is heated up to a predetermined temperature in Step 1. Next, while the wafer temperature is kept constant at the predetermined temperature, the hydrogen sintering process is performed in Step 2. Then, the wafer is cooled down to another predetermined temperature or less within the system in Step 3. Finally, the wafer is taken out in Step 4. The time taken to perform a single cycle of the sintering process may be within three minutes. Accordingly, compared to a conventional process using a diffusion furnace, the throughput can be increased and the temperature response and uniformity of the wafer can also be improved. By taking the wafer out of the system after sintering and then cooling down it once, the damage caused in MOS interface states, for example, by a previous process step can be repaired in a short time.

Abstract: After O2+ ions are implanted in a silicon substrate (10), heat treatment is applied to the silicon substrate at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 0.1% to 1%, both inclusive, whereby a buried oxide layer (50) is formed. Subsequent to the above heat treatment, post heat treatment may be applied to the silicon substrate (10) at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 1% to 30%, both inclusive. Further, prior to the heat treatment, provisional heat treatment may be applied to the silicon substrate 10 at a temperature of form 350° C. to 1,000° C., both inclusive, for 1 hour or longer.

Abstract: A method to convert a reclaim wafer into a semiconductor wafer, suitable as starting material for semiconductor fabrication, with a front surface, a back surface and an edge. At least one of the two surfaces bearing foreign material which originates from at least one process for the fabrication of semiconductor components.

Abstract: A bipolar transistor and a method of manufacturing the transistor. The transistor includes: (1) a substrate having a base region, an emitter region and a base-emitter junction between said base and emitter regions and (2) a substantial concentration of an isotope of hydrogen located in said biploar transistor.

Abstract: A process for preparing an silicon epitaxial wafer. The wafer has a front surface having an epitaxial layer deposited thereon, a back surface, and a bulk region between the front and back surfaces, wherein the bulk region contains a concentration of oxygen precipitates. In the process, a wafer having interstitial oxygen atoms is first subjected to an oxygen precipitation heat treatment to cause the nucleation and growth of oxygen precipitates to a size sufficient to stabilize the oxygen precipitates. An epitaxial layer is then deposited on the surface of the oxygen precipitate stabilized wafer.

Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.

Abstract: A semiconductor fabrication apparatus and methods for processing materials on a semiconductor wafer are disclosed. The fabrication apparatus is a processing chamber comprising: an ultraviolet radiation source and an infrared radiation source, the radiation sources symmetrically arranged such that radiation is substantially uniform throughout the chamber and the radiation sources being capable of being used as a film deposition radiation source or a film annealing radiation source or both; an ultraviolet radiation sensor and an infrared radiation sensor to provide a feedback loop to the ultraviolet radiation source and to the infrared radiation source, respectively, so that a desired level of ultraviolet radiation and infrared radiation is maintained inside the chamber.

Abstract: A semi-insulating polycrystalline silicon layer containing oxygen of at least 10 percent by atom is grown on a back surface of a single crystalline silicon wafer, and achieves high gettering efficiency at a thickness less than the thickness of usual polycrystalline silicon so that the silicon substrate is less warped.

Abstract: A multilayered wafer with a thick sacrificial layer, which is obtained by forming a sacrificial layer of oxidized porous silicon or porous silicon and growing an epitaxial polysilicon layer on the sacrificial layer, and a fabrication method thereof are provided. The multilayered wafer with a thick sacrificial layer adopts a porous silicon layer or an oxidized porous silicon layer as a sacrificial layer such that a sufficient gap can be obtained between a substrate and a suspension structure upon the manufacture of the suspension structure of a semiconductor actuator or a semiconductor inertia sensor. Also, in a fabrication method of the wafer according to the present invention, a p+-type or n+-type wafer doped at a high concentration is prepared for, and then a thick porous silicon layer can be obtained simply by anodic-bonding the surface of the wafer. Also, when polysilicon is grown on a porous silicon layer by an epitaxial process, it is grown faster than when single crystal silicon is grown.

Abstract: The present invention induces provides a gettering trench on the front surface of a device substrate. In one embodiment it induces stress and simultaneously forms a gettering zone 40 for gettering impurities in an integrated circuit structure. In another embodiment, the trench is filled with gettering material 72 such as polysilicon. The two gettering mechanisms may be combined 82,84. The invention is useful for providing gettering in bonded wafers and in silicon-on-insulator devices (FIGS. 4,5).

Abstract: A fabrication method for an oxide layer with reduced interface-trapped charges, which is applicable to the fabrication of a gate oxide layer of a flash memory device, is described. The method includes conducting a first inert ambient annealing process, followed by growing an oxide layer on the silicon substrate. A second inert ambient annealing process is then conducted on the oxide layer. Carbon ions are then incorporated into the interface between the oxide layer and the silicon substrate, followed by a third ambient annealing process.

Abstract: A method for protecting metal (112) from oxidation during various oxidation steps such as CVD SiO2 oxidation for forming an overlying oxide layer (114), smile oxidation, and sidewall (116) deposition. The gas CO2 is added to the oxidation chemistry. The CO2/H2 ratio is controlled for selective oxidation. The metal (112) is effectively protected from oxidation due to the existence of both H2 and CO2 as strong reduction reagents.

Abstract: A semiconductor manufacturing system includes a getter-based gas purifier coupled in flow communication with a gas distribution network for a semiconductor fabrication facility. The gas distribution network supplies purified gas to at least one wafer processing chamber in the semiconductor fabrication facility. The gas purifier includes a getter column having a metallic vessel with an inlet, an outlet, and a containment wall extending between the inlet and the outlet. Getter material which purifies gas flowing therethrough by sorbing impurities therefrom is disposed in the vessel. A first temperature sensor is disposed in a top portion of the getter material. The first temperature sensor is located in a melt zone to detect rapidly the onset of an exothermic reaction which indicates the presence of excess impurities in the incoming gas to be purified. A second temperature sensor is disposed in a bottom portion of the getter material.

Abstract: The present invention provides a method of using a getter layer on a semiconductor substrate having a first metal stack formed thereon to improve metal to metal contact resistance. The method comprises the steps of forming a getter layer, which may be titanium, on the first metal stack, wherein the getter layer has a higher affinity for oxygen or a higher getter capability than the first metal stack, substantially removing the getter layer by exposing the getter layer to radiation, and forming a second metal stack, which in an advantageous embodiment may also be titanium, on the first metal stack.

Abstract: A semi-insulating polycrystalline silicon layer containing oxygen of at least 10 percent by atom is grown on a back surface of a single crystalline silicon wafer, and achieves high gettering efficiency at a thickness less than the thickness usual polycrystalline silicon so that the silicon substrate is less warped

Abstract: A method of processing a semiconductor wafer sliced from a single-crystal ingot includes lapping front and back surfaces of the wafer to reduce the thickness of the wafer and to improve the flatness of the wafer. The front surface is subjected to fine grinding to reduce the damage on the front surface while leaving damage on the back surface intact. The front and back surfaces are simultaneously polished to improve the flatness of the wafer and to reduce wafer damage on the front and back surfaces. The wafer damage remaining on the back surface is greater than the wafer damage on the front surface. The wafer damage remaining on the back surface facilitates gettering.

Abstract: A process for producing a semiconductor device comprises heat-treating an oxygen-containing silicon substrate in an inert atmosphere to change a concentration of oxygen contained in the silicon substrate to within a range of 5×1017/cm3 to 10×1017/cm3, and heat treating the silicon substrate in an oxidative atmosphere to form a silicon oxide film.

Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The heat-treated wafer is then oxidized by heating in the presence of an oxygen-containing atmosphere in order to establish a vacancy concentration profile within the wafer. The oxidized wafer is then cooled from the temperature of said oxidizing heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.

Abstract: In a method for producing a silicon single crystal wafer, a silicon single crystal ingot in which nitrogen is doped is grown by a Czochralski method, sliced to provide a silicon single crystal wafer, and then subjected to heat treatment to out-diffuse nitrogen on the surface of the wafer. According to a further method, a silicon single crystal ingot is grown in which nitrogen is doped by a Czochralski method, with controlling nitrogen concentration, oxygen concentration and cooling rate, and then the silicon single crystal ingot is sliced to provide a wafer. A silicon single crystal wafer is obtained by slicing a silicon single crystal ingot grown by a Czochralski method with doping nitrogen, wherein the depth of a denuded zone after gettering heat treatment or device fabricating heat treatment is 2 to 12 &mgr;m, and the bulk micro-defect density after gettering heat treatment or device fabricating heat treatment is 1×108 to 2×1010 number/cm3.

Abstract: A method for producing a silicon single crystal by a Czochralski method comprises bringing a seed crystal into contact with a melt, performing a necking operation, and growing a single crystal ingot, wherein concentration of interstitial oxygen incorporated during the necking operation is 1 ppma (JEIDA) or more. The rate of success in making dislocation-free crystals is improved in a seeding method in which a necking operation is performed.

Abstract: A process for forming a silicided MOS transistor (100) begins by providing source and drain regions (104) and (106) and a gate electrode (110). Silicon nitride spacers (116) are formed adjacent the gate electrode (110). A cobalt layer (118) and an overlying titanium layer (120) are then deposited in contact with the regions (104), (106), and (110). A rapid thermal process (130) is then used to react the titanium, cobalt, and silicon together to form silicide regions (124), (126), and (128), and intermetallic compound layers (132) and (134). The intermetallic compound layers (132) and (134) are then etched using two sequentially-performed wet etch steps (136) and (138). The resulting structure (100) has a nitride spacer (116) and field oxide regions (107) which are free from cobalt residual contamination (38).

Abstract: A wafer processing system including a processing chamber, a low pressure pump coupled to the processing chamber for pumping noble and non-noble gases, a valve mechanism coupling a source of noble gas to the processing chamber, an in situ getter pump disposed within the processing chamber which pumps certain non-noble gases during the flow of the noble gas into the chamber, and a processing mechanism for processing a wafer disposed within the processing chamber. Preferably, the in situ getter pump can be operated at a number of different temperatures to preferentially pump different species of gas at those temperatures. A gas analyzer is used to automatically control the temperature of the getter pump to control the species of gasses that are pumped from the chamber.

Abstract: A denuded zone DZ least liable to generate defects is formed in a surface layer zone 12 of a semiconductor wafer 10. In an inner layer zone 18 of the semiconductor wafer 10, micro defects BMD for gettering of impurity metal are made. In the inner layer zone 18, the precipitation of oxygen decreases with the depth. As a result, mechanical strength can be maintained while improving the gettering performance of impurity metal.

Abstract: There is disclosed a method for producing an epitaxial silicon single crystal wafer comprising the steps of growing a silicon single crystal ingot wherein nitrogen is doped by Czochralski method, slicing the silicon single crystal ingot to provide a silicon single crystal wafer, and forming an epitaxial layer in the surface layer portion of the silicon single crystal wafer. There can be manufactured easily and in high productivity an epitaxial silicon monocrystal wafer which has high gettering capability when a substrate having a low boron concentration is used, a low concentration of heavy metal impurity, and an excellent crystallinity.

Abstract: To provide a method of removing a catalyst element from a crystalline silicon film obtained by solid phase growth using the catalyst element promoting crystallization, phosphorus is implanted selectively to the crystalline silicon film having the catalyst element whereby a portion of the silicon film implanted with phosphorus is made amorphous, and when a thermal annealing treatment is performed and the silicon film is heated, the catalyst element is moved to an amorphous portion implanted with phosphorus having large gettering capacity by which the concentration of the catalyst element in the silicon film is lowered and a semiconductor device is fabricated by using the silicon film.

Abstract: In a method of manufacturing a semiconductor device, nickel elements 404 is held on a surface of an amorphous silicon film 403 in a contact manner, and then transformed into a crystalline silicon film 405 through a heat treatment. Thereafter a mask 406 is formed to conduct doping with phosphorus, In this process, a region 407 is doped with phosphorus. Then, the region 407 which has been doped with phosphorus is activated by the irradiation of a laser beam or an intense light. Then, a heat treatment is conducted on the layer again to getter nickel in the region 407. Subsequently, the region 407 into which nickel is concentrated is removed so nickel is gettered, to obtain a region 408 having still higher crystallinity.

Abstract: In producing TFT by crystallizing an amorphous silicon film by the action of nickel, the influence of nickel on the TFT produced is inhibited. A mask 104 is formed over an amorphous silicon film 102, and a nickel-containing solution is applied thereover. In that condition, nickel is kept in contact with the surface of the amorphous silicon film at the opening 103 of the mask. Then, this is heated to crystallize the amorphous silicon film. Next, a phosphorus-containing solution is applied thereto, so that phosphorus is introduced into the silicon film in the region of the opening 103. This is again heated, whereby nickel is gettered in the region into which phosphorus has been introduced. In this process, the nickel concentration in the silicon film is reduced.

Abstract: A method for manufacturing silicon substrates having gettering capability that results in a low complexity manufacturing with a corresponding reduction in the cost of production. The first embodiment of the invention involves the use of a silicon nitride layer as a mask in the etching of the silicon substrate to form the damaged layer. The second embodiment of the invention makes use of a first pad oxide layer as a mask in the etching of the silicon substrate to form the damaged layer. Hence, a single-face etching rather than double-face etching of the silicon substrate is used in the formation of the damaged layer in this invention, so there is no need for the performance of mirror processing operations before subsequent processes.

Abstract: In one aspect, the invention includes a semiconductor processing method of forming a contact between two electrically conductive materials comprising: a) forming a first conductive material over a substrate, the first conductive material being capable of being oxidized in the presence of oxygen to an insulating material; b) sputter cleaning the first conductive material in the presence of oxygen in a gaseous phase and in the presence of an oxygen gettering agent; and c) forming a second conductive material in electrical contact with the first conductive material.

Abstract: Catalytic elements such as Ni are intentionally combined with defects that remain inside of a semiconductor substrate or thin film so that the energy state of the defects comes to a stable state. In this state, a heat treatment is conducted in an atmosphere containing halogen element or XV element, and gettering is conducted in such a manner that the catalytic element is taken in an oxide film. The bonds which are divided by separating the catalytic element are recombined through a heat treatment, thereby being capable of improving crystalline property of the semiconductor substrate or thin film remarkably.

Abstract: In one aspect, the invention pertains to a method of forming a gettering region within an Si semiconductor wafer, the method including: a) providing a semiconductor material wafer; b) providing a background region within the semiconductor material wafer, the background region being doped with a first-type conductivity enhancing dopant, the first-type conductivity enhancing dopant being either n-type or p-type; c) implanting a second-type conductivity enhancing dopant into the background region to form a second-type implant region entirely contained within the background region, the second-type conductivity enhancing dopant being of an opposite type than the first-type conductivity enhancing dopant of the background region; and d) implanting a neutral-conductivity-type conductivity enhancing dopant into the second-type implant region to form a metals gettering damage region entirely contained within the second-type implant region. The invention also pertains to gettering region structures.

Abstract: A first embodiment of the present invention introduces a method to cure mobile ion contamination in a semiconductor device during semiconductor processing by the steps of: forming active field effect transistors in a starting substrate; forming a first insulating layer over the field effect transistor and the field oxide; forming a second insulating layer over the first insulating layer; and performing an annealing step in a nitrogen containing gas ambient prior to exposing the insulating layer to mobile ion impurities. A second embodiment teaches a method to cure mobile ion contamination during semiconductor processing by annealing an insulating layer in a nitrogen containing gas ambient prior to exposing said insulating layer to mobile ion impurities.

Abstract: Disclosed are a packaging component for packaging a microelectronic (e.g., III-V semiconductor) device, the packaged microelectronic device formed using such component, and method for forming the package component and packaged microelectronic device. The component (which can be, e.g., a lid or container 21 of the package) has sequentially deposited layers of metal layers (37, 50), to be located within the package, attached to a housing member, to act as a hydrogen getter in the package. The sequentially deposited layers of metal layers includes at least a first layer (3) of Ni adjacent the housing member surface, to improve adherence of the sequentially deposited layers and interstitially trap hydrogen; an outermost layer (11) of palladium to convert molecular hydrogen to hydrogen atoms and as the primary absorber of the hydrogen; and a layer (9) of Ti or Zr adjacent this outermost layer and acting as a secondary absorber of the hydrogen.

Abstract: A process is disclosed for producing non-evaporable getter materials having high porosity and improved gas sorption rates. The process includes mixing together a metallic getter element, a getter alloy and a solid organic compound, all three components being in the form of powders having specific particle sizes. The mixture is subjected to a compression of less than about 1000 kg/cm.sup.2 and is sintered at a temperature between about 900.degree. C. and about 1200.degree. C. for a period between about 5 minutes and about 60 minutes. The getter material thus obtained is used to produce getter bodies shaped as pellets, sheets or discs having better mechanical strength than similar bodies of other getter material having comparable porosity.

Abstract: The present invention provides a method for manufacturing a semiconductor device on a substrate. The process involves denuding the substrate by heating to create a denuded zone within the substrate. A screen oxide layer is formed prior to implanting ions into the substrate. This oxide layer remains during the implantation step. The screen oxide layer is removed when forming gates for the semiconductor device.

Abstract: A fabrication method of a semiconductor device capable of effective gettering treatment even when electronic elements are further miniaturized and further integrated and a semiconductor substrate or wafer is upsized. First, a single-crystal silicon substrate having a p-type gettering layer in its interior is prepared. Transistors are formed at the main surface of the substrate. An interlayer dielectric layer is formed to cover the transistors. Contact holes are formed in the interlayer dielectric layer to uncover specific positions of the respective transistors. The substrate is rapidly heated to a first temperature of 700.degree. C. to 850.degree. C. at a heating rate. The substrate is gradually cooled from the first temperature to a second temperature of approximately 600.degree. C. at a cooling rate. Metallic wiring lines are formed on the interlayer dielectric layer to electrically connected to the respective transistors through the corresponding contact holes.

Abstract: A method for reducing the formation of watermarks includes providing a semiconductor wafer and contacting the semiconductor wafer with a solution containing a watermark reducing amount of at least one cationic surfactant.

Abstract: A method of manufacturing a semiconductor wafer in a chamber having a chuck and in which temperature changes in the chamber cause residual manufacturing materials to fall onto the surface of a production wafer placed on the chuck. When the temperature of the chamber is to be changed, a protection wafer is placed on the surface of the chuck. When the temperature has been changed, the protection wafer is removed from the surface of the chuck and a production wafer is placed on the surface of the chuck and clamped. When the process is complete the production wafer is removed and the protection wafer is placed on the chuck.

Abstract: A method of removing metallic impurities diffused in a semiconductor substrate, comprising, the semiconductor-substrate-heating step of heating a semiconductor substrate to at least 200.degree. C. or higher and promoting the release and rediffusion of metallic impurities diffused in the semiconductor substrate, and the metallic-impurity-removing step of dissolving the metallic impurities arrived at the surface of the semiconductor substrate with a chemical agent and removing them from the substrate.

Abstract: In one aspect, the invention pertains to a method of forming a gettering region within an Si semiconductor wafer, the method including: a) providing a semiconductor material wafer; b) providing a background region within the semiconductor material wafer, the background region being doped with a first-type conductivity enhancing dopant, the first-type conductivity enhancing dopant being either n-type or p-type; c) implanting a second-type conductivity enhancing dopant into the background region to form a second-type implant region entirely contained within the background region, the second-type conductivity enhancing dopant being of an opposite type than the first-type conductivity enhancing dopant of the background region; and d) implanting a neutral-conductivity-type conductivity enhancing dopant into the second-type implant region to form a metals gettering damage region entirely contained within the second-type implant region. The invention also pertains to gettering region structures.

Abstract: On the back side of a base body, three layers of polysilicon layer are formed. These polysilicon layers contain boron. A boron concentration C.sub.B(1), C.sub.B(2) and C.sub.B(3) of the first, second and third polysilicon layers from the base body side have a relationship of C.sub.B(1) .ltoreq.C.sub.B(2) .ltoreq.C.sub.B(3). On the other hand, between the polysilicon layers, silicon oxide layers are formed respectively. Upon fabrication of a semiconductor device, at first, a gettering heat treatment is effected for the substrate under a given condition. Thus, contaminating impurity is captured at the grain boundary of polysilicon layers formed on the back side of the base body. Next, the polysilicon formed at the most back side is removed by etching. By this, contaminated impurity is removed from the semiconductor substrate.

Abstract: A getter pump module includes a number of getter disks provided with axial holes, and a heating element which extends through the holes to support and heat the getter disks. The getter disks are preferably solid, porous, sintered getter disks that are provided with a titanium hub that engages the heating element. A thermally isolating shield is provided to shield the getter disks from heat sources and heat sinks within the chamber, and to aid in the rapid regeneration of the getter disks. In certain embodiments of the present invention the heat shields are fixed, and in other embodiments the heat shield is movable. In one embodiment, a focus shield is provided to reflect thermal energy to the getter material from an external heater element and provide high pumping speeds. An embodiment of the present invention also provides for a rotating getter element to enhance getter material utilization.