Abstract: A method for processing a semiconductor substrate to form a denuded zone therein. The method includes providing a semiconductor substrate having an oxygen concentration in a region of the substrate adjacent to a surface of such substrate. A trench is formed in the surface of the substrate. Subsequent to the formation of the trench, reducing the oxygen concentration within the region.

Abstract: A process is described for treating damaged surfaces of a low dielectric constant organo silicon oxide insulation layer of an integrated circuit structure to inhibit absorption of moisture which comprises treating such damaged surfaces of said organo silicon oxide insulation layer with a hydrogen plasma. The treatment with hydrogen plasma causes hydrogen to bond to silicon atoms with dangling bonds in the damaged surface of the organo silicon oxide layer to replace organic material severed from such silicon atoms at the damaged surface, whereby absorption of moisture in the damaged surface of the organo silicon oxide layer, by bonding of such silicon dangling bonds with moisture, is inhibited.

Abstract: A process is disclosed for producing non-evaporable getter materials having high porosity and improved gas absorption rates. The process includes mixing together a metallic getter element, a getter alloy and a solid organic compound, all three components being in the form of powders having specific particle sizes. The mixture is subjected to a compression of less than about 1000 kg/cm.sup.2 and is sintered at a temperature between about 900.degree. C. and about 1200.degree. C. for a period between about 5 minutes and about 60 minutes. The getter material thus obtained is used to produce getter bodies shaped as pellets, sheets or discs having better mechanical strength than similar bodies of other getter material having comparable porosity.

Abstract: The present invention provides the broad concept of increasing product performance and reliability by causing the ion contaminants to migrate to a region of the semiconductor film and removing that region (containing a concentration of the ion contaminants), thus reducing a total concentration of the ion contaminants in the semiconductor film. Since a concentration of ion contaminants may adversely affect performance and reliability of devices manufactured from semiconductor films having the ion contaminants, the present invention removes the ion contaminants to alleviate performance and reliability problems associated with the presence of the ion contaminants.

Abstract: To dry semiconductor substrates, especially silicon wafers subsequent to rinsing after etching, the substrate is exposed to the action of radiation which contains an IR portion and a UV portion, the IR portion being greater than the UV portion. The IR-UV radiation quickly dries the substrate and prevents contamination of the substrate with undesirable particles or limits it to a nondisruptive degree. To execute drying with IR-UV radiation, an arrangement is proposed in which the substrate is moved through directly from the treatment liquid (rinsing medium) between two rod-shaped radiators which emit IR-UV radiation.

Abstract: Crochralski wafers are desirably thermally processed at an elevated temperature prior to integrated circuit fabrication. The thermal processing reduces the number of oxygen nucleation centers and prevents subsequent oxygen precipitation from interfering with iron contamination measurements.

Abstract: Disclosed is an improved CMOS fabrication method that allows an implanted well in a bare silicon wafer to be simultaneously, driven annealed and denuded in a single process step. More specifically, a single step drive-anneal-denude (DAD) process is accomplished using a non-inert ambient environment. The DAD process is accomplished in a combination argon/hydrogen ambient environment. This process causes the silicon wafer to roughen slightly and is followed by an oxidation step, that optionally takes place in a combination argon/oxygen ambient environment to smooth out the silicon surface. The oxidation step may also optionally act as a pad-oxide or screening oxide for subsequent fabrication.

Abstract: In a silicon wafer having a CVD film formed on one main face and having the other main face mirror-polished, the components and/or composition of the CVD film change in the thicknesswise direction of the film. This makes it possible to provide a silicon wafer having a thin film provided on the back surface, which thin film has excellent and persistent gettering capability that can remove a greater variety of types of elements and can prevent autodoping.

Abstract: Two or more processes selected from heat treatment for anihilation of oxygen donors, formation of a gettering region, and formation of a dopant-volatilization-prevention film are simultaneously performed in a common apparatus in accordance with the specifications of silicon wafers to be manufactured. Therefore, productivity can be improved.

Abstract: An insulating layer may be fabricated on a microelectronic substrate by spinning a layer of spin-on-glass (SOG) on a microelectronic substrate and curing the SOG layer by irradiating the SOG layer with an electronic beam. Irradiating may take place simultaneously with heating the substrate to a temperature below about 500.degree. C. An underlying and/or overlying capping layer may also be provided. Alternatively, rather than irradiating the SOG layer, an overlying capping layer may be irradiated.

Abstract: Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel element to an amorphous silicon film 103. Then, after obtaining the crystal silicon film, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. At this time, HCl or the like is added to the atmosphere. A thermal oxide film 106 is formed in this step. At this time, gettering of the nickel element into the thermal oxide film 106 takes place. Next, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.

Abstract: In a method of forming a silicon substrate, a gettering film is formed on a bottom surface of a silicon substrate. An oxygen ion implantation into a top surface of the silicon substrate is carried out at a substrate temperature in the range of 400.degree. C.-700.degree. C. The gettering film is removed from the silicon substrate. The silicon substrate is subjected to a heat treatment at a temperature of not less than 1300.degree. C. for causing a reaction of oxygen and silicon to form a silicon oxide film in the silicon substrate after the gettering film is removed.

Abstract: Fluorination can be used to neutralize transition metal impurities in Si. Fluorine is incorporated into the near-surface region of Si by implantation or annealing in a fluorine containing ambient. Thermal treatments at appropriate temperatures are used to initiate the interdiffusion and reaction between fluorine and metal contaminants. The impurities readily react with fluorine to form a compound or complex, thus significantly reducing the number of mid-gap impurities.

Abstract: A semiconductor device in accordance with the present invention, for example, is a thin film transistor provided on a transparent substrate. The semiconductor device made of a polysilicon film is provided with (1) a semiconductor layer having a source region and a drain region and (2) a gate electrode provided on a region between the source region and the drain region of the semiconductor layer via a gate insulating film. The semiconductor device is further provided with an organic insulating film made of a condensation polymer having an imide ring such that the organic insulating film covers the gate electrode, the source region, and the drain region.

Abstract: With a view to optimizing the donor killing process performed in the semiconductor wafer fabricating process, a heat-treating operation is performed in a thermal furnace above at least 900 .degree. C. for a predetermined time so that growth of the initial oxygen precipitates, induced into the crystal lattices during single-crystal growth, is suppressed.

Abstract: Si melt is prepared in a crucible with a quartz surface, the crucible and a seed crystal are rotated at a relative speed of 30 rpm or more to melt quartz into Si melt, and a Si single crystal ingot is grown to have an interstitial oxygen concentration of about 1.5.times.10.sup.18 atoms/cm.sup.3 or more. A wafer is sliced from the ingot and subjected to a heat treatment in a hydrogen atmosphere at 1200.degree. C. for one hour. Thereafter, a thermal oxide film is formed on the surface of a wafer, and a MOS transistor or capacitor is formed by using this thermal oxide film.

Abstract: A denuded zone DZ least liable to generate defects is formed in a surface layer zone 12 of a semiconductor wafer 10. In an inner layer zone 18 of the semiconductor wafer 10, micro defects BMD for gettering of impurity metal are made. In the inner layer zone 18, the precipitation of oxygen decreases with the depth. As a result, mechanical strength can be maintained while improving the gettering performance of impurity metal.

Abstract: Fabrication of atomic step-free regions on a substrate surface is achieved by first forming a two-dimensional pattern on the substrate. The pattern is preferably a grating comprising an array of troughs or mesas which are separated from one another by a plurality of ridges or trenches. Any atomic steps on the flat top surfaces of the troughs or mesas are moved into barrier regions formed by the ridge or trench sidewalls during a high temperature annealing or deposition step, thereby leaving the flat surfaces of the troughs and mesas free of atomic steps. Structures having step-free regions large enough to accommodate micron sized devices having nanometer sized features are thereby formed.

Abstract: A method of fabricating a semiconductor wafers, which can prevent metal contamination when alkali etching is used. A semiconductor ingot is cut into wafers. The peripheral portion of the sliced wafers is chamfered. The chamfered wafers are then planarized by lapping. The planarized wafers are alkali etched. The alkali etched wafers are subjected to acid washing by using diluted mixed acid solution. The surface of the acid-washed wafers are then polished. The polished wafers are washed again.

Abstract: A device isolation region and a gate oxide film are formed on a front surface of a silicon substrate, with a gate electrode formed on the gate oxide film. Next, an interlayer insulator film is formed on their entire surfaces. Then, polycrystalline silicon film is grown on the rear surface of the silicon substrate. The polycrystalline silicon film is deposited in such a way as to be in contact with the rear surface of the substrate. Then, to permit the polycrystalline silicon film formed at the rear surface of the silicon substrate to getter a pollution heavy metal, a heat treatment is performed for the substrate at a temperature of 500 to 900.degree. C. After this gettering process, an interconnection line is formed on the interlayer insulator film.

Abstract: A getterer structure for dielectrically isolated wafer structures such as bonded wafers. The getterer is a layer of polysilicon along the sidewalls of semiconductor regions isolated from each other by trenches. The polysilicon may be doped. The polysilicon is oxidized and polysilicon deposited to fill voids in the trenches.

Abstract: A process for the preparation of silicon wafers having a non-uniform distribution of oxygen precipitate nucleation centers. Silicon wafers having a controlled distribution of oxygen precipitate nucleation centers are prepared by heating the wafer in a manner to create a temperature gradient across the thickness of the wafer for a period of time. Upon a subsequent oxygen precipitation heat treatment, those regions of the wafer which were rapidly heated to a temperature in excess of about 900.degree. C. will form a denuded zone whereas those regions of the wafer which did not achieve a temperature in excess of about 900.degree. C. during the rapid heating will form oxygen precipitates.

Abstract: A silicon wafer has a polycrystalline silicon film formed on one main surface. The polycrystalline silicon film has a multilayer structure composed of X layers (X is an integer equal to or greater than two) containing <220> oriented components in different proportions. The proportion of the <220> oriented component in the first polycrystalline silicon layer in contact with the silicon wafer is larger than the respective proportions of the <220> oriented components in the second to X-th polycrystalline silicon layers superposed on the first polycrystalline silicon layer. It becomes possible to provide a silicon wafer whose polycrystalline silicon film possesses high gettering capability and in which stress acting on the silicon wafer is decreased.

Abstract: A method for fabricating a semiconductor wafer to reduce the number of processing steps and produce low-cost wafers in a short time is disclosed. The method involves surface grinding both the front surface and back surface of a single-crystal silicon wafer which has been sliced from a rod and chamfered. In the surface grinding step, the size numbers of abrasive grains are larger than #2000 for front surface grinding, and smaller than #600 for back surface grinding. The front surface is then chemical polished as a mirror surface which satisfies the requirement of a later photolithography step. Moreover, a deformation layer formed on the back surface of the semiconductor wafer is partially etched and left to provide an extrinsic gettering function. An epitaxial layer can be formed on the front surface to make the wafer an epitaxial wafer. The method of the present invention requires fewer process steps as compared with conventional methods, thereby reducing manufacturing time and cost.

Abstract: An improved method of silicon wafer fabrication suitable for either CMOS and/or NMOS process flows. The present method utilizes few processing steps to reduce fabrication costs and enhance wafer throughput. The improved method combines sacrificial oxide growth and removal steps of CMOS and NMOS front end pre-oxide steps with existing pad oxide growth and removal steps, resulting in fewer required operations. The thermal cycles required to form gettering sites within Cz bulk silicon wafers are retained, thus allowing the number of required processing operations to be reduced without negatively impacting existing levels of expected production yields.

Abstract: In one aspect, the invention pertains to a method of forming a gettering region within an Si semiconductor wafer, the method including: a) providing a semiconductor material wafer; b) providing a background region within the semiconductor material wafer, the background region being doped with a first-type conductivity enhancing dopant, the first-type conductivity enhancing dopant being either n-type or p-type; c) implanting a second-type conductivity enhancing dopant into the background region to form a second-type implant region entirely contained within the background region, the second-type conductivity enhancing dopant being of an opposite type than the first-type conductivity enhancing dopant of the background region; and d) implanting a neutral-conductivity-type conductivity enhancing dopant into the second-type implant region to form a metals gettering damage region entirely contained within the second-type implant region. The invention also pertains to gettering region structures.

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces and including a denuded zone, in which an oxygen concentration is lower than that in an inner portion of the semiconductor substrate and which does not include a bulk microdefect, and an intrinsic gettering zone, and element region formed on the first surface of the semiconductor substrate, and an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, and formed directly on at least a portion of the intrinsic gettering region or the denuded zone entirely or partially thinned of the second main surface of the semiconductor substrate.

Abstract: Significant reduction in the cost of fabrication of shallow junction, Schottky or similar semiconductor devices without sacrifice of functional characteristics, while at the same time achieving the advantages is achieved, after the non-polishing cleaning step is essentially performed, by subjecting the substrate to conditions which move disadvantageous factors within said substrate into a space substantially at said surface, followed by substantially removing said factor-containing space from said substrate chemical removal step, followed etching and vapor deposition steps. Although these new steps add time, and therefore cost, to the overall process, the devices under discussion when produced by known industry processes require yet more time, and involve yet more expense, so that the total process represents a substantial reduction in the cost of their manufacture while producing devices which are the equivalent or superior in electrical performance to such devices which are made by known industry processes.

Abstract: A method of reclaiming a substrate wafer and a reclaimed substrate wafer. A semiconductor wafer having external layers from previous processing is reclaimed by etching the external layers and cup-wheel grinding an active surface of the wafer to remove semiconductor components such as diffused regions. Either the active surface or the backside of the wafer is then polished to a mirror finish to provide a highly crystalline surface. The cup-wheel grinding produces a pinwheel surface roughness pattern and is accomplished by grinding the wafer with a cup-shaped grinding wheel having an axis of rotation parallel to but offset from an axis of rotation of the wafer. Preferably, the rim of the cup-shaped grinding wheel always passes over the axis of rotation of the wafer.