Abstract: A tight confinement nanocrystal comprises a homogeneous center region having a first composition and a smoothly varying region having a second composition wherein a confining potential barrier monotonically increases and then monotonically decreases as the smoothly varying region extends from the surface of the homogeneous center region to an outer surface of the nanocrystal. A method of producing the nanocrystal comprises forming a first solution by combining a solvent and at most two nanocrystal precursors; heating the first solution to a nucleation temperature; adding to the first solution, a second solution having a solvent, at least one additional and different precursor to form the homogeneous center region and at most an initial portion of the smoothly varying region; and lowering the solution temperature to a growth temperature to complete growth of the smoothly varying region.

Abstract: A semiconductor light emitting device includes a first conductive clad layer that is group III-V semiconductor mixed crystal, an active layer, and a second conductive clad layer. The second conductive clad layer has a laminated structure of at least three layers including a first layer, a second layer, and a third layer disposed in this order closer to the active layer. The second layer and the third layer are included in a striped ridge, and the second layer is positioned at a skirt of the ridge. The surface of the first layer is a flat part at both sides of the ridge. When Al compositions of the first layer, second layer, and third layer are X1, X2, and X3, respectively, the relation X2>X1, X3 is satisfied. When film thicknesses of the first layer, second layer, and third layer are D1, D2, and D3, the relation D2<D3 is satisfied.

Abstract: A method for preparing semiconductor nanocrystals including a core and an overcoating layer is disclosed. According to one aspect of the invention, the method comprises preparing more than one batch of cores comprising a first semiconductor material and having a maximum emission peak within a predetermined spectral region, wherein each batch of cores is characterized by a first excitonic absorption peak at an absorption wavelength and a maximum emission peak at an emission wavelength; selecting a batch of cores from the batches prepared wherein the selected batch is characterized by a difference between the absorption wavelength and the emission wavelength that is less than or equal to 13; and overcoating the cores of the selected batch with a layer comprising a second semiconductor material.

Abstract: Methods for integrating wide-gap semiconductors with synthetic diamond substrates are disclosed. Diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited or formed on a layered structure including at least one layer of gallium nitride, aluminum nitride, silicon carbide, or zinc oxide. The resulting structure is a low stress process compatible with wide-gap semiconductor films, and may be processed into optical or high-power electronic devices. The diamond substrates serve as heat sinks or mechanical substrates.

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved light extraction performance. In the production method, a p cladding layer of p-AlGaN is formed by the MOCVD method on a light-emitting layer at a pressure of 30 kPa and with an Mg concentration of 1.5×1020/cm3. A plurality of regions with a nitrogen polarity is formed in the crystals with a Group III element polarity, and thus the p cladding layer has a hexagonal columnar concave and convex configuration on the surface thereof. Subsequently, a p contact layer of GaN is formed by the MOCVD method, in a film along the concave and convex configuration on the p cladding layer.

Abstract: The inventive concept provides semiconductor laser devices and methods of fabricating the same. According to the method, a silicon-crystalline germanium layer for emitting a laser may be formed in a selected region by a selective epitaxial growth (SEG) method. Thus, surface roughness of both ends of a Fabry Perot cavity formed of the silicon-crystalline germanium layer may be reduced or minimized, and a cutting process and a polishing process may be omitted in the method of fabricating the semiconductor laser device.

Abstract: Methods of fabricating a device having laterally patterned first and second sub-devices, such as subpixels of an OLED, are provided. Exemplary methods may include depositing via organic vapor jet printing (OVJP) a first organic layer of the first sub-device and a first organic layer of the second sub-device. The first organic layer of the first sub-device and the first organic layer of the second sub-device are both the same type of layer, but have different thicknesses. The type of layer is selected from an ETL, an HTL, an HIL, a spacer and a capping layer.

Abstract: A III-nitride semiconductor device which includes a barrier body between the gate electrode and the gate dielectric thereof.

Abstract: A semiconductor light emitting element includes a semiconductor stack part that includes a light emitting layer, a diffractive face that light emitted from the light emitting layer is incident to, convex portions or concave portions formed in a period which is longer than an optical wavelength of the light and is shorter than a coherent length of the light, wherein the diffractive face reflects incident light in multimode according to Bragg's condition of diffraction and transmits the incident light in multimode according to the Bragg's condition of diffraction, and a reflective face which reflects multimode light diffracted at the diffractive face and let the multimode light be incident to the diffractive face again. The semiconductor stack part is formed on the diffractive face.

Abstract: A first electrode, an intrinsic first compound semiconductor layer over the first electrode, a second compound semiconductor layer whose band gap is smaller than that of the first compound semiconductor layer on the first compound semiconductor layer, and a second electrode over the second compound semiconductor layer are provided.

Abstract: A method of manufacturing a p type nitride semiconductor layer doped with carbon in a highly reproducible manner with an increased productivity is provided. The method includes supplying an III-group material gas for a predetermined time period T1, supplying a V-group material gas containing a carbon source for a predetermined time period T2 when a predetermined time period t1 (t1+T2>T1) elapses after the supply of the III-group material gas begins, repeating the step of supplying the III-group material gas and the step of supplying the V-group material gas when a predetermined time period t2 (t1+T2?t2>T1) elapses after the supply of the V-group material gas begins, and thus forming an AlxGa1-xN semiconductor layer (0<x?1) at a growth temperature of 1190° C.˜1370° C. or a growth temperature at which a substrate temperature is 1070° C.˜1250° C. using a chemical vapor deposition method or a vacuum evaporation method. Nitrogen sites within the semiconductor layer are doped with carbon.

Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.

Abstract: A GaN based LED epitaxial structure and a method for manufacturing the same. The GaN based LED epitaxial structure may include: a substrate; and a GaN based LED epitaxial structure grown on the substrate, wherein the substrate is a substrate containing a photoluminescence fluorescent material. The photoelectric efficiency of the LED epitaxial structure is enhanced and the amount of heat generated from a device is reduced by utilizing a rare earth element doped Re3Al5O12 substrate; since the LED epitaxial structure takes a fluorescence material as a substrate, a direct white light emission may be implemented by such an LED chip manufactured by the epitaxial structure, so as to simplify the manufacturing procedure of the white light LED light source and to reduce production cost. The defect density of the epitaxial structure is reduced by firstly epitaxial growing, patterning the substrate and then laterally growing a GaN based epitaxial structure.

Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting layer and a first semiconductor layer. The first semiconductor layer is arranged with the light emitting layer in a first direction. The first semiconductor layer includes a first portion and a second portion. The first portion and a second portion include a nitride semiconductor. The first portion has a first lattice polarity. The second portion has a second lattice polarity different from the first lattice polarity.

Abstract: A method for manufacturing a deep isolation trench (221) and a method for manufacturing a high-voltage LED chip. Steps of the method for manufacturing a deep isolation trench (221) are as follows: forming a mask layer (202) on a substrate (200), and forming, in the mask layer, through etching, multiple windows (204) isolated from each other, the bottom of each window exposing the substrate; with epitaxial lateral overgrowth, forming an epitaxial structure (212) inside each window and a part of the mask layer around the window, respectively, each epitaxial structure having a trapezoidal cross section with a long bottom and a short top, and a gap between adjacent epitaxial structures forming a first deep trench (214); etching each epitaxial structure, forming a first shoulder (218) and a second shoulder (221) at both sides of each epitaxial structure, respectively, and forming a deep isolation trench above the mask layer between the adjacent epitaxial structures.

Abstract: Disclosed herein is a semiconducting nanoparticle comprising a one-dimensional semiconducting nanoparticle having a first end and a second end; where the second end is opposed to the first end; and two first endcaps, one of which contacts the first end and the other of which contacts the second end respectively of the one-dimensional semiconducting nanoparticle; where the first endcap that contacts the first end comprises a first semiconductor and where the first endcap extends from the first end of the one-dimensional semiconducting nanoparticle to form a first nanocrystal heterojunction; where the first endcap that contacts the second end comprises a second semiconductor; where the first endcap extends from the second end of the one-dimensional semiconducting nanoparticle to form a second nanocrystal heterojunction; and where the first semiconductor and the second semiconductor are chemically different from each other.

Abstract: A method for manufacturing an epitaxial wafer for a light emitting diode (LED) is provided. The method may comprise: forming a back coating layer on a back surface of a substrate; forming a buffer layer on a top surface of the substrate; forming an N-type semiconductor layer on the buffer layer; forming a multi-quantum well layer on the N-type semiconductor layer; and forming a P-type semiconductor layer on the multi-quantum well layer. An epitaxial wafer and a method for manufacturing an LED chip are also provided.

Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.

Abstract: A method for manufacturing a nitride based single crystal substrate and a method for manufacturing a nitride based semiconductor device. The method for manufacturing the nitride based single crystal substrate includes forming a nitride based single crystal layer on a preliminary substrate; forming a polymer support layer by applying a setting adhesive material having flowability on the upper surface of the nitride based single crystal layer and hardening the applied adhesive material; and separating the nitride based single crystal layer from the preliminary substrate by irradiating a laser beam onto the lower surface of the preliminary substrate. The method for manufacturing the nitride based single crystal substrate is applied to the manufacture of a nitride based semiconductor device having a vertical structure.

Abstract: There is herein described light generating electronic components with improved light extraction and a method of manufacturing said electronic components. More particularly, there is described LEDs having improved light extraction and a method of manufacturing said LEDs.

Abstract: A barrier infrared detector with absorber materials having selectable cutoff wavelengths and its method of manufacture is described. A GaInAsSb absorber layer may be grown on a GaSb substrate layer formed by mixing GaSb and InAsSb by an absorber mixing ratio. A GaAlAsSb barrier layer may then be grown on the barrier layer formed by mixing GaSb and AlSbAs by a barrier mixing ratio. The absorber mixing ratio may be selected to adjust a band gap of the absorber layer and thereby determine a cutoff wavelength for the barrier infrared detector. The absorber mixing ratio may vary along an absorber layer growth direction. Various contact layer architectures may be used. In addition, a top contact layer may be isolated into an array of elements electrically isolated as individual functional detectors that may be used in a detector array, imaging array, or focal plane array.

Abstract: A group III nitride compound semiconductor light emitting device that inhibits occurrence of dislocation in a strain relaxation layer in forming a group III nitride compound semiconductor layer on a thin GaN substrate, and a method for producing the same are provided. A light emitting device 100 comprises a support substrate 10, a GaN substrate 20, an n-type contact layer 30, a strain relaxation layer 40 (n-type InGaN layer), a light emitting layer 50, a p-type clad layer 60, and a p-type contact layer 70. The GaN substrate 20 has a thickness in a range of from 10 nm to 10 ?m. The strain relaxation layer 40 (n-type InGaN layer) has an In composition ratio X in a range of from larger than 0 to 3%.

Abstract: A method for making light emitting diode includes following steps. A substrate having an epitaxial growth surface is provided. A first semiconductor layer, an active layer, and a second semiconductor layer are epitaxially grown on the epitaxial growth surface of the substrate in that sequence. A cermet layer is formed on the second semiconductor layer. A first electrode is applied to electrically connected to the first semiconductor layer. A second electrode is applied to electrically connected to the second semiconductor layer.

Abstract: An epitaxial structure for a III-Nitride based optical device, comprising an active layer with anisotropic strain on an underlying layer, where a lattice constant and strain in the underlying layer are partially or fully relaxed in at least one direction due to a presence of misfit dislocations, so that the anisotropic strain in the active layer is modulated by the underlying layer.

Abstract: A light emitting diode (LED) comprises a substrate, an epitaxial layer and an aluminum nitride (AlN) layer sequentially disposed on the substrate. The AlN layer comprises a plurality of stacks separated from each other, wherein the epitaxial layer entirely covers the plurality of stacks of the AlN layer. The AlN layer with a plurality of stacks reflects upwardly light generated by the epitaxial layer and downwardly toward the substrate to an outside of LED through a top plan of the LED. A method for forming the LED is also disclosed.

Abstract: A light emitting device includes a p-side, an n-side, and an active layer between the p-side and the n-side. The p-side includes a p-side contact, an electron blocking layer, a p-side separate confinement heterostructure (p-SCH), and a p-cladding/current spreading region disposed between the p-SCH and the p-side contact. The n-side includes an n-side contact, and an n-side separate confinement heterostructure (n-SCH). The active layer is configured to emit light in a wavelength range, wherein the p-side and the n-side have asymmetrical optical transmission properties with respect to the wavelength range emitted by the active layer.

Abstract: Provided are an epitaxial wafer and a light-emitting element having a type-II MQW formed of III-V compound semiconductors and configured to emit light with a sufficiently high intensity. The method includes a step of growing an active layer having a type-II multi-quantum well structure (MQW) on a III-V compound semiconductor substrate, wherein, in the step of forming the type-II multi-quantum well structure, the type-II multi-quantum well structure is formed by metal-organic vapor phase epitaxy using only metal-organic sources such that a number of pairs of the type-II multi-quantum well structure is 25 or more.

Abstract: Various embodiments of SST dies and solid state lighting (“SSL”) devices with SST dies, assemblies, and methods of manufacturing are described herein. In one embodiment, a SST die includes a substrate material, a first semiconductor material and a second semiconductor material on the substrate material, an active region between the first semiconductor material and the second semiconductor material, and a support structure defined by the substrate material. In some embodiments, the support structure has an opening that is vertically aligned with the active region.

Abstract: A method of manufacturing an LED chip includes: providing a laminated structure with a nanoimprinted material coated thereon; providing an imprinted mold with a patterned structure for pressing and curing the nanoimprinted material, removing the imprinted mold, etching the nanoimprinted material and the laminated structure; and forming electrodes on the etched laminated structure. An LED chip is also provided.

Abstract: A method for forming a light emitting device includes forming a monocrystalline III-V emissive layer on a monocrystalline substrate and forming a first doped layer on the emissive layer. A first contact is deposited on the first doped layer. The monocrystalline substrate is removed from the emissive layer by a mechanical process. A second doped layer is formed on the emissive layer on a side from which the substrate has been removed. The second doped layer has a dopant conductivity opposite that of the first doped layer. A second contact is deposited on the second doped layer.

Abstract: The present invention relates to colloidal quantum dots, to a process for producing such colloidal quantum dots, to the use thereof and to optoelectronic components comprising colloidal quantum dots.

Abstract: A light-emitting diode chip comprising:—a semiconductor body (1) having a plurality of active regions (2), wherein—at least one of the active regions (2) has at least two subregions (21 . . . 28),—the active region (2) has at least one barrier region (3) arranged between two adjacent subregions (21 . . . 28) of said at least two subregions (21 . . . 28),—the at least two subregions (21 . . . 28) emit light of mutually different colour during operation of the light- emitting diode chip,—in at least one of the subregions (21 . . . 28) the emission of light is generated electrically, and—the barrier region (3) is configured to hinder a thermally activated redistribution of charge carriers between the two adjacent subregions (21 . . . 28), is specified.

Abstract: Fabrication of a photonic integrated circuit (PIC) including active elements such as a semiconductor optical amplifier (SOA) and passive elements such as a floating rib waveguide. Selective area doping through ion implantation or thermal diffusion before semiconductor epitaxial growth is used in order to define the contact and lateral current transport layers for each active device, while leaving areas corresponding to the passive devices undoped. InP wafers are used as the substrate which may be selectively doped with silicon.

Abstract: A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer and extends into the interstitial voids.

Abstract: The invention relates to light-emitting devices; in particular, to highly effective light-emitting diodes on the base of nitrides of III group elements of the periodic system. The light-emitting device includes a substrate, a buffer layer formed on the substrate, a first layer from n-type semiconductor formed on the buffer layer, a second layer from p-type semiconductor and an active layer arranged between the first and second layers. The first, second and active layers form interlacing of the layers with zinc blend phase structure and layers with wurtzite phase structure forming heterophase boundaries therebetween. Technical result of the invention is increasing the effectiveness (efficiency) of the light-emitting device at the expense of heterophase boundaries available in the light-emitting device which allow to eliminate formation of the potential wells for holes, to increase the uniformity of the hole distribution in the active layer and to ensure suppression of nonradiative Auger recombination.

Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.

Abstract: A method of producing an optoelectronic semiconductor chip includes providing a growth substrate, producing a III nitride nucleation layer on the growth substrate by sputtering, wherein a material of the growth substrate differs from a material of the nucleation layer, and growing a III nitride semiconductor layer sequence having an active layer onto the nucleation layer.

Abstract: Disclosed is a light emitting element, which emits light with small power consumption and high luminance. The light emitting element has: a IV semiconductor substrate; two or more core multi-shell nanowires disposed on the IV semiconductor substrate; a first electrode connected to the IV semiconductor substrate; and a second electrode, which covers the side surfaces of the core multi-shell nanowires, and which is connected to the side surfaces of the core multi-shell nanowires. Each of the core multi-shell nanowires has: a center nanowire composed of a first conductivity type III-V compound semiconductor; a first barrier layer composed of the first conductivity type III-V compound semiconductor; a quantum well layer composed of a III-V compound semiconductor; a second barrier layer composed of a second conductivity type III-V compound semiconductor; and a capping layer composed of a second conductivity type III-V compound semiconductor.

Abstract: Methods and apparatus provide for a structure, including: a first glass material layer; and a second material layer bonded to the first glass material layer via bonding material, where the bonding material is formed from one of glass frit material, ceramic frit material, glass ceramic frit material, and metal paste, which has been melted and cured.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type first semiconductor layer, a p-type second semiconductor layer and a light emitting layer. The light emitting layer is provided between the first and second semiconductor layers, and includes a plurality of barrier layers including a nitride semiconductor and a well layer provided between the barrier layers and including a nitride semiconductor containing In. The barrier layers and the well layer are stacked in a first direction from the second semiconductor layer toward the first semiconductor layer. The well layer has a p-side interface part and an n-side interface part. Each of the p-side and the n-side interface part include an interface with one of the barrier layers. A variation in a concentration of In in a surface perpendicular to the first direction of the p-side interface part is not more than that of the n-side interface part.

Abstract: A top-down method of fabricating vertically aligned Group III-V micro- and nanowires uses a two-step etch process that adds a selective anisotropic wet etch after an initial plasma etch to remove the dry etch damage while enabling micro/nanowires with straight and smooth faceted sidewalls and controllable diameters independent of pitch. The method enables the fabrication of nanowire lasers, LEDs, and solar cells.

Abstract: The present invention relates to a light emitting device. The light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, a light emitting device comprises a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane.

Abstract: A vertical stack including a p-doped GaN portion, a multi-quantum-well, and an n-doped GaN portion is formed on an insulator substrate. The p-doped GaN portion may be formed above, or below, the multi-quantum-well. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a top surface of the p-doped GaN portion. A selective low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material on the physically exposed surfaces of the p-doped GaN portion, thereby forming an elemental semiconductor material portion. Metallization is performed on a portion of the elemental semiconductor material portions to form an electrical contact structure that provides effective electrical contact to the p-doped GaN portion through the elemental semiconductor material portion.

Abstract: Phosphors formed using silicon nanoparticles are provided. The phosphors exhibit bright fluorescence and high quantum yield, making them ideal for lighting applications. Methods for making the silicon phosphors are also provided, along with lighting devices that incorporate the silicon phosphors.

Abstract: A vertical stack including a p-doped GaN portion, a multi-quantum-well including indium gallium nitride layers, and an n-doped transparent conductive material portion is formed on an insulator substrate. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a surface of the p-doped GaN portion. A selective low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material on the physically exposed surfaces of the p-doped GaN portion, thereby forming an elemental semiconductor material portion. The selective low temperature epitaxy process can be performed at a temperature lower than 600° C., thereby limiting diffusion of materials within the multi-quantum well and avoiding segregation of indium within the multi-quantum well. The light-emitting diode can generate a radiation of a wide range including blue and green lights in the visible wavelength range.

Abstract: A light-emitting device comprises a first semiconductor layer; a second semiconductor layer; an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electron blocking layer formed between the first semiconductor layer and the active layer; and a second electron blocking layer formed between the second semiconductor layer and the active layer, wherein the thickness of the second electron blocking layer is not equal to that of the first electron blocking layer, and/or the band gap energy of the second electron blocking layer is not equal to that of the first electron blocking layer.

Abstract: A nitride semiconductor light-emitting device is formed of an n-type nitride semiconductor layer, a trigger layer, a V-pit expanding layer, a light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The light-emitting layer has a V-pit formed therein. The trigger layer is made of a nitride semiconductor material having a lattice constant different from that of a material that forms an upper surface of the n-type nitride semiconductor layer. The V-pit expanding layer is made of a nitride semiconductor material having a lattice constant substantially identical to that of the material that forms the upper surface of the n-type nitride semiconductor layer, and the V-pit expanding layer has a thickness of 5 nm or more and 5000 nm or less.

Abstract: A nitride semiconductor device includes a semiconductor substrate and a nitride semiconductor layer disposed on the semiconductor substrate. The semiconductor substrate includes a normal region, a carrier supplying region, and an interface current blocking region. The interface current blocking region surrounds the normal region and the carrier supplying region. The interface current blocking region and the carrier supplying region include impurities. The carrier supplying region has a conductivity type allowing the carrier supplying region to serve as a source of carriers supplied to or a destination of carriers supplied from a carrier layer generated at an interface between the nitride semiconductor layer and the semiconductor substrate. The interface current blocking region has a conductivity type allowing the interface current blocking region to serve as a potential barrier to the carriers.

Abstract: A method is provided for producing a light-emitting diode. In one embodiment, a series of layers is deposited on the silicon surface of a carrier in a direction of growth and a light-emitting diode structure is deposited on the series of layers. The series of layers includes a GaN layer, which is formed with gallium nitride. The series of layers includes a masking layer, which is formed with silicon nitride. The masking layer follows at least part of the GaN layer in the direction of growth.

Abstract: A method of manufacturing a nitride semiconductor light emitting device includes forming a first conductivity type nitride semiconductor layer. An active layer is formed on the first conductivity type nitride semiconductor layer. A second conductivity type nitride semiconductor layer is formed on the active layer. In the forming of the active layer, quantum well layers and quantum barrier layers are alternatively stacked and at least two dopant layers are formed inside of at least one of the quantum well layers. The dopant layers are doped with a dopant in a predetermined concentration.