Thermally Responsive Patents (Class 438/54)
  • Publication number: 20100213432
    Abstract: A method for forming a phase change memory device is disclosed. A substrate with a bottom electrode thereon is provided. A heating electrode and a dielectric layer are formed on the bottom electrode, wherein the heating electrode is surrounded by the dielectric layer. The heating electrode is etched to form recess in the dielectric layer. A phase change material is deposited on the dielectric layer, filling into the recess. The phase change material is polished to remove a portion of the phase change material exceeding the surface of the dielectric layer and a phase change layer is formed confined in the recess of the dielectric layer. A top electrode is formed on the phase change layer and the dielectric layer.
    Type: Application
    Filed: May 19, 2009
    Publication date: August 26, 2010
    Applicants: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, POWERCHIP SEMICONDUCTOR CORP., NANYA TECHNOLOGY CORPORATION, PROMOS TECHNOLOGIES INC., WINBOND ELECTRONICS CORP.
    Inventors: Jen-Chi Chuang, Ming-Jeng Huang, Chien-Min Lee, Jia-Yo Lin, Min-Chih Wang
  • Publication number: 20100193002
    Abstract: The invention relates to a semiconductor component which contains one semiconductor layer containing germanium. On the rear-side, i.e. on the side orientated away from the incident light, the semiconductor layer has at least one layer containing silicon carbide which serves, on the one hand, for the reflection of radiation and also as rear-side passivation or as diffusion barrier. A method for the production of semiconductor components of this type is likewise described. The semiconductor components according to the invention are used in particular as thermophotovoltaic cells or multiple solar cells based on germanium.
    Type: Application
    Filed: May 14, 2008
    Publication date: August 5, 2010
    Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Frank Dimroth, Jara Fernandez, Stefan Janz
  • Patent number: 7759152
    Abstract: A separated MEMS thermal actuator is disclosed which is largely insensitive to creep in the cantilevered beams of the thermal actuator. In the separated MEMS thermal actuator, a inlaid cantilevered drive beam formed in the same plane, but separated from a passive beam by a small gap. Because the inlaid cantilevered drive beam and the passive beam are not directly coupled, any changes in the quiescent position of the inlaid cantilevered drive beam may not be transmitted to the passive beam, if the magnitude of the changes are less than the size of the gap.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: July 20, 2010
    Assignee: Innovative Micro Technology
    Inventors: Gregory A. Carlson, John S. Foster, Christopher S. Gudeman, Paul J. Rubel
  • Patent number: 7754516
    Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing to be overcome to provide reduced critical dimension elements.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: July 13, 2010
    Inventors: Ming Jin, Ilya V. Karpov, Jinwook Lee, Narahari Ramanuja
  • Patent number: 7754517
    Abstract: A semiconductor layer is prepared in which a silicon substrate, a BOX layer and an SOI layer are laminated in this order. A silicon diode section used as an infrared detection portion is formed in the SOI layer. Further, an isolation portion is formed so as to extend from the SOI layer to a predetermined depth of the silicon substrate via the BOX layer. The isolation portion is formed so as to surround an area in which the silicon diode section is formed, and have the form of a circle or a regular polygon more than a regular pentagon in shape. A protective film is formed on the surface of the SOI layer. Thereafter, etching holes that penetrate the protective film, the SOI layer and the BOX layer are formed. The silicon substrate corresponding to each area surrounded by the isolation portion is etched using the etching holes.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: July 13, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Taikan Iinuma
  • Publication number: 20100173438
    Abstract: A method of manufacturing a thermoelectric converter is provided, wherein an alcohol dispersion liquid comprising a ceramic particle having the average size of 1 to 100 nm and a salt of an element constituting the thermoelectric conversion material is prepared, and thereafter the dispersion liquid is dropped into a solution containing a reducing agent to deposit a raw material particle of the thermoelectric conversion material, which is subsequently subject to heating and sintering.
    Type: Application
    Filed: May 29, 2008
    Publication date: July 8, 2010
    Inventor: Junya Murai
  • Patent number: 7749793
    Abstract: A method of making a Lateral-Moving Micromachined Thermal Bimorph which provides the capability of achieving in-plane thermally-induced motion on a microchip, as opposed to the much more common out-of-plane, or vertical, motion seen in many devices. The present invention employs a novel fabrication process to allow the fabrication of a lateral bimorph in a fundamentally planar set of processes. In addition, the invention incorporates special design features that allow the bimorph to maintain material interfaces.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: July 6, 2010
    Assignee: Morgan Research Corporation
    Inventors: Robert Faye Elliott, Philip John Reiner
  • Patent number: 7749792
    Abstract: The present disclosure is broadly directed to a method for designing new MEMS micro-movers, particularly suited for, but not limited to, CMOS fabrication techniques, that are capable of large lateral displacement for tuning capacitors, fabricating capacitors, self-assembly of small gaps in CMOS processes, fabricating latching structures and other applications where lateral micro-positioning on the order of up to 10 ?m, or greater, is desired. Principles of self-assembly and electro-thermal actuation are used for designing micro-movers. In self-assembly, motion is induced in specific beams by designing a lateral effective residual stress gradient within the beams. The lateral residual stress gradient arises from purposefully offsetting certain layers of one material versus another material. For example, lower metal layers may be side by side with dielectric layers, both of which are positioned beneath a top metal layer of a CMOS-MEMS beam.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: July 6, 2010
    Assignee: Carnegie Mellon University
    Inventors: Gary K. Fedder, Altug Oz
  • Publication number: 20100167444
    Abstract: A method for fabricating thermoelectric device is provided. The method comprises placing a first electrode in a die, forming a first interlayer on an upper surface of the first electrode; positioning a separating plate on an upper surface of the first interlayer to divide an inner space of the die into a plurality of cells, and depositing a first thermoelectric material on the first interlayer within a first fraction of the cells, and depositing a second thermoelectric material on the first interlayer within a second fraction of the cells, sintering the die contents, and removing the separating plate after sintering to obtain a ? shaped thermoelectric device.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 1, 2010
    Inventors: Lidong Chen, Monika Backhaus-Ricoult, Lin He, Xiaoya Li, Xugui Xia, Degang Zhao
  • Publication number: 20100154855
    Abstract: A thermoelectric generator is built into the wall of a heat exchanger by applying coatings of dielectric, electrical conductor and N-type and P-type thermoelectric materials. A tubular heat exchanger lends itself to the application of coatings in annular rings, providing ease of manufacture and a structure that is robust to damage.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 24, 2010
    Inventors: David Nemir, Edward Rubia, Jan Bastian Beck
  • Publication number: 20100155601
    Abstract: An infrared sensor and a method of fabricating the same are provided. The sensor includes a substrate including a reflection layer and a plurality of pad electrodes, an interdigitated sensing electrode connected to the pad electrode and formed to be spaced apart from the reflection layer by a predetermined distance and a sensing layer formed on the sensing electrode and having an opening exposing a portion in which an interdigitated region of the sensing electrode connected to one pad region is separated from the sensing electrode connected to the other pad electrode. Therefore, the sensor has an electrode in a very simple constitution, and a sensing layer divided into rectangular blocks, so that current that non-uniformly flows into the electrode can be removed. Accordingly, the sensor in which current of the sensing layer can be uniformly flown, and noise is lowered can be implemented.
    Type: Application
    Filed: July 29, 2009
    Publication date: June 24, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seong Mok Cho, Ho Jun Ryu, Woo Seok Yang, Sang Hoon Cheon, Byoung Gon Yu, Chang Auck Choi
  • Patent number: 7732244
    Abstract: A method for forming a light-transmitting region comprises providing a support feature. A sacrificial layer is formed over a portion of the support feature, wherein the sacrificial layer comprises an energy-induced swelling material. A light-blocking layer is conformably formed over the support feature to cover the sacrificial layer and the support feature. The support feature, the sacrificial layer, and the light-blocking layer are subjected to an energy source to swell the sacrificial layer until bursting to thereby delaminate a portion of the light-blocking layer from the support feature and leave a light-transmitting region exposed with a portion of the support feature in the light-blocking layer. A gas flow or scrub cleaning force is provided to clean up the light-transmitting region and a top surface of the light-blocking layer remains over the support feature.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 8, 2010
    Assignee: VisEra Technologies Company Limited
    Inventors: Chieh-Yuan Cheng, Tzu-Han Lin, Pai-Chun Peter Zung
  • Publication number: 20100133495
    Abstract: A phase change memory device is provided, including a substrate, a first dielectric layer disposed over the substrate, a first electrode disposed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer, covering the first electrode, a heating electrode disposed in the second dielectric layer, contacting the first electrode, a phase change material layer disposed over the second dielectric layer, contacting the heating electrode, and a second electrode disposed over the phase change material layer. In one embodiment, the heating electrode includes a first portion contacting the first electrode and a second portion contacting the phase change material layer, and the second portion of the heating electrode includes metal silicides and the first portion of the heating electrode includes no metal silicides.
    Type: Application
    Filed: September 2, 2009
    Publication date: June 3, 2010
    Applicant: POWERCHIP SEMICONDUCTOR CORP.
    Inventors: Chien-Min Lee, Ming-Jeng Huang, Jen-Chi Chuang, Jia-Yo Lin, Min-Chih Wang
  • Publication number: 20100129947
    Abstract: In the method of fabricating the variable-resistance memory device, a substrate including a conductive region is provided, and a preliminary lower electrode is formed on the conductive region. A lower electrode is formed by oxidizing an upper portion of the preliminary lower electrode. A phase-change material layer is formed on the lower electrode.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 27, 2010
    Inventors: Hyun-Suk Lee, Tai-Soo Lim, HyunSeok Lim, Insun Park, Jaehyoung Choi
  • Patent number: 7704787
    Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that includes nitrogen atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Horii Hideki, Jeong-hee Park
  • Patent number: 7701023
    Abstract: A TFA (thin film on ASIC) image sensor with stability-optimized photodiode for converting electromagnetic radiation into an intensity-dependent photocurrent. The TFA includes an intermetal dielectric layer, pixel back electrodes, vias, metal contacts, a transparent conductive oxide (TCO) layer, and an intrinsic absorption layer with a thickness between 300 nm and 600 nm. The pixel back electrodes are disposed over the intermetal dielectric layer, which is disposed over the ASIC. The vias connect to the pixel back electrodes and the metal contacts, which are formed in the intermetal dielectric layer. The TCO is disposed above the intrinsic absorption layer, which is disposed above the pixel back electrodes.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 20, 2010
    Assignee: STMicroelectronics N.V.
    Inventors: Peter Rieve, Marcus Walder, Konstantin Seibel, Jens Prima, Arash Mirhamed
  • Patent number: 7695994
    Abstract: A method of forming a layer of material on a sidewall of a via with good thickness control. The method involves forming a layer of material with a conventional deposition process. The material formed on a field region surrounding the via is removed with a sputter etch process. Another layer of material is deposited thereon, wherein the sputter etch-deposition cycle is repeated as necessary to achieve a desired sidewall thickness. With this method, the thickness of the material deposited on the sidewall is linearly dependent on the number of process cycles, thus providing good thickness control. The method may be used to form a resistance variable material, e.g., a phase-change material, on a via sidewall for use in a memory element.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: April 13, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Jun Liu, Keith Hampton
  • Patent number: 7693678
    Abstract: Methods and apparatuses to measure temperatures of integrated circuits are disclosed. New circuit arrangements for measuring temperature using various types of integrated circuit sensor elements are discussed. Embodiments comprise methods and apparatuses arranged to measure temperature based upon current leakage rates of different integrated circuit sensor elements. The methods and apparatuses generally involve using a pulse module to generate a charge for the integrated circuit elements. In these method and apparatus embodiments, one or more elements form a decay module to sense when the voltage decays to a threshold value. The method and apparatus embodiments may also have a module to calculate or infer a temperature from the rate of the voltage decay.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: April 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Zhibin Cheng, Aleksandr Kaplun
  • Publication number: 20100078753
    Abstract: A method for forming a flow sensor having self-supported heat-carrying elements is disclosed. Self-supported heat-carrying elements are capable of operating with higher thermal efficiency, enabling lower power consumption and higher sensitivity, due to a lack of heat loss into a supporting membrane. Self-supported heat-carrying elements facilitate wider operating temperature range and compatibility with harsh media.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Applicant: FLOWMEMS, INC.
    Inventors: Mehran Mehregany, Nelsimar Moura Vandelli, JR.
  • Patent number: 7687302
    Abstract: A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: March 30, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Eric R. Fossum, Sandor L. Barna
  • Patent number: 7679183
    Abstract: Provided are an electronic cooling device and a fabrication method thereof. The method may include forming an insulating layer on a semiconductor substrate, forming first and second silicide layers on the insulating layer, forming separate paired p-type and n-type semiconductors on each of the first and second silicide layers, forming a first interlayer dielectric (ILD) layer on the p-type and n-type semiconductors, exposing top surfaces of the n-type and p-type semiconductors, forming a third silicide layer on one semiconductor on each of the first and second silicide layers, forming a second ILD layer on the third silicide layer, and etching the second and first ILD layers to form contact holes exposing top surfaces of the first and second silicide layers.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: March 16, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Chang Hun Han
  • Patent number: 7674645
    Abstract: An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: March 9, 2010
    Assignee: Neokismet LLC
    Inventors: Anthony C. Zuppero, Jawahar M. Gidwani
  • Patent number: 7670918
    Abstract: Resistor elements are formed by doping impurity into a single crystal film formed on a substrate such as a silicon-on-insulator substrate. A semiconductor device having such resistor elements is used as a detector for detecting an amount of airflow, for example. The impurity density in the single crystal silicon is made lower than 1×1020/cm3 to suppress a resistance change by aging especially at a temperature higher than 310° C. To obtain a high temperature coefficient of the resistor element as well as a low resistance change by aging, the impurity density is set in a range from 4×1019/cm3 to 1×1020/cm3, and more preferably in a range from 7×1019/cm3 to 1×1020/cm3. As the impurity, N-type impurity such as phosphorus or P-type impurity such as boron may be used. It is preferable to use the impurity having a low diffusion coefficient to attain a low resistance change by aging.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: March 2, 2010
    Assignee: DENSO CORPORATION
    Inventors: Yuko Fukami, Ryuichiro Abe
  • Publication number: 20100044704
    Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.
    Type: Application
    Filed: August 20, 2009
    Publication date: February 25, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Barry John Male, Philip L. Hower
  • Publication number: 20100041558
    Abstract: The electromagnetic radiation detection device comprises at least one absorption membrane for absorbing said radiation. The absorption membrane is formed by an absorption layer made of tungsten nitride (W2N) and having a stoichiometric ratio tungsten to nitride equal to two.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 18, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Abdelkader Aliane, Thierry Farjot, Claude Pigot
  • Publication number: 20100005877
    Abstract: A sensor includes: a silicon substrate having a hollow portion, which is arranged on a backside of the substrate; an insulation film disposed on a front side of the substrate and covering the hollow portion; a heater disposed on the insulation film, made of a semiconductor layer, and configured to generate heat; and an anti-stripping film for protecting the insulation film from being removed from the silicon substrate. The silicon substrate, the insulation film and the. semiconductor layer provide a SOI substrate. The hollow portion has a sidewall and a bottom. The anti-stripping film covers at least a boundary between the sidewall and the bottom of the hollow portion.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 14, 2010
    Applicant: DENSO CORPORATION
    Inventors: Ryuichirou Abe, Tsuyoshi Fukada, Keisuke Suzui
  • Publication number: 20100001360
    Abstract: The present invention discloses a gas pendulum style level posture sensing chip and its manufacturing method and a level posture sensor. The gas pendulum style level posture sensing chip includes: a semiconductor substrate; two sets of arm thermosensitive fuses formed on the surface of the semiconductor substrate, each set of the thermosensitive fuses including two thermosensitive fuses in parallel to each other, the two sets of thermosensitive fuses being vertical to each other; electrodes formed at the two ends of the thermosensitive fuses. For the level posture sensing chip and sensor provided by the present invention, the parallelism and verticality of the thermosensitive fuses is high in precision such that the more accurate measurement can be implemented.
    Type: Application
    Filed: December 23, 2008
    Publication date: January 7, 2010
    Inventor: Fuxue Zhang
  • Publication number: 20100001361
    Abstract: Getter structure comprising a substrate and at least one getter material-based layer mechanically connected to the substrate by means of at least one support, in which the surface of the support in contact with the substrate is smaller than the surface of a first face of the getter material layer, in which said first face is in contact with the support, and a second face of the getter material layer, opposite said first face is at least partially exposed.
    Type: Application
    Filed: June 29, 2009
    Publication date: January 7, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Stephane CAPLET, Xavier BAILLIN
  • Patent number: 7638874
    Abstract: A microelectronic package, a method of forming the package and a system incorporating the package. The package includes a substrate; a die bonded to the substrate; and a thermal sensor connected to the substrate.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: December 29, 2009
    Assignee: Intel Corporation
    Inventors: Chia-Pin Chiu, John P. Dirner
  • Patent number: 7638352
    Abstract: The present invention is a method of manufacturing a photoelectric conversion device having a multilayered interconnection (wiring) structure disposed on a semiconductor substrate, including steps of forming a hole in a region of the interlayer insulation film corresponding to an electrode of the transistor; burying an electroconductive substance in the hole; forming a hydrogen supplying film; conducting a thermal processing at a first temperature to supply a hydrogen from the hydrogen supplying film to the semiconductor substrate; forming the multilayered interconnection structure using Cu in a wiring material; and forming a protective film covering the multilayered interconnection structure, wherein the step of forming the multilayered interconnection structure, and the step of forming the protective film are conducted at a temperature not higher than the first temperature.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: December 29, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadashi Sawayama, Takeshi Kojima
  • Publication number: 20090314941
    Abstract: The present invention provides an infrared detecting device capable of improving device characteristics thereof by narrowing the width of each beam portion. The infrared detecting device has an infrared detection portion having a thermoelectric transducing part formed over a semiconductor substrate via an air gap interposed therebetween, and the beam portions which are formed over the semiconductor substrate via the air gap interposed therebetween, support the infrared detection portion and electrically connect between the infrared detection portion and the semiconductor substrate, wherein each of the beam portions has an insulating material film and a conductive material layer exposed from the insulating material film to a side surface of each beam portion.
    Type: Application
    Filed: March 12, 2009
    Publication date: December 24, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Daisuke Inomata
  • Patent number: 7635605
    Abstract: A through hole P of this infrared sensor is formed in a position opposed to an adhesive layer AD. The through hole P, the bottom part thereof and an insulating film Pi formed therein is restrained from being deteriorated and damaged, in order to improve the characteristics of the infrared sensor, since the through hole P and the bottom part thereof are supported by the adhesive layer AD even when a pressure difference is generated between the inside and the outside in the space partitioned by the adhesive layer AD.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: December 22, 2009
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Publication number: 20090275164
    Abstract: Precursors for use in depositing metal-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for depositing Ge2Sb2Te5 chalcogenide thin films in the manufacture of nonvolatile Phase Change Memory (PCM) devices, by deposition techniques such as chemical vapor deposition (CVD) and atomic layer deposition (ALD).
    Type: Application
    Filed: May 1, 2009
    Publication date: November 5, 2009
    Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.
    Inventors: Tianniu Chen, William Hunks, Chongying Xu
  • Patent number: 7595540
    Abstract: A semiconductor device including a package (2) having a plurality of wall portions (9a) and a plurality of conductor portions (4), a semiconductor element such as a solid-state image pickup device (1) mounted in an internal space of the base, thin metal wires (5) electrically connecting the semiconductor element and the conductor portions (4) between the wall portions (9a), a resin sealing material (7) implanted in the spaces between the wall portions (9a), and a closing member such as a cover glass (6). The region for connecting the thin metal wires (5) and the wall portion (9a) region overlap each other, so that the device can be reduced in size and in height. The cover glass (6) can not move easily from the correct position because the wall portions (9a) serve as supporting columns, thereby improving the yield.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: September 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Fukuda, Eizou Fujii, Yutaka Fukai, Yutaka Harada, Kiyokazu Itoi
  • Publication number: 20090236583
    Abstract: The present invention relates to a phase change memory and a method of fabricating a phase change memory. The phase change memory includes a heater structure disposed on a phase change material pattern, wherein the heater structure is in a tapered shape with a bottom portion contacting the phase change material pattern. The fabrication of the phase change memory is compatible with the fabrication of logic devices, and accordingly an embedded phase change memory can be fabricated.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: Chien-Li Kuo, Kuei-Sheng Wu, Yung-Chang Lin
  • Patent number: 7591913
    Abstract: The present invention generally provides methods of improving thermoelectric properties of alloys by subjecting them to one or more high temperature annealing steps, performed at temperatures at which the alloys exhibit a mixed solid/liquid phase, followed by cooling steps. For example, in one aspect, such a method of the invention can include subjecting an alloy sample to a temperature that is sufficiently elevated to cause partial melting of at least some of the grains. The sample can then be cooled so as to solidify the melted grain portions such that each solidified grain portion exhibits an average chemical composition, characterized by a relative concentration of elements forming the alloy, that is different than that of the remainder of the grain.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: September 22, 2009
    Assignees: Massachusetts Institute of Technology, The Trustees of Boston College
    Inventors: Zhifeng Ren, Gang Chen, Shankar Kumar, Hohyun Lee
  • Publication number: 20090230375
    Abstract: A semiconductor device is provided which includes a substrate having a dielectric layer formed thereon, a heating element formed in the dielectric layer, a phase change element formed on the heating element, and a conductive element formed on the phase change element. The phase change element includes a substantially amorphous background and an active region, the active region capable of changing phase between amorphous and crystalline.
    Type: Application
    Filed: March 17, 2008
    Publication date: September 17, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Sheng Liang, Tzyh-Cheang Lee, Fu-Liang Yang
  • Publication number: 20090223548
    Abstract: A thermionic or thermotunneling converter consisting of two electrodes maintained at a desired distance from one another by means of spacers in which the electrodes comprise silicon coated with a hard material, or comprise a ceramic or other refractory material. The spacers are formed by oxidizing one electrode, protecting certain oxidized areas and removing the remainder of the oxidized layer. The protected oxidized areas remain as spacers. These spacers have the effect of maintaining the electrodes at a desired distance without the need for active elements, thus greatly reducing costs.
    Type: Application
    Filed: October 4, 2006
    Publication date: September 10, 2009
    Applicant: BOREALIS TECHNICAL LIMITED
    Inventor: Hans Juergen Walitzki
  • Patent number: 7585692
    Abstract: A thin film layer, a heating electrode, a phase change memory including the thin film layer, and methods for forming the same. The method of forming the thin film layer by atomic layer deposition (ALD) may include injecting a titanium (Ti) source, a nitrogen (N) source, and/or an aluminum (Al) source onto a substrate at different flow rates and for different periods of time. The heating electrode may include a Ti1?xAlxN layer, wherein x is about 0.4<x<0.5 at a first portion of the heating electrode contacting a phase change layer and 0<x<0.1 at other portions of the heating electrode. The phase change memory may include the heating electrode including the Ti1?xAlxN layer, an insulating layer formed on the heating electrode and having a contact hole exposing the heating electrode and the phase change layer contacting the first portion of the heating electrode.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: September 8, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Choong-Man Lee
  • Patent number: 7585693
    Abstract: Method of forming a microelectronic package using control of die and substrate differential expansions. The method includes: providing a die-substrate combination including a substrate, a die disposed on the substrate, and plurality of solder paste disposed between the die and the substrate; reflowing the solder paste by exposing the die-substrate combination to temperatures changes including heating the die-substrate combination to liquefy the solder paste, and cooling down the die-substrate combination until the solder paste has solidified to form solder joints to yield the package; and controlling an expansion of the die and the substrate at least during cooling down to mitigate a relative difference in volumetric strain between the die and the substrate. Controlling may comprise exposing the die-substrate combination to pressure changes at least during cooling down.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: September 8, 2009
    Assignee: Intel Corporation
    Inventors: Kristopher J. Frutschy, Sudarshan V. Rangaraj, Kevin B. George
  • Publication number: 20090218601
    Abstract: By incorporating germanium material into thermal sensing diode structures, the sensitivity thereof may be significantly increased. In some illustrative embodiments, the process for incorporating the germanium material may be performed with high compatibility with a process flow for incorporating a silicon/germanium material into P-channel transistors of sophisticated semiconductor devices. Hence, temperature control efficiency may be increased with reduced die area consumption.
    Type: Application
    Filed: September 4, 2008
    Publication date: September 3, 2009
    Inventors: Rolf Stephan, Markus Forsberg, Gert Burbach, Anthony Mowry
  • Publication number: 20090199887
    Abstract: A method of forming a thermoelectric device may include forming a first pattern of epitaxial thermoelectric elements of a first conductivity type on a surface of a semiconductor substrate. A second pattern of epitaxial thermoelectric elements of a second conductivity type may be formed on the surface of the semiconductor substrate. Moreover, the thermoelectric elements of the first and second patterns may be spaced apart, and the first and second conductivity types may be different. Related structures are also discussed.
    Type: Application
    Filed: February 6, 2009
    Publication date: August 13, 2009
    Inventors: Mark Johnson, Lauren Jackson, Robert Vaudo, James Mundell
  • Publication number: 20090200535
    Abstract: An integrated circuit including a memory element is described. The memory element includes a solid electrolyte layer that includes a matrix material having a metal dissolved therein, and a dopant distributed in the matrix material, the dopant competing with the metal to bind with elements of the matrix material at a crystallization temperature so that at least a portion of the metal in the matrix material remains unbound, to increase the temperature stability of the memory element.
    Type: Application
    Filed: February 12, 2008
    Publication date: August 13, 2009
    Inventor: Klaus-Dieter Ufert
  • Publication number: 20090201716
    Abstract: An integrated circuit including a memory element and method for manufacturing the integrated circuit are described. In some embodiments, the memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state, and a positive temperature coefficient layer in thermal contact with the switching layer, the positive temperature coefficient layer having a resistance that increases in response to an increase in temperature.
    Type: Application
    Filed: February 12, 2008
    Publication date: August 13, 2009
    Inventor: Klaus-Dieter Ufert
  • Patent number: 7572662
    Abstract: A method of fabricating a phase change RAM (PRAM) having a fullerene layer is provided. The method of fabricating the PRAM may include forming a bottom electrode, forming an interlayer dielectric film covering the bottom electrode, and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film, forming a bottom electrode contact plug by filling the bottom electrode contact hole with a plug material, forming a fullerene layer on a region including at least an upper surface of the bottom electrode contact plug and sequentially stacking a phase change layer and an upper electrode on the fullerene layer. The method may further include forming a switching device on a substrate and a bottom electrode connected to the switching device, forming an interlayer dielectric film covering the bottom electrode and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: August 11, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-ho Khang, Sang-Mock Lee, Jin-seo Noh, Woong-Chul Shin
  • Patent number: 7569420
    Abstract: A packaging structure and method for a light emitting diode is provided. The present invention uses flip-chip and eutectic bonding technology to attach a LED to a thermal and electrical conducting substrate. The flip-chip packaging structure comprises a thermal and electrical conducting substrate having an insulating layer formed in an appropriate area on the top surface of the substrate and a bonding pad formed on top of the insulating layer; and a LED reversed in a flip-chip style and joined to the substrate by eutectic bonding. A first electrode of the LED is eutectically bonded to an appropriate area on the top surface of the substrate via a eutectic layer, while a second electrode of the LED is electrically connected to the bonding pad.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: August 4, 2009
    Assignee: Huga Optotech Inc.
    Inventor: Ching-Wen Tung
  • Publication number: 20090184304
    Abstract: A phase change memory device having plug-shaped phase change layers and a process of manufacturing the same is provided. The device and process includes forming first electrodes on a substrate. An insulation layer is then formed to cover the first electrodes. Plug-shaped phase change layers are then formed in the insulation layer to contact the first electrodes. The plug-shaped phase change layers have a straight-line or an ‘L’ shape when viewed as a cross-section and a horseshoe or a semicircle shape when viewed from above. Finally, bit lines are formed on the insulation layer to contact the phase change layers and additionally serve as second electrodes. The device may further include heaters interposed between the first electrodes and the plug-shaped phase change layers.
    Type: Application
    Filed: March 7, 2008
    Publication date: July 23, 2009
    Inventors: Heon Yong CHANG, Suk Kyoung HONG
  • Publication number: 20090166794
    Abstract: By forming thermocouples in a contact structure of a semiconductor device, respective extension lines of the thermocouples may be routed to any desired location within the die, without consuming valuable semiconductor area in the device layer. Thus, an appropriate network of measurement points of interest may be provided, while at the same time allowing the application of well-established process techniques and materials. Hence, temperature-dependent signals may be obtained from hot spots substantially without being affected by design constraints in the device layer.
    Type: Application
    Filed: July 8, 2008
    Publication date: July 2, 2009
    Inventors: Anthony Mowry, Casey Scott, Roman Boschke
  • Publication number: 20090152467
    Abstract: Provided are a multilayer-structured bolometer and a method of fabricating the same. In the multilayer-structured bolometer, the number of support arms supporting the body of a sensor structure is reduced to one, and two electrodes are formed on the one support arm. Thus, the sensor structure is electrically connected with a substrate through the only one support arm. According to the multilayer-structured bolometer and method of fabricating the bolometer, the thermal conductivity of the sensor structure is considerably reduced to remarkably improve sensitivity to temperature, and also the pixel size of the bolometer is reduced to obtain high-resolution thermal images. In addition, the multilayer-structured bolometer can have a high fill-factor due to a sufficiently large infrared-absorbing layer, and thus can improve infrared absorbance.
    Type: Application
    Filed: July 30, 2008
    Publication date: June 18, 2009
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Hoon Cheon, Ho Jun Ryu, Woo Seok Yang, Seong Mok Cho, Byoung Gon Yu, Chang Auck Choi
  • Publication number: 20090141767
    Abstract: A single chip wireless sensor (1) comprises a microcontroller (2) connected to a transmit/receive interface (3), which is coupled to a wireless antenna (4) by an L-C matching circuit. The sensor (1) senses gas or humidity and temperature. The device (1) is an integrated chip manufactured in a single process in which both the electronics and sensor components are manufactured using standard CMOS processing techniques, applied to achieve both electronic and sensing components in an integrated process. A Low-K material (57) with an organic polymer component is spun onto the wafer to form a top layer incorporating also sensing electrodes (60). This material is cured at 300° C., which is much lower than CVD temperatures. The polyimide when cured becomes thermoset, and the lower mass-to-volume ratio resulting in K, its dielectric constant, reducing to 2.9. The thermoset dielectric, while not regarded as porous in the conventional sense, has sufficient free space volume to admit enough gas or humidity for sensing.
    Type: Application
    Filed: October 2, 2006
    Publication date: June 4, 2009
    Inventor: Timothy Cummins