Thermally Responsive Patents (Class 438/54)
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Publication number: 20130042899Abstract: The present invention relates to a thermoelectric device, in particular an all-organic thermoelectric device, and to an array of such thermoelectric devices. Furthermore, the present invention relates to a method of manufacturing a thermoelectric device, in particular an all-organic thermoelectric device. Moreover, the present invention relates to uses of the thermoelectric device and/or the array in accordance with the present invention.Type: ApplicationFiled: July 6, 2012Publication date: February 21, 2013Applicant: Sony CorporationInventors: Rene WIRTZ, Silvia Rosselli, Gabriele Nelles
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Patent number: 8380360Abstract: In a temperature control method in which a target temperature is given in a thermal treatment furnace and plural heaters are controlled according to the target temperature, the correlation of the each heater and plural profile temperature sensors provided in the thermal treatment furnace is determined, a virtual temperature is calculated on the basis of the detection temperature of each profile temperature sensor and a weighting factor calculated from the correlation, and the each heater is controlled so that the virtual temperature is coincident with the target temperature.Type: GrantFiled: September 9, 2008Date of Patent: February 19, 2013Assignee: Hitachi Kokusai Electric Inc.Inventor: Hideto Yamaguchi
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Publication number: 20130037071Abstract: A thermoelectric module which has at least one thermoelectric element for converting energy between thermal energy and electrical energy. The at least one thermoelectric element has a first surface and a second surface opposite the first surface. The thermoelectric module further has a first electrode, the first electrode having at least a first region which is arranged directly on the first surface and a second electrode, the second electrode having at least a second region which is arranged directly on the second surface. At least one of the first region and the second region has a metal alloy which exhibits an Invar effect.Type: ApplicationFiled: August 10, 2012Publication date: February 14, 2013Applicant: Vacuumschmelze GmbH & Co, KGInventors: Joachim Gerster, Alberto Bracchi, Michael Müller
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Publication number: 20130037070Abstract: A novel and effective structure of a stackable element (A1,A2) or more generally adapted to be associated modularly to other similar elements to form a septum of relatively large dimensions for a Seebeck/Peltier thermoelectric conversion device, may be fabricated with common planar processing techniques. The structure basically consists of a stack (A1, A2) of alternated layers of a first dielectric material (2), adapted to be deposited in films of thickness lesser than or equal to about 50 nm, of low heat conductivity and which is etchable by a solution of a specific chemical compound, and of a second dielectric material (3) of low heat conductivity that is not etched by the solution.Type: ApplicationFiled: December 13, 2010Publication date: February 14, 2013Applicant: Consorzio Delta Ti ResearchInventors: Dario Narducci, Elena Lonati
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Publication number: 20130040413Abstract: Conventional “on-chip” or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples are provided that employ different thicknesses of thermal insulators to help create thermal differentials within an integrated circuit. By using these thermal insulators, standard manufacturing processes can be used to lower cost, and the mechanical sensitivity of the thermocouple is greatly decreased. Additionally, other features (which can be included through the use of standard manufacturing processes) to help trap and dissipate heat appropriately.Type: ApplicationFiled: October 18, 2012Publication date: February 14, 2013Applicant: Texas Instruments IncorporatedInventor: Texas Instruments Incorporated
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Publication number: 20130034925Abstract: An RFID based thermal bubble type accelerometer includes a flexible substrate, an embedded system on chip (SOC) unit, an RFID antenna formed on the substrate and coupled to a modulation/demodulation module in the SOC unit, a cavity formed on the flexible substrate, and a plurality of sensing assemblies, including a heater and two temperature-sensing elements, disposed along the x-axis direction and suspended over the cavity. The two temperature-sensing elements, serially connected, are separately disposed at two opposite sides and at substantially equal distances from the heater. Two sets of sensing assemblies can be connected in differential Wheatstone bridge. The series-connecting points of the sensing assemblies are coupled to the SOC unit such that an x-axis acceleration can be obtained by a voltage difference between the connecting points. The x-axis acceleration can be sent by the RFID antenna to a reader after it is is modulated and encoded by the modulation/demodulation module.Type: ApplicationFiled: October 9, 2012Publication date: February 7, 2013Applicant: Chung Hua UniversityInventor: Chung Hua University
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Patent number: 8368152Abstract: The present disclosure provides a micro-electro-mechanical systems (MEMS) device and a method for fabricating such a device. In an embodiment, a MEMS device includes a substrate, a dielectric layer above the substrate, an etch stop layer above the dielectric layer, and two anchor plugs above the dielectric layer, the two anchor plugs each contacting the etch stop layer or a top metal layer disposed above the dielectric layer. The device further comprises a MEMS structure layer disposed above a cavity formed between the two anchor plugs and above the etch stop layer from release of a sacrificial layer.Type: GrantFiled: April 18, 2011Date of Patent: February 5, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Hua Chu, Yi Heng Tsai, Kai-Chih Liang, Chia-Pao Shu, Li-Cheng Chu, Kuei-Sung Chang, Hsueh-An Yang, Chung-Hsien Lin
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Publication number: 20130025643Abstract: A device and method of manufacture of a:DLC multi-layer doping growth comprising the steps of: forming at least an a:DLC layer in one process over a conventional semiconductor layer, thereby creating a plurality of successively connected PIN/PN junctions, each PIN/PN junction being a photo diode, starting from a first junction and ending in a last junction, respective PIN/PN junctions having p-type, n-type, and intrinsic layers; varying the sp3/sp2 ratio of at least the respective p-type and n-type layers and doping with at least silver to enhance electron mobility in respective PIN junctions; and connecting the plurality of a:DLC layers between electrodes at the first side and the second side to create a device having optimized spectral response to being oriented to a light source. A device comprises at least any kind of PIN/PN junction and an a:DLC PIN/PN junction, and can be connected as an array of devices.Type: ApplicationFiled: October 9, 2012Publication date: January 31, 2013Applicant: BURNING SOLAR LTD.Inventor: BURNING SOLAR LTD.
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Publication number: 20130026592Abstract: A method of forming a focal plane array by: forming a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer, the sensing material being a thermistor material defining at least one pixel; providing supporting legs for the pixel within the sacrificial layer, covering them with a further sacrificial layer and forming first conductive portions in the surface of the sacrificial layer that are in contact with the supporting legs; forming a second wafer having read-out integrated circuit (ROIC), the second wafer being covered by another sacrificial layer, into which is formed second conductive portions in contact with the ROIC; bringing the sacrificial oxide layers of the first wafer and second wafer together such that the first and second conductive portions are aligned and bonding them together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; and removing the sacrificial lType: ApplicationFiled: March 1, 2011Publication date: January 31, 2013Applicant: SensoNor Technologies ASInventors: Adriana Lapadatu, Gjermund Kittilsland
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Publication number: 20130020670Abstract: A temperature sensing element includes a thermistor composed of Si-base ceramics and a pair of metal electrodes bonded onto the surfaces of the thermistor. The metal electrodes contain Cr and a metal element ? having a Si diffusion coefficient higher than that of Cr. A diffusion layer is formed in a bonding interface between the thermistor and each metal electrode, the diffusion layer including a silicide of the metal element ? in a crystal grain boundary of the Si-base ceramics. A temperature sensor including the diffusion layers is provided. Owing to the diffusion layers, the temperature sensor ensures heat resistance and bonding reliability and enables temperature detection with high accuracy in a temperature range, in particular, of from ?50° C. to 1050° C.Type: ApplicationFiled: April 27, 2011Publication date: January 24, 2013Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, DENSO CORPORATIONInventors: Tsunenobu Hori, Kaoru Kuzuoka, Chiaki Ogawa, Motoki Satou, Katsunori Yamada, Takao Kobayashi
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Publication number: 20130019918Abstract: A method for forming a thermoelectric element for use in a thermoelectric device comprises forming a mask adjacent to a substrate. The mask can include three-dimensional structures phase-separated in a polymer matrix. The three-dimensional structures can be removed to provide a plurality of holes in the polymer matrix. The plurality of holes can expose portions of the substrate. A layer of a metallic material can be deposited adjacent to the mask and exposed portions of the substrate. The mask can then be removed. The metallic material is then exposed to an oxidizing agent and an etchant to form holes or wires in the substrate.Type: ApplicationFiled: July 16, 2012Publication date: January 24, 2013Applicant: The Regents of the University of MichiganInventors: Akram I. Boukai, Anish Tuteja, Duckhyun Lee
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Patent number: 8357560Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are formed corresponding to the array bumps, wherein the array bumps are bonded to the respective outer pads when the cap wafer and the MEMS device wafer are bonded together.Type: GrantFiled: May 18, 2009Date of Patent: January 22, 2013Assignee: Magnachip Semiconductor Ltd.Inventors: Sung-Gyu Pyo, Dong-Joon Kim
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Patent number: 8357550Abstract: A method for manufacturing a sensor device (100; 200; 300; 400) comprising a thermal sensor (23), a battery (33), an antenna (34), an electronic circuitry (22) and a solar cell (43) together integrally in one semiconductor carrier (10), the method comprising the steps of:—providing a silicon wafer (10) with two main surfaces (11, 12); a first functional layer (20) is manufactured in one main surface (11), comprising a thermal sensor portion (21) and comprising electronic circuitry (22) arranged in a non-overlapping relationship with the thermal sensor portion; a second functional layer (30) containing a battery (33) and an antenna (34) is arranged in a non-overlapping relationship with the thermal sensor portion; a third functional layer (40) containing one or more solar cells (43) is arranged in a non-overlapping relationship with the thermal sensor portion; the portion of the wafer underneath the thermal sensor portion (21) is removed.Type: GrantFiled: May 7, 2010Date of Patent: January 22, 2013Assignee: Koninklijke Philips Electronics N.V.Inventors: Willem F. P. Pasveer, Jaap Haartsen, Rogier A. H. Niessen
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Publication number: 20130010826Abstract: Microsensors that include an integrated thermal energy source and an integrated temperature sensor are capable of providing localized heating and temperature control of individual sensing regions within the microsensor. Localized temperature control allows analyte detection to be carried out at the same temperatures or substantially the same temperatures at which the sensor is calibrated. By carrying out the sensing near the calibration temperature, more accurate results can be obtained. In addition, the temperature of the sensing region can be controlled so that chemical reactions involving the analyte in the sensing region occur near their peak reaction rate. Carrying out the sensing near the peak reaction rate improves the sensitivity of the sensor which is important as sensor dimensions decrease and the magnitude of the generated signals decreases.Type: ApplicationFiled: July 5, 2011Publication date: January 10, 2013Applicant: STMICROELECTRONICS PTE LTD.Inventors: Olivier Le Neel, Suman Cherian, Ravi Shankar
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Patent number: 8349636Abstract: A method of manufacturing a phase change memory device is provided. A first insulating layer having a plurality of metal word lines spaced apart at a constant distance is formed on a semiconductor substrate. A plurality of line structures having a barrier metal layer, a polysilicon layer and a hard mask layer are formed to be overlaid on the plurality of metal word lines. A second insulating layer is formed between the line structures. Cross patterns are formed by etching the hard mask layers and the polysilicon layers of the line structures using mask patterns crossed with the metal word lines. A third insulating layer is buried within spaces between the cross patterns. Self-aligned phase change contact holes are formed and at the same time, diode patterns formed of remnant polysilicon layers are formed by selectively removing the hard mask layers constituting the cross patterns.Type: GrantFiled: July 12, 2010Date of Patent: January 8, 2013Assignee: Hynix Semiconductor Inc.Inventors: Jang Uk Lee, Kang Sik Choi, Hae Chan Park, Jin Hyock Kim, Ja Chun Ku
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Publication number: 20130000688Abstract: A thermoelectric device (100) includes a pair of spaced apart oppositely doped structures (110, 120) connecting between a common electrode (140) at a first end and different ones of a pair (150) of separate electrodes (150a, 150b) at a second end of the structures. Each oppositely doped structure includes a first material (112, 122) of a respectively doped semiconductor bounded by a second material (114, 124, 116, 126). Boundaries (111, 121) between the respective first and second materials are parallel to a charge carrier conduction path between the common electrode and the separate electrodes. The respectively doped semiconductor has a thickness configured to be less than a phonon scattering length.Type: ApplicationFiled: March 23, 2010Publication date: January 3, 2013Inventors: Hans S. Cho, Alexandre M. Bratkovski, Theodore I. Kamins
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Publication number: 20120319226Abstract: Embodiments of the invention provide robust electrothermal MEMS with fast thermal response. In one embodiment, an electrothermal bimorph actuator is fabricated using aluminum as one bimorph layer and tungsten as the second bimorph layer. The heating element can be the aluminum or the tungsten, or a combination of aluminum and tungsten, thereby providing a resistive heater and reducing deposition steps. Polyimide can be used for thermal isolation of the bimorph actuator and the substrate. For MEMS micromirror designs, the polyimide can also be used for thermal isolation between the bimorph actuator and the micromirror.Type: ApplicationFiled: December 6, 2011Publication date: December 20, 2012Applicant: University of Florida Research Foundation, IncorporatedInventors: Sagnik Pal, Huikai Xie
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Publication number: 20120297796Abstract: A light powered barrier for cooling a substrate includes a thermo-conductive layer for contacting the substrate, a first P-type layer disposed atop the thermo-conductive layer, a first N-type layer disposed over the first P-type layer and a thermoelectrically conductive insert that conducts heat from the thermo-conductive layer and electrically conducts electrons and holes from the first P-type layer and the first N-type layer.Type: ApplicationFiled: May 27, 2011Publication date: November 29, 2012Inventor: Joseph R. Schwarz
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Patent number: 8318525Abstract: A device for sensing a gas comprises a plastics housing (106, 107) moulded in situ around at least one portion of a conducting lead frame (100), the housing defining an enclosure (113) and being provided with means for enabling gas flow into the enclosure. A gas sensitive element (114) within the enclosure (113) is mounted to the conducting lead frame (100). The conducting lead frame (100) comprises connection leads which are accessible through, and at least partially encapsulated by, the wall of the housing.Type: GrantFiled: November 25, 2003Date of Patent: November 27, 2012Assignee: City Technology LimitedInventors: David Frank Davies, Ian Paul Andrews, Anthony Richard Cowburn, Stuart Christopher Cutler
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Patent number: 8318523Abstract: A thin film transistor, a method of fabricating the same, and an OLED display device having the same. The thin film transistor includes a substrate, a semiconductor layer disposed on the substrate and having a channel region, source and drain regions, and a body contact region, a gate insulating layer disposed on the semiconductor layer to expose the body contact region, a silicon layer disposed on the gate insulating layer and contacting the body contact region exposed by the gate insulating layer, a gate electrode disposed on the silicon layer, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes disposed on the interlayer insulating layer and electrically connected with the source and drain regions, wherein the body contact region is formed in an edge region of the semiconductor layer.Type: GrantFiled: March 17, 2009Date of Patent: November 27, 2012Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Kil-Won Lee, Dong-Hyun Lee
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Publication number: 20120279542Abstract: A multilayered stack useful for constituting a Seebeck-Peltier effect electrically conductive septum with opposite hot-side and cold-side metallizations for connection to an electrical circuit, comprises a stacked succession of layers (Ci) of electrically conductive material alternated to dielectric oxide layers (Di) in form of a continuous film or of densely dispersed nano and sub-nano particles or clusters of particles of oxide; at least the electrically conductive layers having mean thickness ranging from 5 to 100 nm and surface irregularities at the interfaces with the dielectric oxide layers of mean peak-to-valley amplitude and mean periodicity comprised between 5 to 20 nm. Various processes adapted to build a multilayered stack of these characteristics are described.Type: ApplicationFiled: May 4, 2012Publication date: November 8, 2012Applicant: Consorzio Delta Ti ResearchInventors: Dario Narducci, Gianfranco Cerofolini, Elena Lonati
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Publication number: 20120276675Abstract: An apparatus and method is described for measuring a local surface temperature of a semiconductor device under stress. The apparatus includes a substrate, and a reference MOSFET. The reference MOSFET may be disposed closely adjacent to the semiconductor device under stress. A local surface temperature of the semiconductor device under stress may be measured using the reference MOSFET, which is not under stress. The local surface temperature of the semiconductor device under stress may be determined as a function of drain current values of the reference MOSFET measured before applying stress to the semiconductor device and while the semiconductor device is under stress.Type: ApplicationFiled: July 9, 2012Publication date: November 1, 2012Inventor: Rolf-Peter Vollertsen
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Patent number: 8298848Abstract: An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.Type: GrantFiled: June 3, 2010Date of Patent: October 30, 2012Assignee: STMicroelectronics (Rousset) SASInventors: Christian Rivero, Pascal Fornara
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Patent number: 8288752Abstract: A phase change memory device includes a plurality of word lines, a plurality of bit lines disposed to be crossed with the plurality of word lines, switching devices disposed at intersections of the plurality of word lines and the plurality of bit lines, heating electrodes connected to the switching devices respectively, heat absorbing layers disposed between adjacent heating electrodes, and phase change layers formed on the heating electrodes and the heat absorbing layers and extended in the same direction of the bit line.Type: GrantFiled: July 9, 2010Date of Patent: October 16, 2012Assignee: Hynix Semiconductor Inc.Inventor: Nam Kyun Park
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Patent number: 8288192Abstract: In a method of manufacturing a capacitive electromechanical transducer, a first electrode (8) is formed on a substrate (4), an insulating layer (9) which has an opening (6) leading to the first electrode is formed on the first electrode (8), and a sacrificial layer is formed on the insulating layer. A membrane (3) having a second electrode (1) is formed on the sacrificial layer, and an aperture is provided as an etchant inlet in the membrane. The sacrificial layer is etched to form a cavity (10), and then the aperture serving as an etchant inlet is sealed. The etching is executed by electrolytic etching in which a current is caused to flow between the first electrode (8) and an externally placed counter electrode through the opening (6) and the aperture of the membrane.Type: GrantFiled: April 28, 2009Date of Patent: October 16, 2012Assignee: Canon Kabushiki KaishaInventor: Chienliu Chang
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Publication number: 20120247527Abstract: A thermoelectric device and methods thereof. The thermoelectric device includes nanowires, a contact layer, and a shunt. Each of the nanowires includes a first end and a second end. The contact layer electrically couples the nanowires through at least the first end of each of the nanowires. The shunt is electrically coupled to the contact layer. All of the nanowires are substantially parallel to each other. A first contact resistivity between the first end and the contact layer ranges from 10?13 ?-m2 to 10?7 ?-m2. A first work function between the first end and the contact layer is less than 0.8 electron volts. The contact layer is associated with a first thermal resistance ranging from 10?2 K/W to 1010 K/W.Type: ApplicationFiled: February 1, 2012Publication date: October 4, 2012Applicant: Alphabet Energy, Inc.Inventors: Matthew L. Scullin, Madhav A. Karri, Adam Lorimer, Sylvain Muckenhirn, Gabriel A. Matus, Justin Tynes Kardel, Barbara Wacker
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Publication number: 20120241626Abstract: In the reference element employed in the thermal-type infrared solid-state image sensing device according to the present invention, a slit used for construction of a light receiving element is opened in insulating films between which a thermoelectric conversion element is tucked to such an extent that the slit pierces into the sacrifice layer; a film made of electrically conductive material covering the light receiving section and the slit is provided and a protective film is provided thereon, and the film made of electrically conductive material and the protective film enter the interior of the slit along a side wall of the slit, whereby a void is left in the interior of the slit. As a result, residual stresses of the insulating films are kept equal in the light receiving element and the reference element, and thereby, the light blocking effect and the heat transfer effect are improved.Type: ApplicationFiled: March 23, 2012Publication date: September 27, 2012Inventor: Shigeru Tohyama
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Publication number: 20120240674Abstract: In a thermal sensor with a detection part and a circuit part formed on the same substrate, an insulating film for protection of the circuit part causes problems of lowering in sensitivity of a heater, deterioration in accuracy due to variation of a residual stress in the detection part, etc. A layered film including insulating films is formed on a heating resistor, an intermediate layer is formed thereon, and a layered film including insulating films is formed further thereon. The intermediate layer is specified to be a layer made up of any one of aluminum nitride, aluminum oxide, silicon carbide, titanium nitride, tungsten nitride, and titanium tungsten. This configuration enables the layered film on the upper part of the detection part to be removed using the intermediate layer as an etch stop layer, which solves problems of lowering in sensitivity, a variation in residual stress, etc. resulting from these.Type: ApplicationFiled: January 16, 2012Publication date: September 27, 2012Inventor: Noriyuki SAKUMA
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Patent number: 8264055Abstract: A CMOS thermoelectric refrigerator made of an NMOS transistor and PMOS transistor connected in series through a cold terminal is disclosed. Active areas of the NMOS and PMOS transistors are less than 300 nanometers wide, to reduce thermal conduction between the cold terminal and the IC substrate. Drain nodes of the NMOS and PMOS transistors are connected through hot terminals to a biasing circuit. The drain node of the NMOS transistor is biased positive with respect to the drain node of the PMOS transistor, to extract hot electrons and hot holes from the cold terminal. Biases on the drain nodes and gates of the NMOS and PMOS transistors may be adjusted to optimize the efficiency of the CMOS thermoelectric refrigerator or maximize the thermal power of the CMOS thermoelectric refrigerator. The cold terminal may be configured to cool a selected component in the IC, such as a transistor.Type: GrantFiled: August 10, 2009Date of Patent: September 11, 2012Assignee: Texas Instruments IncorporatedInventor: Henry Litzmann Edwards
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Publication number: 20120225513Abstract: Provided is a method of enhancing thermoelectric performance by surrounding crystalline semiconductors with nanoparticles by contacting a bismuth telluride material with a silver salt under a substantially inert atmosphere and a temperature approximately near the silver salt decomposition temperature; and recovering a metallic bismuth decorated material comprising silver telluride crystal grains.Type: ApplicationFiled: March 5, 2012Publication date: September 6, 2012Applicant: U. S.A. as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Hyun-Jung Kim, Sang Hyouk Choi, Glen C. King, Yeonjoon Park, Kunik Lee
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Publication number: 20120217609Abstract: A semiconductor device includes a stacked body with a recessed gas passage formed therein, a heater disposed in the stacked body, the heater being exposed on a bottom surface of the gas passage, and a plurality of thermal sensors disposed in the stacked body in such a manner that the plurality of thermal sensors sandwich the heater therebetween in an extending direction of the gas passage, the plurality of thermal sensors being exposed on the bottom surface of the gas passage. An acceleration sensor having a high affinity to the ordinary semiconductor manufacturing process can be provided.Type: ApplicationFiled: February 14, 2012Publication date: August 30, 2012Inventor: Akira TANABE
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Patent number: 8252620Abstract: The present invention provides a process for preparing a photoanode of a dye-sensitized solar cell (DSSC) by pressure swing impregnation, which includes impregnating a metal oxide layer on a conductive substrate in a photosensitizing dye solution in a vessel; introducing a pressurized inert gas into the vessel to maintain a first pressure therein for a period of time, wherein the first pressure can be lower or higher than the critical pressure of the inert gas and the solution is expanded by the inert gas; further pressurizing the vessel with the inert gas and maintaining at a second pressure higher than the first pressure for a period of time, wherein the inert gas becomes sub-critical or supercritical fluid and dissolves more in the solution, creating an anti-solvent effect, so that the photosensitizing dye further deposits onto the metal oxide layer due to the anti-solvent effect.Type: GrantFiled: August 10, 2010Date of Patent: August 28, 2012Assignee: National Tsing Hua UniversityInventors: Chung-Sung Tan, I-Hsiang Lin, Jan-Min Yang
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Publication number: 20120204922Abstract: A thermoelectric roofing apparatus and method for generating electricity as a byproduct of heat exchange. A thermoelectric coating can be applied on a heat exchanger material (e.g., a roofing material, a shingle, etc.) located on a budding utilizing a thermoelectric coating process (e.g., spray-on coating) in order to capture waste heat from a heat source and generate an electrical energy. The thermoelectric coating can be a semiconductor material that can be applied to the heat exchanger material in a printed circuit format. The charge carriers with respect to the semiconductor material can be excited when heat flows through the thermoelectric coating which can be harvested to generate the electrical power. Electrical conductors can be attached to the thermoelectric coating to transmit the electrical energy generated as a byproduct of heat exchange.Type: ApplicationFiled: February 16, 2011Publication date: August 16, 2012Inventors: Luis M. Ortiz, Kermit D. Lopez
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Patent number: 8237043Abstract: First and second conductive members having different Seebeck coefficients are formed on an insulating substrate. The first and second conductive members are connected by ohmic contact, and the surfaces connected by ohmic contact are covered with a material sheet having a superior heat conductivity and an electric insulating property in the junction surface, such as an aluminum sheet formed with surfaces provided with electric insulating property by alumite treatment or the like. On the opposite side, bonding wires are connected with the first and second conductive members by ohmic contact. The bonding wires are insulated from one another, and used as output terminals of an integrated parallel Peltier Seebeck element chip. The thus produced integrated parallel Peltier Seebeck element chips are connected by one or more serial or parallel cables, to form energy conversion apparatus from electricity to heat and thermal energy transfer apparatus.Type: GrantFiled: June 29, 2005Date of Patent: August 7, 2012Assignees: Meidensha Corporation, Yoshiomi KondohInventor: Yoshiomi Kondoh
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Patent number: 8236596Abstract: Multi-zone, solar cell diffusion furnaces having a plurality of radiant element (SiC) or/and high intensity IR lamp heated process zones, including baffle, ramp-up, firing, soaking and cooling zone(s). The transport of solar cell wafers, e.g., silicon, selenium, germanium or gallium-based solar cell wafers, through the furnace is implemented by use of an ultra low-mass, wafer transport system comprising laterally spaced shielded metal bands or chains carrying non-rotating alumina tubes suspended on wires between them. The wafers rest on raised circumferential standoffs spaced laterally along the alumina tubes, which reduces contamination. The bands or chains are driven synchronously at ultra-low tension by a pin drive roller or sprocket at either the inlet or outlet end of the furnace, with appropriate tensioning systems disposed in the return path. The high intensity IR flux rapidly photo-radiation conditions the wafers so that diffusion occurs >3× faster than conventional high-mass thermal furnaces.Type: GrantFiled: August 19, 2011Date of Patent: August 7, 2012Assignee: TP Solar, Inc.Inventors: Richard W. Parks, Luis Alejandro Rey Garcia, Peter M. Ragay
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Publication number: 20120180842Abstract: A thermoelectric device, a method for fabricating a thermoelectric device and electrode materials applied to the thermoelectric device are provided according to the present invention. The present invention is characterized in arranging thermoelectric material power, interlayer materials and electrode materials in advance according to the structure of thermoelectric device; adopting one-step sintering method to make a process of forming bulked thermoelectric materials and a process of combining with electrodes on the devices to be completed simultaneously; and obtaining a ? shape thermoelectric device finally. Electrode materials related to the present invention comprise binary or ternary alloys or composite materials, which comprise at least a first metal selected from Cu, Ag, Al or Au, and a second metal selected from Mo, W, Zr, Ta, Cr, Nb, V or Ti.Type: ApplicationFiled: March 25, 2010Publication date: July 19, 2012Inventors: Lidong Chen, Monika Backhaus-Ricoult, Lin He, Xiaoya Li, Yunshan Tang, Xugui Xia, Degang Zhao
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Publication number: 20120180839Abstract: A thermo-electric energy converter converts thermal energy into electric energy and vice-versa. A three-dimensional micro-structure has micro-columns with different micro-column materials. The micro-column materials have different Seebeck-coefficients (thermopower). The diameters of said micro-columns which are arranged parallel to each other are from 0.1 ?m-200 ?m. The micro-columns have, respectively, an aspect ratio between 20-1000. Also, the micro-columns are coupled together as thermo-pairs for building a thermo-voltage. In order to produce the micro-structure, a template has a three-dimensional template structure with column-like template cavities, essentially inverse to the micro-structure micro-column material is inserted in the cavities thus producing micro-columns, and the template material is at least partially removed.Type: ApplicationFiled: September 20, 2010Publication date: July 19, 2012Inventors: Harry Hedler, Jörg Zapf
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Patent number: 8222086Abstract: A plurality of FPGA dice is disposed upon a semiconductor substrate. In order both to connect thousands of signal interconnect lines between the plurality of FPGA dice and to supply the immense power required, it is desired that the substrate construction include two different portions, each manufactured using incompatible processes. The first portion is a signal interconnect structure containing a thin conductor layers portion characterized as having a plurality of thin, fine-pitch conductors. The second portion is a power connection structure that includes thick conductors and vertical through-holes. The through-holes contain conductive material and supply power to the FPGA dice from power bus bars located at the other side of the semiconductor substrate. The portions are joined at the wafer level by polishing the wafer surfaces within a few atoms of flatness and subsequent cleaning. The portions are then fusion bonded together or combined using an adhesive material.Type: GrantFiled: April 4, 2011Date of Patent: July 17, 2012Assignee: Research Triangle InstituteInventor: Robert O. Conn
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Publication number: 20120175723Abstract: According to one embodiment, an infrared imaging device includes a substrate, a detecting section, an interconnection, a contact plug and a support beam. The detecting section is provided above the substrate and includes an infrared absorbing section and a thermoelectric converting section. The interconnection is provided on an interconnection region of the substrate and is configured to read the electrical signal. The contact plug is extends from the interconnection toward a connecting layer provided in the interconnection region. The contact plug is electrically connected to the interconnection and the connecting layer. The support beam includes a support beam interconnection and supports the detecting section above the substrate. The support beam interconnection transmits the electrical signal from the thermoelectric converting section to the interconnection.Type: ApplicationFiled: March 21, 2012Publication date: July 12, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Ikuo FUJIWARA, Hitoshi YAGI, Keita SASAKI
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Publication number: 20120175687Abstract: An embodiment of the invention relates to a Seebeck temperature difference sensor that may be formed in a trench on a semiconductor device. A portion of the sensor may be substantially surrounded by an electrically conductive shield. A plurality of junctions may be included to provide a higher Seebeck sensor voltage. The shield may be electrically coupled to a local potential, or left electrically floating. A portion of the shield may be formed as a doped well in the semiconductor substrate on which the semiconductor device is formed, or as a metal layer substantially covering the sensor. The shield may be formed as a first oxide layer on a sensor trench wall with a conductive shield formed on the first oxide layer, and a second oxide layer formed on the conductive shield. An absolute temperature sensor may be coupled in series with the Seebeck temperature difference sensor.Type: ApplicationFiled: March 21, 2012Publication date: July 12, 2012Applicant: Infineon Technologies AGInventors: Donald Dibra, Christoph Kadow, Markus Zundel
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Publication number: 20120176835Abstract: A disclosed temperature sensor includes a charge trap structure including a silicon oxide film formed on a substrate; an aluminum oxide film that is formed on the silicon oxide film, wherein oxygen is injected into the aluminum oxide film from an upper surface thereof; and an electrode formed on the aluminum oxide film, wherein a flat band voltage of the charge trap structure is temperature dependent.Type: ApplicationFiled: January 6, 2012Publication date: July 12, 2012Applicant: Tokyo Electron LimitedInventor: Yoshitsugu TANAKA
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Patent number: 8216931Abstract: Embodiments are directed to the formation of multi-layer three-dimensional structures by forming and attaching a plurality of layers where each of the plurality of layers comprises at least one structural material forming a pattern and where at least one of the plurality of layers comprises at least one sacrificial material. In one embodiment, the formation of a multi-layer three-dimensional structure comprises (1) forming a plurality of individual layers and (2) attaching at least the formed plurality of individual layers together. In another embodiment, the formation of a multi-layer three-dimensional structure comprises (1) attaching an individual layer onto a substrate or onto a previously formed layer; (2) processing the attached individual layer to form a new layer comprising at least one material forming a pattern; and (3) repeating the steps of (1) and (2) one or more times.Type: GrantFiled: October 10, 2006Date of Patent: July 10, 2012Inventor: Gang Zhang
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Patent number: 8216434Abstract: A micromachined sensor for measuring vascular parameters, such as fluid shear stress, includes a substrate having a front-side surface, and a backside surface opposite the front-side surface. The sensor includes a diaphragm overlying a cavity etched within the substrate, and a heat sensing element disposed on the front-side surface of the substrate and on top of the cavity and the diaphragm. The heat sensing element is electrically couplable to electrode leads formed on the backside surface of the substrate. The sensor includes an electronic system connected to the backside surface and configured to measure a change in heat convection from the sensing element to surrounding fluid when the sensing element is heated by applying an electric current thereto, and further configured to derive from the change in heat convection vascular parameters such as the shear stress of fluid flowing past the sensing element.Type: GrantFiled: March 3, 2008Date of Patent: July 10, 2012Assignee: University of Southern CaliforniaInventors: Tzung K. Hsiai, Gopikrishnan Soundararajan, Eun Sok Kim, Hongyu Yu, Mahsa Rouhanizadeh, Christina Tiantian Lin
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Patent number: 8216871Abstract: Methods of fabrication of a thermoelectric module from thin film thermoelectric material are disclosed. In general, a thin film thermoelectric module is fabricated by first forming an N-type thin film thermoelectric material layer and one or more metallization layers on a substrate. The one or more metallization layers and the N-type thin film thermoelectric material layer are etched to form a number of N-type thermoelectric material legs. A first electrode assembly is then bonded to a first portion of the N-type thermoelectric material legs, and the first electrode assembly including the first portion of the N-type thermoelectric material legs is removed from the substrate. In a similar manner, a second electrode assembly is bonded to a first portion of a number of P-type thermoelectric material legs. The first and second electrode assemblies are then bonded using a flip-chip bonding process to complete the fabrication of the thermoelectric module.Type: GrantFiled: October 5, 2010Date of Patent: July 10, 2012Assignee: The Board of Regents of the University of OklahomaInventor: Patrick John McCann
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Patent number: 8215832Abstract: A first thermosensitive element including a temperature detecting unit that outputs a voltage corresponding to a temperature to which the unit rises from ambient temperature (temperature of surrounding environment) due to incident infrared, and a second thermosensitive element including a temperature detecting unit that outputs a voltage based on ambient temperature are formed above/on a silicon substrate. The temperature detecting unit of the first thermosensitive element is thermally insulated from the silicon substrate by a clearance (space). The temperature detecting unit of the second thermosensitive element is formed on a first sacrifice layer made of deposited diamond like carbon, and thermally connected to the silicon substrate by the first sacrifice layer. The infrared sensor detects an amount of incident infrared based on the difference between output voltages of the first and second thermosensitive elements.Type: GrantFiled: February 12, 2009Date of Patent: July 10, 2012Assignee: NEC CorporationInventor: Seiji Kurashina
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Publication number: 20120167936Abstract: Disclosed are a thermoelectric device based on silicon nanowires including: a substrate; a silicon heat absorbing part absorbing heat, a silicon nanowire leg transferring heat, and a silicon heat releasing part releasing heat, which are formed on the substrate; and an insulating film with at least one or more holes, which is formed on the substrate including the silicon heat absorbing part, the silicon nanowire leg, and the silicon heat releasing part, and a method for manufacturing the same.Type: ApplicationFiled: December 14, 2011Publication date: July 5, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Young Sam PARK, Moon Gyu Jang, Younghoon Hyun, Myungsim Jun, Taehyoung Zyung
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Publication number: 20120161001Abstract: In one embodiment, a dual-band focal plane array includes a readout circuit (ROIC), and a plurality of electro-optical (EO) polymer pixels for absorbing visible and/or short wave infrared (SWIR) radiation, each of the EO polymer pixels electrically coupled to the ROIC. The detector further includes a plurality of microbolometers for detecting long wave infrared (LWIR) radiation, each microbolometer electrically coupled to the ROIC via contact legs disposed between adjacent microbolometers and between adjacent EO polymer pixels. A method of fabricating a focal plane array is also provided.Type: ApplicationFiled: December 23, 2010Publication date: June 28, 2012Applicant: FLIR SYSTEMS, INC.Inventor: Richard E. Bornfreund
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Publication number: 20120160292Abstract: A thermoelectric device includes: a substrate; a first nanowire of a first conductive type, which is formed on one side of the substrate; a second nanowire of a second conductive type, which is opposed to the first nanowire; a high temperature part commonly connected to one end of the first nanowire and one end of the second nanowire; low temperature parts connected to the other end of the first nanowire and the other end of the second nanowire, respectively; an insulation layer formed on the first nanowire and the second nanowire; a first metal layer formed on a portion of the insulation layer over the first nanowire, so as to control an electric potential of the first nanowire; and a second metal layer formed on a portion of the insulation layer over the second nanowire, so as to control an electric potential of the second nanowire.Type: ApplicationFiled: December 13, 2011Publication date: June 28, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Moon Gyu JANG, Young Sam Park, Younghoon Hyun, Myungsim Jun, Taehyoung Zyung
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Patent number: 8207008Abstract: A solar device is provided, comprising a substrate structure having a surface region, a flexible and conformal material comprising a polymer material affixing the surface region, and one or more solar cells spatially provided by one or more films of materials characterized by a thickness dimension of 25 microns and less and mechanically coupled to the flexible and conformal material. The one or more solar cells have a flexible characteristic. The flexible characteristic maintains each of the solar cells substantially free from any damage or breakage thereto when the one or more films of materials is subjected to bending.Type: GrantFiled: March 18, 2009Date of Patent: June 26, 2012Assignee: Stion CorporationInventor: Chester A. Farris, III
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Patent number: 8207010Abstract: It is an object to form a high-quality crystalline semiconductor layer directly over a large-sized substrate with high productivity without reducing the deposition rate and to provide a photoelectric conversion device in which the crystalline semiconductor layer is used as a photoelectric conversion layer. A photoelectric conversion layer formed of a semi-amorphous semiconductor is formed over a substrate as follows: a reaction gas is introduced into a treatment chamber where the substrate is placed; and a microwave is introduced into the treatment chamber through a slit provided for a waveguide that is disposed in approximately parallel to and opposed to the substrate, thereby generating plasma. By forming a photoelectric conversion layer using such a semi-amorphous semiconductor, a rate of deterioration in characteristics by light deterioration is decreased from one-fifth to one-tenth, and thus a photoelectric conversion device that has almost no problems for practical use can be obtained.Type: GrantFiled: May 23, 2008Date of Patent: June 26, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai