Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing be overcome to provide reduced critical dimension elements.

Abstract: Embodiments of the invention provide methods of forming photovoltaic or thermoelectric materials, including photovoltaic or thermoelectric films. In one embodiment, the invention provides a method of forming a photovoltaic material, the method comprising: depositing an inorganic capped nanoparticle solution onto a substrate; and heating the substrate.

Abstract: A multi-layer superlattice quantum well thermoelectric material comprising at least 10 alternating layers has a layer thickness of each less than 50 nm, the alternating layers being electrically conducting and barrier layers, wherein the layer structure shows no discernible interdiffusion leading to a break-up or dissolution of the layer boundaries upon heat treatment at a temperature in the range from 50 to 150° C. for a time of at least 100 hours and the concentration of doping materials in the conducting layers is 1018 to 1023 cm?3 and in the barrier layers is 1013 to 1018 cm?3.

Abstract: In order to achieve a thermoelectric transducer exhibiting a higher conversion efficiency and an electronic apparatus including such a thermoelectric transducer, a thermoelectric conversion device is provided, including a semiconductor stacked structure including semiconductor layers stacked with each other, the semiconductor layers being made from different semiconductor materials, in which a material and a composition of each semiconductor layer in the semiconductor stacked structure are selected so as to avoid conduction-band or valence-band discontinuity.

Abstract: A method of assembling a bent circuit chip package and a circuit chip package having a bent structure. The circuit chip package includes: a substrate having a first coefficient of thermal expansion (CTE); a circuit chip, having a second CTE, mounted onto the substrate; a metal foil disposed on the circuit chip in thermal contact with the chip; a metal lid having (i) a third CTE that is different from the first CTE and (ii) a bottom edge region, where the metal lid is disposed on the metal foil in thermal contact with the metal foil; and an adhesive layer along the bottom edge of the metal lid, cured at a first temperature, bonding the lid to the substrate, producing an assembly which, at a second temperature, is transformed to a bent circuit chip package.

Abstract: A phase change memory device includes a plurality of word lines, a plurality of bit lines disposed to be crossed with the plurality of word lines, switching devices disposed at intersections of the plurality of word lines and the plurality of bit lines, heating electrodes connected to the switching devices respectively, heat absorbing layers disposed between adjacent heating electrodes, and phase change layers formed on the heating electrodes and the heat absorbing layers and extended in the same direction of the bit line.

Abstract: Methods for forming a semiconductor device comprising a semiconductor substrate are provided. In accordance with an exemplary embodiment, a method comprises forming a channel layer overlying the semiconductor substrate, forming a channel capping layer having a first surface overlying the channel layer, oxidizing the first surface of the channel capping layer, and depositing a high-k dielectric layer overlying the channel capping layer.

Abstract: New thermoelectric materials comprise highly [111]-oriented twinned group IV alloys on the basal plane of trigonal substrates, which exhibit a high thermoelectric figure of merit and good material performance, and devices made with these materials.

Abstract: A thermistor structure includes a multilayer structure of at least one quantum layer surrounded by barrier layers in a multilayer structure. The quantum layer includes Ge and may be in the form of either a quantum well or quantum dots. The barrier layer is a carbon-doped Si layer, and the thermistor is intended to provide a way to compensate for the strain in a multilayer IR-detector structure through carbon doping of the quantum layer and barrier layers.

Abstract: This disclosure discusses various methods for manufacturing uncooled infrared detectors by using foundry-defined silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) wafers, each of which may include a substrate layer, an insulation layer having a pixel region and a wall region surrounding the pixel region, a pixel structure formed on the pixel region of the insulation layer, a wall structure formed adjacent to the pixel structure and on the wall region of the insulation layer, a dielectric layer covering the pixel structure and the wall structure, a pixel mask formed within the dielectric layer and for protecting the pixel structure during a dry etching process, and a wall mask formed within the dielectric layer and for protecting the wall structure during the dry etching process, thereby releasing a space defined between the wall structure and the pixel structure after the dry etching process.

Abstract: Methods of fabrication of a thermoelectric module from thin film thermoelectric material are disclosed. In general, a thin film thermoelectric module is fabricated by first forming an N-type thin film thermoelectric material layer and one or more metallization layers on a substrate. The one or more metallization layers and the N-type thin film thermoelectric material layer are etched to form a number of N-type thermoelectric material legs. A first electrode assembly is then bonded to a first portion of the N-type thermoelectric material legs, and the first electrode assembly including the first portion of the N-type thermoelectric material legs is removed from the substrate. In a similar manner, a second electrode assembly is bonded to a first portion of a number of P-type thermoelectric material legs. The first and second electrode assemblies are then bonded using a flip-chip bonding process to complete the fabrication of the thermoelectric module.

Abstract: Conventional “on-chip” or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples are provided that employ different thicknesses of thermal insulators to help create thermal differentials within an integrated circuit. By using these thermal insulators, standard manufacturing processes can be used to lower cost, and the mechanical sensitivity of the thermocouple is greatly decreased. Additionally, other features (which can be included through the use of standard manufacturing processes) to help trap and dissipate heat appropriately.

Abstract: The invention is a thermoelectric device fabricated by growing a single crystal AlInN semiconductor material on a substrate, and a method of fabricating same. In a preferred embodiment, the semiconductor material is AlInN grown on and lattice-matched to a GaN template on a sapphire substrate, and the growth is performed using metalorganic vapor phase epitaxy (MOVPE).

Abstract: The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips.

Abstract: A pyroelectric detector includes a pyroelectric detection element, a support member, a fixing part and a first reducing gas barrier layer. A first side of the support member faces a cavity and the pyroelectric detection element is mounted and supported on a second side opposite from the first side. An opening part communicated with the cavity is formed on a periphery of the support member in plan view from the second side of the support member. The fixing part supports the support member. The first reducing gas barrier layer covers a first surface of the support member on the first side, a side surface of the support member facing the opening part, and a part of a second surface of the support member on the second side and the pyroelectric detection element exposed as viewed from the second side of the support member.

Abstract: A thermoelectric structure for cooling an integrated circuit (IC) chip comprises a first type superlattice layer formed on top of the IC chip connected to a first voltage, and a second type superlattice layer formed on the bottom of the IC chip connected to a second voltage, the second voltage being different from the first voltage, wherein an power supply current flows through the first and second type superlattice layer for cooling the IC chip.

Abstract: A temperature sensor includes a semiconductor substrate and a quantum well structural part disposed on the semiconductor substrate. The semiconductor substrate is made of a plurality of elements. The quantum well structural part has a resistance value that changes with temperature. The quantum well structural part includes a plurality of semiconductor layers made of the elements. The semiconductor layers include a plurality of quantum barrier layers and a quantum well layer disposed between the quantum barrier layers. When the semiconductor substrate has a lattice constant “a,” each of the quantum barrier layers has a lattice constant “b,” and the quantum well layer has a lattice constant “c,” the semiconductor substrate, the quantum barrier layers, and the quantum well layer satisfy a relationship of b<a<c or c<a<b.

Abstract: P-type semiconductor sheets and n-type semiconductor sheets formed by mixing a powder of semiconductor material, a binder resin, a plasticizer, and a surfactant are prepared. In addition, separator sheets formed by mixing a resin such as PMMA and a plasticizer are prepared. Through holes are formed in each of the separator sheets and then filled with a conductive material. Thereafter, the p-type semiconductor sheet, the separator sheet, the n-type semiconductor sheet and the separator sheet are stacked. The resultant laminated body is cut into a predetermined size and then subjected to a baking process.

Abstract: A thermoelectric device includes: a first region; a second region; and a thermoelectric body disposed between the first region and the second region, where the thermoelectric body includes a vacancy.

Abstract: In various embodiments of the present invention, a thermoelectric device is provided. The thermoelectric device includes one or more thermoelements that transfer heat across the ends of the thermoelectric device. A method for creating the thermoelectric device includes forming a metal substrate, and etching one or more surfaces of the metal substrate to form etched portions. The unetched flat portions on the metal substrate are referred to as mesa cores. Thereafter, thermoelectric films are deposited on the one or more surfaces of the metal substrate. The deposition of the thermoelectric films on the mesa cores results in the formation of a thermoelement.

Abstract: A thermo-mechanical cleavable structure is provided and may be used as a programmable fuse for integrated circuits. As applied to a programmable fuse, the thermo-mechanical cleavable structure includes an electrically conductive cleavable layer adjacent to a thermo-mechanical stressor. As electricity is passed through the cleavable layer, the cleavable layer and the thermo-mechanical stressor are heated and gas evolves from the thermo-mechanical stressor. The gas locally insulates the thermo-mechanical stressor, causing local melting adjacent to the bubbles in the thermo-mechanical stressor and the cleavable structure forming cleaving sites. The melting also interrupts the current flow through the cleavable structure so the cleavable structure cools and contracts. The thermo-mechanical stressor also contracts due to a phase change caused by the evolution of gas therefrom. As the thermo-mechanical cleavable structure cools, the cleaving sites expand causing gaps to be permanently formed therein.

Abstract: The present invention relates to an integrated device, comprising a semiconductor device formed on a semiconductor substrate, a temperature sensing element formed within a semi-conductive layer formed on the semiconductor substrate, an electrically insulating layer formed over the semi-conductive layer, a metal layer formed over the insulation layer and forming an electrical contact of the semiconductor device, and a thermal contact extending from the metal layer through the electrically insulating layer to a first region of the semi-conductive layer, wherein the first region of the semi-conductive layer is electrically isolated from the temperature sensing element. The present invention also relates to a method of forming a temperature sensing element for integration with a semiconductor device.

Abstract: A method for fabricating a micromirror in a wafer, including the steps of: depositing and etching layers forming two arms; etching the wafer such that in the back face only a thin portion of the wafer remains in the region of formation of the micromirror and the arms; performing an anisotropic etch, such that the thin portion remains only in the areas of the micromirror and the arms; and performing an isotropic etch to remove the thin portions under the arms, the etching step for forming the arms being performed following their shape and so as to form holes traversing the arms, the holes being positioned at edges of the region separating the micromirror and the wafer on both the side of the micromirror and the side of the portions of the wafer remaining after the anisotropic etching step. The invention also concerns the micromirror.

Abstract: A method of manufacturing a semiconductor device is disclosed. The method comprises: applying a sensing layer with variation in a secondary attribute according to heat, on a handle wafer; patterning the sensing layer, thus forming a cavity; forming a sensing part pattern having a beam structure in the cavity; forming a light-absorbing layer for converting energy of incident photons into heat, along the sensing part pattern; turning the entire structure over, removing the handle wafer, and thus exposing a rear portion of the sensing part pattern; and forming an additional light-absorbing layer on a rear portion of the light-absorbing layer formed on the sensing part pattern, thereby forming a sensing structure part having a beam structure.

Abstract: An infrared sensor according to the present invention includes a semiconductor substrate, a thin-film pyroelectric element made of lead titanate zirconate and disposed on the semiconductor substrate, a coating film coating the pyroelectric element and having a topmost surface that forms a light receiving surface for infrared rays, and a cavity formed to a shape dug in from a top surface of the semiconductor substrate at a portion opposite to the pyroelectric element and thermally isolates the pyroelectric element from the semiconductor substrate.

Abstract: Exemplary embodiments of the invention include a thermoelectric material having an aligned polarization field along a central axis of the material. Along the axis are a first atomic plane and a second atomic plane of substantially similar area. The planes define a first volume and form a single anisotropic crystal. The first volume has a first outer surface and a second outer surface opposite the first outer surface, with the outer surfaces defining the central axis passing through a bulk. The bulk polarization field is formed from a first electrical sheet charge and a second opposing electrical sheet charge, one on each atomic plane. The opposing sheet charges define a bulk polarization field aligned with the central axis, and the bulk polarization field causes asymmetric thermal and electrical conductivity through the first volume along the central axis.

Abstract: A PCRAM cell has a gradated or layered resistivity bottom electrode with higher resistivity closer to a phase change material, to provide partial heating near the interface between the cell and the bottom electrode, preventing separation of the amorphous GST region from the bottom electrode, and reducing the programming current requirements. The bottom electrode can also be tapered to have a smaller cross-sectional area at the top of the bottom electrode than at the bottom of the bottom electrode.

Abstract: Provided are a thermoelectric device and a method of forming the same, a temperature sensing sensor, and a heat-source image sensor using the same. The thermoelectric device includes a first nanowire and a second nanowire, a first silicon thin film, a second silicon thin film, and a third silicon thin film. The first nanowire and a second nanowire are disposed on a substrate. The first nanowire and the second nanowire are separated from each other. The first silicon thin film is connected to one end of the first nanowire. The second silicon thin film is connected to one end of the second nanowire. The third silicon thin film is connected to the other ends of the first nanowire and the second nanowire. The first and second nanowires extend in a direction parallel to an upper surface of the substrate.

Abstract: For the thin-film thermo-electric generator and fabrication method of this invention, a P-type thermo-electric thin-film layer, an insulating thin-film layer and a N-type thermo-electric thin-film layer is deposited on a substrate to form a three-layer PN junction, multiple three-layer PN junctions in series are available, an insulating thin-film layer is provided between every to serial three-layer PN junctions, and electrodes are extracted from the substrate and the outermost thin-film layer of the last three-layer thin-film PN junctions.

Abstract: Silicon substrates are applied to the package structure of solid-state lighting devices. Wet etching is performed to both top and bottom surfaces of the silicon substrate to form reflecting cavity and electrode access holes. Materials of the reflecting layer and electrode can be different from each other whose preferred materials can be chosen in accordance with a correspondent function. Formation of the electrode can be patterned by an etching method or a lift-off method.

Abstract: A method for manufacturing a MEMS device having an undercut shape formed on a fixed part includes a first step of forming an etching layer having a first cavity on the fixed part; a second step of forming a mask layer on a side wall of the etching layer, the side wall facing the first cavity; and a third step of directing an etchant fed into the first cavity on a surface side of the mask layer to a back surface side of the mask layer, isotropically etching the etching layer, forming a second cavity communicated with the first cavity on the back surface side of the mask layer, and processing the etching layer into an undercut shape.

Abstract: An optical device includes a semiconductor substrate (11) on which a light receiving part (12) (or a light emitting part) and electrodes (13) are formed, and a translucent plate (2) bonded on the light receiving part (12) with a translucent adhesive (5), the semiconductor substrate (11) having a plurality of convex portions (31) formed so as to separate the light receiving part (12) and the electrodes (13) and have proper gaps (32) therebetween.

Abstract: Embodiments relate to a semiconductor device and a method for fabricating the same. According to embodiments, a semiconductor device may include a metal film spaced from a semiconductor substrate at a predetermined interval and in which a plurality of etching holes are formed. A bottom metal pattern disposed on and/or over a space between the semiconductor substrate and metal film and top metal pattern formed on and/or over the bottom metal pattern may be provided. A pillar may be formed on and/or over the semiconductor substrate and may support one side of a low surface of the bottom metal pattern. A pad may be formed on and/or over the semiconductor substrate, and an air layer corresponding to the bottom metal pattern may be inserted therein. According to embodiments, a pyro-electric switch transistor using a bi-metal with different coefficients of thermal expansion may be provided.

Abstract: An embodiment of a process for realizing a system for recovering heat is described, the process comprising the steps of: formation on a substrate of a plurality of L-shaped down metal structures; deposition of a dielectric layer on the substrate and the plurality of L-shaped down metal structures by using a screen printing approach; definition and opening in the dielectric layer of upper contacts and lower contacts of the L-shaped down metal structures; formation of a plurality of L-shaped up metal structures being connected to the plurality of L-shaped down metal structure in correspondence of the upper and lower contacts so as to form a plurality of serially connected thermocouples, each comprising at least one L-shaped down metal structure and at least one L-shaped up metal structure, being made of different metal materials and interconnected at a junction, the serially connected thermocouples thus realizing the system for recovering heat.

Abstract: The present invention discloses a method of forming Peltier diodes comprising providing a substrate and forming a conductive pattern over the substrate. An isolation layer is formed over the conductive pattern; followed by forming cavities in the isolation layer and refilling a semiconductor layer into the cavities, thereby forming a first and a second semiconductors, wherein the first and second semiconductors are formed by silicon or III-V group material; A Peltier junction is formed on the isolation layer to connect the first and the second semiconductors, thereby forming the Peltier diodes, wherein electricity is applied to the Peltier diodes for transferring heat.

Abstract: Provided are a flexible thermoelectric generator, a wireless sensor node including the same and a method of manufacturing the same. The flexible thermoelectric generator includes a plurality of P-type semiconductors and a plurality of N-type semiconductors, which are alternately arranged, an upper metal for connecting upper surfaces of the adjacent P-type semiconductor and N-type semiconductor, a lower metal for connecting lower surfaces of the adjacent P-type semiconductor and N-type semiconductor, and alternately disposed with respect to the upper metal, a P-type metal connected to at least one P-type semiconductor among the plurality of P-type semiconductors, and an N-type metal connected to at least one N-type semiconductor among the plurality of N-type semiconductors.

Abstract: A thermoelectric element for use in a thermoelectric device, the thermoelectric element includes a porous substrate coated with one or more materials, at least one of which is a thermoelectric material. There is also a method for making a thermoelectric element including providing a porous substrate and applying a coating of a thermoelectric material to the porous substrate.

Abstract: A method of manufacturing a phase change memory device is provided. A first insulating layer having a plurality of metal word lines spaced apart at a constant distance is formed on a semiconductor substrate. A plurality of line structures having a barrier metal layer, a polysilicon layer and a hard mask layer are formed to be overlaid on the plurality of metal word lines. A second insulating layer is formed between the line structures. Cross patterns are formed by etching the hard mask layers and the polysilicon layers of the line structures using mask patterns crossed with the metal word lines. A third insulating layer is buried within spaces between the cross patterns. Self-aligned phase change contact holes are formed and at the same time, diode patterns formed of remnant polysilicon layers are formed by selectively removing the hard mask layers constituting the cross patterns.

Abstract: A thermoelectric segment and a method for fabricating. The fabricating includes forming structures by depositing thin-film metal-semiconductor multilayers on substrates and depositing metal layers on the multilayers, joining metal bonding layers to form dual structures with combined bonding layers; and removing at least one of the substrates; and using the dual structure to form a thermoelectric segments. The method can include dicing the dual structures before or after removing the substrates. The method can include depositing additional bonding layers and joining dual structures to make thermoelectric segments of different thicknesses. Each multilayer can be about 5-10 ?m thick. Each bonding layer can be about 1-2 ?m thick. The bonding layers can be made of a material having high thermal and electrical conductivity. The multilayers can be (Hf,Zr,Ti,W)N/(Sc,Y,La,Ga,In,Al)N superlattice layers. Metal nitride layers can be deposited between each of the bonding layers and multilayers.

Abstract: In the method for manufacturing the infrared image sensor, first, a thermal insulation layer (33) is made by forming a silicon dioxide film (31) on a first area (A1) followed by forming a silicon nitride film (32) on the silicon dioxide film (31). The silicon dioxide film (31) has compression stress. The first area (A1) is reserved in a surface of a silicon substrate (1) for forming an infrared detection element (3). The silicon nitride film (32) has tensile stress. Next, a well region (41) is formed in a second area (A2) reserved in the surface of the silicon substrate (1) for forming a MOS transistor (4). After that, a gate insulation film (45) of the MOS transistor (4) is formed by means of thermal oxidation of the surface of the silicon substrate (1). Thereafter, a temperature detection element (36) is formed on the thermal insulation layer (33). Subsequently, a drain region (43) and a source region (44) of the MOS transistor (4) are formed in the well region (41).

Abstract: An integrated device includes a Seebeck device (4) integrated in a substrate (2). A heat-generating device (6) warms up the Seebeck device (4) generating electrical power. The Seebeck device powers a further device which may be a micro-battery (8) likewise integrated in the substrate or a Peltier effect device for cooling another heat-generating device.

Abstract: The invention relates to a thermoelectrically active p- or n-conductive semiconductor material constituted by a compound of the general formula (I) (PbTe)1?x(Sn2±ySb2±zTe5)x??(I) with 0.0001?x?0.5, 0?y<2 and 0?z<2, wherein 0 to 10% by weight of the compound may be replaced by other metals or metal compounds, wherein the semiconductor material has a Seebeck coefficient of at least |S|?60 ?V/K at a temperature of 25° C. and electrical conductivity of at least 150 S/cm and power factor of at least 5 ?W/(cm·K2), further relates to a process for the preparation of such semiconductor materials, as well as to generators and Peltier arrangements containing them.

Abstract: The present invention discloses a gas pendulum style level posture sensing chip and its manufacturing method and a level posture sensor. The gas pendulum style level posture sensing chip includes: a semiconductor substrate; two sets of arm thermosensitive fuses formed on the surface of the semiconductor substrate, each set of the thermosensitive fuses including two thermosensitive fuses in parallel to each other, the two sets of thermosensitive fuses being vertical to each other; electrodes formed at the two ends of the thermosensitive fuses. For the level posture sensing chip and sensor provided by the present invention, the parallelism and verticality of the thermosensitive fuses is high in precision such that the more accurate measurement can be implemented.

Abstract: A uniwafer device for thermoelectric applications includes one or more first thermoelectric elements and one or more second thermoelectric elements comprising respectively a first and second patterned portion of a substrate material. Each first/second thermoelectric element is configured to be functionalized as an n-/p-type semiconductor with a thermoelectric figure of merit ZT greater than 0.2. The second patterned portion is separated from the first patterned portion by an intermediate region functionalized partially for thermal isolation and/or partially for electric interconnecting. The one or more first thermoelectric elements and the one or more second thermoelectric elements are spatially configured to allow formation of a first contact region and a second contact region respectively connecting to each of the one or more first thermoelectric elements and/or each of the one or more second thermoelectric elements to form a continuous electric circuit.

Abstract: A new fabrication method for nanovoids-imbedded bismuth telluride (Bi—Te) material with low dimensional (quantum-dots, quantum-wires, or quantum-wells) structure was conceived during the development of advanced thermoelectric (TE) materials. Bismuth telluride is currently the best-known candidate material for solid-state TE cooling devices because it possesses the highest TE figure of merit at room temperature. The innovative process described here allows nanometer-scale voids to be incorporated in Bi—Te material. The final nanovoid structure such as void size, size distribution, void location, etc. can be also controlled under various process conditions.

Abstract: The invention relates to a method for production of at least one thermoelectric apparatus with the steps of: preparation of a first wafer (1) which is formed from a thermoelectric material of a first conductivity type; preparation of a second wafer which is formed from a thermoelectric material of a second conductivity type; structuring of the first wafer (1) so that a group of first thermoelectric structures (7) is produced; structuring of the second wafer so that a group of second thermoelectric structures is produced; linking of the first to the second wafer in such a manner that the first and the second thermoelectric structures are electrically connected together and thus form the thermoelectric apparatus. According to the invention, before the structuring of the first wafer (1), a first contact material (3) is deposited on the first wafer (1) and/or before the structuring of the second wafer, a second contact material is deposited onto the second wafer.

Abstract: An integrated circuit chip is defined by a stack of several interconnected layers. The integrated circuit chip includes at least two layers of dissimilar metal patterned to define an array of integrated bimetallic thermocouples.

Abstract: The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips.

Abstract: A thermoelectric module comprised of a quantum well thermoelectric material with low thermal conductivity and low electrical resitivity (high conductivity) for producing n-legs and p-legs for thermoelectric modules. These qualities are achieved by fabricating crystalline quantum well super-lattice layers on a substrate material having very low thermal conductivity. Prior to depositing the super-lattice thermoelectric layers the low thermal conductivity substrate is coated with a thin layer of crystalline semi-conductor material, preferably silicon. This greatly improves the thermoelectric quality of the super-lattice quantum well layers. In preferred embodiments the super-lattice layers are about 4 nm to 20 nm thick. In preferred embodiments about 100 to 1000 of these super-lattice layers are deposited on each substrate layer, to provide films of super-lattice layers with thicknesses of in the range of about 0.4 microns to about 20 microns on much thicker substrates.

Abstract: A thermoelectric conversion module which has a P-type thermoelectric conversion material and an N-type thermoelectric conversion material electrically connected to each other. The P-type thermoelectric conversion material and the N-type thermoelectric conversion material are joined with insulating material particles (ceramic spherical particles) interposed therebetween, so as not to be electrically connected to each other.