Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/64)
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Patent number: 8657993Abstract: A process of manufacturing a solar cell module, the process comprising: (i) providing a solar cell pre-laminate assembly comprising a solar cell component comprising one or a plurality of solar cells and an encapsulant film or sheet consisting essentially of a non-neutralized acid copolymer composition prepared from (a) non-neutralized acid copolymer of an alpha olefin and about 15 to about 23 wt % of alpha,beta-ethylenically unsaturated carboxylic acid having 3 to 8 carbons, based on the total weight of the acid copolymer, wherein the acid copolymer has a Melt Index of greater than 100 to about 600 g/10 min, and (b) about 0.01 to about 10 wt %, based upon the total weight of the acid copolymer composition, of organic peroxide; and (ii) laminating the pre-laminate assembly to form the solar cell module by subjecting the assembly to heat and, optionally, vacuum.Type: GrantFiled: December 13, 2011Date of Patent: February 25, 2014Assignee: E I du Pont de Nemours and CompanyInventors: Richard Allen Hayes, Sam Louis Samuels, Matthew Scott Hall
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Publication number: 20140049923Abstract: A method of preparing a surface for deposition of a thin film thereon, wherein the surface including a plurality of protrusions extending therefrom and having shadowed regions, includes locally treating at least one of the protrusions.Type: ApplicationFiled: August 20, 2012Publication date: February 20, 2014Applicant: UNIVERSAL DISPLAY CORPORATIONInventors: Ruiqing Ma, Chuanjun Xia, Prashant Mandlik
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Patent number: 8652866Abstract: A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element.Type: GrantFiled: January 3, 2013Date of Patent: February 18, 2014Assignee: Infineon Technologies AGInventors: Klaus Elian, Georg Meyer-Berg, Horst Theuss
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Publication number: 20140042488Abstract: A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor element on the first and/or second electrically conductive member; covering the optical-semiconductor element by a sealing member formed from a translucent resin; and obtaining individual optical-semiconductor devices after removing the support substrate.Type: ApplicationFiled: October 21, 2013Publication date: February 13, 2014Applicant: NICHIA CORPORATIONInventors: Masato FUJITOMO, Hiroto TAMAKI, Shinji NISHIJIMA, Yuichiro TANDA, Tomohide MIKI
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Publication number: 20140042607Abstract: A sealable microelectronic device providing mechanical stress endurance which includes a semiconductor substrate and a method of manufacture. A substantially continuous sealing element is positioned adjacent an outer periphery and between a microelectronic component and the semiconductor substrate, or another microelectronic component. The sealing element seals the microelectronic component to the substrate or another microelectronic component, and provides structural support to the microelectronic device.Type: ApplicationFiled: October 18, 2013Publication date: February 13, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: John U. Knickerbocker
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Publication number: 20140041717Abstract: Improved solar cells are provided by nano-structuring the solar cell active region to provide high optical absorption in a thin structure, thereby simultaneously providing high optical absorption and high carrier collection efficiency. Double-sided nano-structuring is considered, where both surfaces of the active region are nano-structured. In cases where the active region is disposed on a substrate, nano-voids are present between the substrate and the active region, as opposed to the active region being conformally disposed on the substrate. The presence of such nano-voids advantageously increases both optical and electrical confinement in the active region.Type: ApplicationFiled: August 9, 2013Publication date: February 13, 2014Inventors: Dong Liang, Yijie Huo, Yangsen Kang, James S. Harris, JR.
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Publication number: 20140034126Abstract: A solar cell module includes a substrate, a lower electrode on the substrate, a light absorption layer on the lower electrode, an upper electrode on the light absorption layer, and a protective layer on the upper electrode, the protective layer extending along sidewalls of the light absorption layer to the lower electrode, the protective layer including a moisture absorbing material.Type: ApplicationFiled: July 30, 2013Publication date: February 6, 2014Applicant: Samsung SDI Co., LtdInventors: Jung-Yup YANG, Young-Kyoung AHN, Bong-Kyoung PARK, Yury Lebedev
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Patent number: 8637341Abstract: A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated.Type: GrantFiled: March 12, 2008Date of Patent: January 28, 2014Assignee: Infineon Technologies AGInventors: Ralf Otremba, Josef Hoeglauer, Helmut Strack, Xaver Schloegel
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Publication number: 20140020734Abstract: An edge seal extruded onto at least a portion of one or more edges of a photovoltaic module is disclosed. A method for making a photovoltaic module comprising an extruded edge seal is also disclosed.Type: ApplicationFiled: July 17, 2013Publication date: January 23, 2014Inventors: Christopher Baker, Casimir Kotarba, Karina Krawczyk, Paul Nawrocki, Nicholas St. John
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Patent number: 8633051Abstract: An object is to prevent a reduction of definition (or resolution) (a peripheral blur) caused when reflected light enters a photoelectric conversion element arranged at a periphery of a photoelectric conversion element arranged at a predetermined address. A semiconductor device is manufactured through the steps of: forming a structure having a first light-transmitting substrate, a plurality of photoelectric conversion elements over the first light-transmitting substrate, a second light-transmitting substrate provided so as to face the plurality of photoelectric conversion elements, a sealant arranged so as to bond the first light-transmitting substrate and the second light-transmitting substrate and surround the plurality of photoelectric conversion elements; and thinning the first light-transmitting substrate by wet etching.Type: GrantFiled: August 19, 2010Date of Patent: January 21, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Munehiro Kozuma, Hikaru Tamura, Kazuko Yamawaki, Takashi Hamada, Shunpei Yamazaki
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Publication number: 20140014166Abstract: The present invention provides a solar cell module in which the frame is easily assembled, and in which cracking and chipping of protective members used on the front surface side and back surface side of a solar cell panel can be prevented. The present invention is a solar cell module including a solar cell panel (10) having a plurality of solar cells (11) sealed between a first protective member (12) and a second protective member (13), and a frame (20) mounted on the periphery of the solar cell panel (10). Machined surfaces (12c, 13c) that have been chamfered are provided on the edges of the first protective member (12) and the second protective member (13), respectively, and the machined surface (12c) formed on the first protective member (12) is larger than the machined surface (13c) provided on the second protective member (13).Type: ApplicationFiled: September 17, 2013Publication date: January 16, 2014Applicant: Sanyo Electric Co., Ltd.Inventor: Osamu Endou
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Publication number: 20140014169Abstract: Semiconductor nanostrings, mats containing semiconductor nanostrings, and devices and modules, such as, solar energy generating modules, including semiconductor nanostrings or mats containing semiconductor nanostrings are described herein. Methods for making multi-layer nanostrings and mats and other devices including multi-layer nanostrings are also described.Type: ApplicationFiled: July 15, 2013Publication date: January 16, 2014Inventors: James A. RAND, Scott MORRISON, John BLUM
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Publication number: 20140014179Abstract: A light-modulating electrical device is disclosed and a method for manufacturing a light-modulating electrical device. The method includes, as a single lamination process, positioning a light-modulating electrical unit at least partially within a recess, the recess provided in a first polymer film or an optically transparent polymer film, and fixing the optically transparent polymer film to the first polymer film so as to cover the light-modulating electrical unit. In one example, the light-modulating electrical unit is comprised of two or more sub-units and is itself formed as part of the lamination process.Type: ApplicationFiled: December 9, 2011Publication date: January 16, 2014Applicant: UNIVERSITY OF WOLLONGONGInventors: Gerhard Frederick Swiegers, David Leslie Officer, Gordon George Wallace
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Publication number: 20140014170Abstract: A method of fabricating a thin film photovoltaic device is provided. The method subjects a soda lime glass substrate having a front side, backside, and edges to a first cleaning process and forms a first coating of silicon dioxide overlying the backside and the edges. The method further subjects the substrate to a second cleaning process and forms a second coating of silicon dioxide overlying the front side and the edges of the substrate. Furthermore, the method includes causing a barrier layer comprising the first coating and the second coating to encapsulate entirely the front side, backside, and edges. The barrier layer includes at least a thickness of oxygen rich silicon dioxide to contain any sodium bearing material within the substrate. Moreover, the method includes forming a thickness of metal material overlying the second coating on the front side followed by an absorber material and window material plus a top electrode.Type: ApplicationFiled: September 19, 2012Publication date: January 16, 2014Applicant: Stion CorporationInventors: James H. Whittemore, IV, Laila Dounas, Chester A. Farris, III, Robert D. Wieting
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Publication number: 20140011315Abstract: A semiconductor device is made by providing a semiconductor die having an optically active area, providing a leadframe or pre-molded laminated substrate having a plurality of contact pads and a light transmitting material disposed between the contact pads, attaching the semiconductor die to the leadframe so that the optically active area is aligned with the light transmitting material to provide a light transmission path to the optically active area, and disposing an underfill material between the semiconductor die and leadframe. The light transmitting material includes an elevated area to prevent the underfill material from blocking the light transmission path. The elevated area includes a dam surrounding the light transmission path, an adhesive ring, or the light transmission path itself can be the elevated area. An adhesive ring can be disposed on the dam. A filler material can be disposed between the light transmitting material and contact pads.Type: ApplicationFiled: September 9, 2013Publication date: January 9, 2014Applicant: STATS ChipPAC, Ltd.Inventors: Zigmund R. Camacho, Henry D. Bathan, Lionel Chien Hui Tay, Arnel Senosa Trasporto
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Publication number: 20140008753Abstract: A method of manufacturing a semiconductor device including a first member including a chip mounting region and a peripheral region, a semiconductor chip mounted in the chip mounting region, and a second member fixed to the first member to cover the semiconductor chip, includes adhering, to the second member, the peripheral region of the first member in a state that the semiconductor chip is mounted in the chip mounting region, using an adhesive, and generating a stress between the first member and the second member, after the adhesive starts to cure, to locally form a gap in at least one of a portion between the first member and the adhesive, and a portion between the second member and the adhesive.Type: ApplicationFiled: June 26, 2013Publication date: January 9, 2014Inventors: Koji Tsuduki, Yasushi Kurihara
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Patent number: 8624370Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a device over an integrated circuit having a through via; attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.Type: GrantFiled: March 20, 2009Date of Patent: January 7, 2014Assignee: Stats Chippac Ltd.Inventors: HeeJo Chi, NamJu Cho, Taewoo Lee
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Publication number: 20140000684Abstract: The present invention concerns a method for forming an electrical interconnection in an organic photovoltaic device, the method comprising steps of providing a first conductive layer (31), providing an organic photovoltaic layer (32), over the first conductive layer, providing a second conductive layer (33), over the organic photovoltaic layer, and providing an electrical interconnection between the first conductive layer and the second conductive layer.Type: ApplicationFiled: December 5, 2011Publication date: January 2, 2014Inventor: Jan Blochwitz-Nimoth
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Publication number: 20140000679Abstract: A thin film solar cell module and a method of manufacturing a thin film solar cell module. A thin film solar cell module includes: a thin film solar cell including a first substrate, and a first electrode layer on the first substrate; a second substrate covering the thin film solar cell; and a sealing tape between the thin film solar cell and the second substrate, the sealing tape including a first adhesive layer having a conductivity and being attached to an edge portion of the first electrode layer; a metal layer on the first adhesive layer; and a second adhesive layer on the metal layer and attached to the second substrate.Type: ApplicationFiled: October 2, 2012Publication date: January 2, 2014Applicant: SAMSUNG SDI CO., LTD.Inventors: Young-Kyoung Ahn, Jung-Yup Yang, Bong-Kyoung Park, Yury Lebedev
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Publication number: 20140004646Abstract: A microelectronic assembly for packaging/encapsulating IC devices, which includes a crystalline substrate handler having opposing first and second surfaces and a cavity formed into the first surface, a first IC device disposed in the cavity and a second IC device mounted to the second surface, and a plurality of interconnects formed through the crystalline substrate handler. Each of the interconnects includes a hole formed through the crystalline substrate handler from the first surface to the second surface, a compliant dielectric material disposed along the hole's sidewall, and a conductive material disposed along the compliant dielectric material and extending between the first and second surfaces. The compliant dielectric material insulates the conductive material from the sidewall. The second IC device, which can be an image sensor, is electrically coupled to the conductive materials of the plurality of interconnects. The first IC can be a processor for processing the signals from the image sensor.Type: ApplicationFiled: August 29, 2013Publication date: January 2, 2014Applicant: Optiz, Inc.Inventor: Vage Oganesian
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Patent number: 8618409Abstract: A photovoltaic device includes at least one photovoltaic cell, a flexible glass layer formed over the at least one photovoltaic cell and a transparent and abrasion resistant film which includes an organic-inorganic hybrid material formed over the glass layer.Type: GrantFiled: June 28, 2010Date of Patent: December 31, 2013Assignee: MiaSoleInventors: Todd Krajewski, Kedar Hardikar
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Patent number: 8617975Abstract: Some embodiments include methods of forming semiconductor constructions in which a semiconductor material sidewall is along an opening, a protective organic material is over at least one semiconductor material surface, and the semiconductor material sidewall and protective organic material are both exposed to an etch utilizing at least one fluorine-containing composition. The etch is selective for the semiconductor material relative to the organic material, and reduces sharpness of at least one projection along the semiconductor material sidewall. In some embodiments, the opening is a through wafer opening, and subsequent processing forms one or more materials within such through wafer opening to form a through wafer interconnect. In some embodiments, the opening extends to a sensor array, and the protective organic material is comprised by a microlens system over the sensor array. Subsequent processing may form a macrolens structure across the opening.Type: GrantFiled: June 12, 2012Date of Patent: December 31, 2013Assignee: Micron Technology, Inc.Inventors: Swarnal Borthakur, Richard L. Stocks
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Patent number: 8617413Abstract: A method for encapsulating structures (11) (typically MEMS structures) supported by a carrier substrate (12) (typically made of glass or silicon), includes: application, on the carrier substrate (12), of at least one cover (7) supported by a mould (1, 2, 6), the mould including a catching layer (6), each cover (7) being in contact with the catching layer (6); then fastening of at least one cover (7) onto the carrier substrate (12); and then separation of the mould (1, 2, 6) from the at least one cover (7). The catching layer (6) includes a fluoropolymer. Preferably, the mould (1, 2, 6) is mechanically separated from the at least one cover (7), by pulling the mould (1, 2, 6) away from the at least one cover (7). Thus, the mould (1) can be reused, which considerably simplifies encapsulating operations carried out on an industrial scale.Type: GrantFiled: July 31, 2009Date of Patent: December 31, 2013Assignee: KFM TechnologyInventors: Sebastien Brault, Elisabeth Dufour-Gergam, Martial Desgeorges
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Patent number: 8618624Abstract: The present invention relates to UV curable encapsulant compositions based on acrylic and/or methacrylic block copolymers, to structures containing these compositions especially photovoltaic cells and to the use of these compositions in photovoltaic cells. The liquid encapsulant composition according to the invention comprises: an acrylic or methacrylic block copolymer, at least one acrylic or methacrylic monomer and/or oligomer, and at least one photo initiator.Type: GrantFiled: May 3, 2010Date of Patent: December 31, 2013Assignees: Arkema France, Pythagoras Solar Inc.Inventors: Pierre Gerard, Izhar Halahmi, Pasha Solel
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Patent number: 8618408Abstract: A photovoltaic device includes at least one photovoltaic cell, a flexible glass layer formed over the at least one photovoltaic cell, and a transparent planarizing hardcoat formed on the glass layer. The planarizing hardcoat may be in compressive stress and the glass layer may be in tension.Type: GrantFiled: June 28, 2010Date of Patent: December 31, 2013Assignee: MiaSoleInventors: Todd Krajewski, Kedar Hardikar
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Publication number: 20130340809Abstract: Provided are a dye-sensitized photovoltaic device which can reduce fabrication costs and improve durability, and a fabrication method of such a dye-sensitized photovoltaic device. The dye-sensitized photovoltaic device includes: a first substrate 20; a first electrode 10 disposed on the first substrate; a porous semiconductor layer 12 disposed on the first electrode and including semiconductor fine particles and dye molecules; an electrolysis solution 14 contacted with the porous semiconductor layer and dissolving a redox electrolyte in a solvent; a second electrode 18 contacted with the electrolysis solution; a second substrate 22 disposed on the second electrode; and a sealed part for sealing the electrolysis solution, the sealed part 36 disposed between the second substrate and the first substrate, wherein the sealed part is configured to which a burning body of a paste containing a glass frit is fusion bonded.Type: ApplicationFiled: June 10, 2013Publication date: December 26, 2013Applicant: ROHM CO., LTD.Inventor: Yoichi AOKI
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Publication number: 20130341739Abstract: A package structure is provided, including: a substrate having a ground pad and an MEMS element; a lid disposed on the substrate for covering the MEMS element; a wire segment electrically connected to the ground pad; an encapsulant encapsulating the lid and the wire segment; and a circuit layer formed on the encapsulant and electrically connected to the wire segment and the lid so as to commonly ground the substrate and the lid, thereby releasing accumulated electric charges on the lid so as to improve the reliability of the MEMS system and reduce the number of I/O connections.Type: ApplicationFiled: October 25, 2012Publication date: December 26, 2013Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Hong-Da Chang, Cheng-Hsiang Liu, Kuang-Wei Huang, Chun-Hung Lin, Hsin-Yi Liao
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Publication number: 20130341747Abstract: An embodiment of the invention provides a chip package which includes: a chip including: a semiconductor substrate having a first surface; a device region formed in the semiconductor substrate; and a plurality of micro-lenses on the first surface and the device region; a cover substrate disposed on the chip, wherein the cover substrate is a transparent substrate; a spacer layer disposed between the chip and the cover substrate, wherein the spacer layer, the chip, and the cover substrate collectively surround a cavity in the device region; and at least one main lens on the cover substrate and in the cavity, wherein a width of the main lens is greater than that of each of the micro-lenses.Type: ApplicationFiled: June 19, 2013Publication date: December 26, 2013Inventors: Po-Shen LIN, Tsang-Yu LIU, Yen-Shih HO, Chih-Wei HO, Shih-Chin CHEN
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Publication number: 20130334638Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.Type: ApplicationFiled: June 15, 2012Publication date: December 19, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Szu-Ying Chen, Tzu-Jui Wang, Jen-Cheng Liu, Dun-Nian Yaung, Ping-Yin Liu, Lan-Lin Chao
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Publication number: 20130334643Abstract: An image pickup apparatus includes a semiconductor chip including a light receiving section, a frame-like spacer arranged on the semiconductor chip to surround the light receiving section, a transparent flat plate section arranged on the semiconductor chip via the spacer and having a plan view dimension larger than a plan view dimension of the spacer and smaller than a plan view dimension of the semiconductor chip, and a reinforcing member for filling a gap between the semiconductor chip and the transparent flat plate section on the outer side of the spacer and having a plan view dimension larger than the plan view dimension of the transparent flat plate section and smaller than the plan view dimension of the semiconductor chip.Type: ApplicationFiled: August 26, 2013Publication date: December 19, 2013Applicant: OLYMPUS CORPORATIONInventor: Takatoshi IGARASHI
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Publication number: 20130333754Abstract: A solar cell device and methods for manufacturing the solar cell device are disclosed. The solar cell device includes a translucent base; a solar cell element on the translucent base; a wiring conductive body on the solar cell element; and a sealing member on the wiring conductive body. The sealing member includes an ethylene-vinyl acetate copolymer; and an acid acceptor that is eccentrically located in the sealing member.Type: ApplicationFiled: February 28, 2012Publication date: December 19, 2013Applicant: KYOCERA CORPORATIONInventor: Naoya Itou
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Patent number: 8609451Abstract: Fabrication of a single crystal silicon solar cell with an insitu epitaxially deposited very highly doped p-type silicon back surface field obviates the need for the conventional aluminum screen printing step, thus enabling a thinner silicon solar cell because of no aluminum induced bow in the cell. Furthermore, fabrication of a single crystal silicon solar cell with insitu epitaxial p-n junction formation and very highly doped n-type silicon front surface field completely avoids the conventional dopant diffusion step and one screen printing step, thus enabling a cheaper manufacturing process.Type: GrantFiled: March 19, 2012Date of Patent: December 17, 2013Assignee: Crystal Solar Inc.Inventors: Tirunelveli S. Ravi, Ashish Asthana
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Patent number: 8609454Abstract: A self-assembly apparatus for assembling a plurality of devices with a predetermined aspect ratio is provided. The self-assembly apparatus includes a guiding element, a vibration device, and a magnetic field inducing device. The guiding element has a mesh structure. The vibration device is coupled to the guiding element and configured to vibrate the guiding element. The magnetic field inducing device is disposed below the guiding element and configured to generate a time-varying magnetic field to rotate each of the devices. Through a collective effect of the vibration of the guiding element, the time-varying magnetic field, and the self-gravity of each of the devices, the devices are positioned on a plate between the guiding element and the magnetic field inducing device through the mesh structure.Type: GrantFiled: July 17, 2012Date of Patent: December 17, 2013Assignee: Industrial Technology Research InstituteInventors: Ming-Ji Dai, Chun-Kai Liu, Heng-Chieh Chien, Li-Ling Liao, Ker-Win Wang, Yen-Lin Tzeng, Yan-Bo Lin
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Patent number: 8610150Abstract: A leadframe includes two spaced apart conductive legs, each of which includes a base section, and a first extension section extending from a bottom end of the base section in a direction away from the other one of the conductive legs. At least one of the conductive legs further includes a second extension section that extends from a top end of the base section thereof in the same direction as the first extension section for fixing the light-emitting diode chip. The heat generated by the light-emitting diode chip can be dissipated through a shortest heat-dissipating route, thereby increasing the heat-dissipating rate.Type: GrantFiled: December 14, 2011Date of Patent: December 17, 2013Assignee: Lextar Electronics CorporationInventors: Wei-An Chen, Yen-Chih Chou
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Patent number: 8610048Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.Type: GrantFiled: September 22, 2011Date of Patent: December 17, 2013Assignee: STMicroelectronics S.A.Inventors: Jerome Alieu, Simon Guillaumet, Christophe Legendre, Hughes Leininger, Jean-Pierre Oddou, Marc Vincent
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Patent number: 8609466Abstract: A cap and substrate having an electrical connection at a wafer level includes providing a substrate and forming an electrically conductive ground structure in the substrate and electrically coupled to the substrate. An electrically conductive path to the ground structure is formed in the substrate. A top cap is then provided, wherein the top cap includes an electrically conductive surface. The top cap is bonded to the substrate so that the electrically conductive surface of the top cap is electrically coupled to the path to the ground structure.Type: GrantFiled: July 15, 2009Date of Patent: December 17, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jung-Huei Peng
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Patent number: 8609470Abstract: A substrate-free semiconducting sheet has an array of semiconducting elements dispersed in a matrix material. The matrix material is bonded to the edge surfaces of the semiconducting elements and the substrate-free semiconducting sheet is substantially the same thickness as the semiconducting elements.Type: GrantFiled: April 16, 2012Date of Patent: December 17, 2013Assignee: Goldeneye, Inc.Inventors: Karl W. Beeson, Scott M. Zimmerman, William R. Livesay, Richard L. Ross
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Publication number: 20130328147Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region disposed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure disposed in the dielectric layer and electrically connected to the device region, a carrier substrate disposed on the dielectric layer; and a conducting structure disposed in a bottom surface of the carrier substrate and electrically contacting with the conducting pad structure.Type: ApplicationFiled: June 7, 2013Publication date: December 12, 2013Inventors: Yen-Shih HO, Ying-Nan WEN, Tsang-Yu LIU
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Patent number: 8604605Abstract: A method of forming a microelectronic assembly includes positioning a support structure adjacent to an active region of a device but not extending onto the active region. The support structure has planar sections. Each planar section has a substantially uniform composition. The composition of at least one of the planar sections differs from the composition of at least one of the other planar sections. A lid is positioned in contact with the support structure and extends over the active region. The support structure is bonded to the device and to the lid.Type: GrantFiled: January 5, 2007Date of Patent: December 10, 2013Assignee: Invensas Corp.Inventors: Michael J. Nystrom, Giles Humpston
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Publication number: 20130323874Abstract: A solar cell module is manufactured by coating and curing a curable silicone gel composition onto one surface of each of two panels except a peripheral region to form a cured silicone gel coating, providing a seal member (3) on the peripheral region of one panel (1a), placing a solar cell component (4) on the cured silicone gel coating on one panel, placing the other panel (1b) on the one panel so that the seal member (3) abuts against the peripheral region of the other panel, and the solar cell component is sandwiched between the panels, and heat pressing the panels (1a, 1b) in vacuum for encapsulating the solar cell component (4).Type: ApplicationFiled: May 29, 2013Publication date: December 5, 2013Inventors: Tomoyoshi Furihata, Atsuo Ito, Hiroto Ohwada, Hyung-Bae Kim, Naoki Yamakawa
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Publication number: 20130319518Abstract: A solar module having a connecting element is described. The solar module has a substrate, a back electrode layer, a photovoltaically active absorber layer, and a cover pane disposed one over the other, at least one prefabricated conductive film at least one connection housing.Type: ApplicationFiled: October 24, 2011Publication date: December 5, 2013Inventors: Matthias Doech, Christoph Degen, Robert Gass, Thomas Happ, Franz Karg, Lothar Lesmeister, Jan Boris Philipp, Mitja Rateiczak, Jaap Van Der Burgt, Andreas Schlarb, Bernhard Reul
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Publication number: 20130322476Abstract: Controlled-impedance out-of-substrate package structures employing electrical devices and related assemblies, components, and methods are disclosed. An out-of-substrate package structure may be used to electrically couple an electrical device to an electrical substrate, for example a printed circuit board. The out-of-substrate package structure may be electrically coupled to the electrical substrate. Ground paths of the out-of-substrate package structure may be arranged proximate to the electrical device and arranged symmetric with respect to at least one geometric plane intersecting the electrical device. In this regard, electric field lines generated by current flowing into the electrical device tend to terminate at the return or ground paths allowing for impedance to be more easily controlled. Accordingly, the out-of-substrate package structure may be impedance matched in a better way with respect to power provided from the electrical substrate enabling faster electrical device speeds.Type: ApplicationFiled: March 8, 2013Publication date: December 5, 2013Inventors: Thomas Edmond Flaherty IV, Gary Richard Trott, Jeevan Kumar Vemagiri
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Publication number: 20130320476Abstract: An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component.Type: ApplicationFiled: March 4, 2013Publication date: December 5, 2013Applicant: Optoelectronics Systems Consulting, Inc.Inventor: Optoelectronics Systems Consulting, Inc.
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Patent number: 8592676Abstract: A solar cell in which an n-type fine silicon particle film is formed in a lamination layer on the surface of a transparent substrate via a transparent electrode, and the n-type fine silicon particle film is covalently bound to the transparent electrode via the first organic coating formed on the surface of the transparent electrode and the second organic coating formed on the surface of the n-type fine silicon particle film and the n-type fine silicon particle film is covalently bound to the p-type fine silicon particle film via the second organic coating formed on the surface of the n-type fine silicon particle film and the third organic coating formed on the surface of the p-type fine silicon particle film.Type: GrantFiled: June 22, 2007Date of Patent: November 26, 2013Assignee: Empire Technology Development LLCInventor: Kazufumi Ogawa
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Patent number: 8592248Abstract: The present invention relates to a chemical etching method to electrically isolate the edge from the interior of a thin-film photovoltaic panel comprising a substrate and a photovoltaic laminate. The method comprises a step to dispense an etching paste comprising two or more acids on the laminate periphery; an optional step to apply heat to the laminate; and a step to remove the etching paste. The method is further characterized by the chemical removal of at least two chemically distinctive layers of the laminate at the periphery where the etching paste is applied. The method may be used to produce a thin-film photovoltaic panel.Type: GrantFiled: September 22, 2011Date of Patent: November 26, 2013Assignee: E I du Pont de Nemours and CompanyInventors: Lap-Tak Andrew Cheng, Meijun Lu
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Patent number: 8592936Abstract: A photoelectric conversion device includes: a first substrate of which end portions are cut off so as to slope or with a groove shape; a photodiode and an amplifier circuit over the first substrate; a first electrode electrically connected to the photodiode and provided over one end portion of the first substrate; a second electrode electrically connected to the amplifier circuit and provided over an another end portion of the first substrate; and a second substrate having third and fourth electrodes thereon. The first and second electrodes are attached to the third and fourth electrodes, respectively, with a conductive material provided not only at the surfaces of the first, second, third, and fourth electrodes facing each other but also at the side surfaces of the first and second electrodes to increase the adhesiveness between a photoelectric conversion device and a member on which the photoelectric conversion device is mounted.Type: GrantFiled: June 21, 2012Date of Patent: November 26, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara
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Publication number: 20130309800Abstract: The present invention relates to peroxide mixtures and in particular to peroxide mixtures that are suitable for the accelerated crosslinking of ethylene vinyl acetate.Type: ApplicationFiled: January 31, 2012Publication date: November 21, 2013Applicant: United Initiators GmbH & Co. KGInventors: Martin Kunz, Katharina Seitz, Iris Nagl
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Publication number: 20130306143Abstract: Provided is a method for manufacturing a solar cell with an interconnection sheet, a method for manufacturing a solar cell module, a solar cell with an interconnection sheet, and a solar cell module. Fixing resin is arranged at least on one side of a location between electrodes of solar cell and a location between interconnections of an interconnection sheet. Thereafter, a first cure state of fixing resin is attained. Thereafter, an adjoining member containing conductive material is provided, and a solar cell and interconnection sheet are stacked to soften the fixing resin exhibiting the first cure state and then re-cure the same to attain a second cure state.Type: ApplicationFiled: October 24, 2011Publication date: November 21, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Takayuki Yamada, Tomoo Imataki, Tomoyo Shiraki, Akiko Tsunemi, Shinsuke Naito
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Patent number: 8587718Abstract: An image pickup unit according the present invention includes: a solid-state image pickup device which photoelectrically converts a photographic light and thereby outputs a video signal; and a lens barrel which, being approximately cylindrical in shape and being fastened to the solid-state image pickup device by a light-curing adhesive, holds a plurality of objective lenses, wherein a tapered surface is formed on a rear end face which opposes front part of the solid-state image pickup device of the lens barrel, with distance between the tapered surface and the front part of the solid-state image pickup device increasing toward outer circumference.Type: GrantFiled: April 10, 2008Date of Patent: November 19, 2013Assignee: Olympus Medical Systems Corp.Inventor: Hironobu Ichimura
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Patent number: RE44629Abstract: The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.Type: GrantFiled: November 30, 2004Date of Patent: December 10, 2013Assignee: Intel CorporationInventors: Suresh Ramalingam, Nagesh Vodrahalli, Michael J. Costello, Mun Leong Loke, Ravi V. Mahajan