Specific Surface Topography (e.g., Textured Surface, Etc.) Patents (Class 438/71)
  • Patent number: 6780665
    Abstract: The disclosure describes an economical and environmentally benign method to recover crystalline silicon metal kerf from wiresaw slurries and to shape and sinter said recovered crystalline silicon kerf into thin-layer PV cell configurations with enhanced surface texture for metallization and reduced optical reflection losses.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: August 24, 2004
    Inventors: Romain Louis Billiet, Hanh Thi Nguyen
  • Patent number: 6777769
    Abstract: A light-receiving element, comprises an absorption layer formed on a semiconductor substrate, a window layer formed on the absorption layer, a first electrode formed on the window layer, a second electrode formed on the window layer and electrically connected to the first electrode, and a diffusion region which is formed in the absorption layer and the window layer and is formed between the first electrode and the substrate and between the second electrode and the substrate.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: August 17, 2004
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takeshi Higuchi, Naoki Tsukiji
  • Patent number: 6768965
    Abstract: Methods and computer program products are provided for analyzing a crystalline structure, such as a wafer or an epitaxial layer in more detail, including the portion of the crystalline structure proximate the edge. The methods and computer program products of one aspect determine the average thickness and the normalized profile of a crystalline structure with enhanced detail. Additionally, the method and computer program product of another aspect represent the profile proximate the edge of the crystalline structure with a pair of lines that are selected to permit the profile of the crystalline structure proximate the edge of the crystalline structure to be characterized in more detail. Further, the method of yet another aspect permits the average edge profile for a plurality of crystalline structure to be defined.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: July 27, 2004
    Assignee: SEH America, Inc.
    Inventors: Stephen L. Martin, Shigeru Oba, Yoshinori Suzuki
  • Patent number: 6750394
    Abstract: A thin-film solar cell comprises a set of a transparent conductive layer and a photoelectric conversion layer laminated in this order on a substrate, wherein the photoelectric conversion layer is made of a p-i-n junction, the i-layer is made of a crystalline layer and the transparent conductive layer is provided with a plurality of holes at its surface of the side of the photoelectric conversion layer, each of said holes having irregularities formed on its surface.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: June 15, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Yamamoto, Kenji Wada
  • Patent number: 6723580
    Abstract: The present invention relates to a pinned photodiode used in a CMOS image sensor. The pinned photodiode according to the present invention has an uneven surface for increasing an area of a PN junction of the photodiode. So, the increased PN junction area improves a light sensitivity of the photodiode. That is, the epitaxial layer, in which the photodiode is formed, has a trench or a protrusion. Also, in the pinned photodiode, since the P0 diffusion layer is directly in contact with the P-epi layer, the two P-type layers have the same potential and then it may operate in a low voltage.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: April 20, 2004
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Sang Hoon Park
  • Patent number: 6699729
    Abstract: A method of planarizing an image sensor substrate is disclosed. The method comprises depositing a first polymer layer over the image sensor substrate. The first polymer layer is patterned to form pillars. Then, a second polymer layer is deposited over the pillars. Optionally, the second polymer layer is etched back.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: March 2, 2004
    Assignee: OmniVision International Holding Ltd
    Inventor: Katsumi Yamamoto
  • Patent number: 6689633
    Abstract: An optical silicon-based detector with a porous filter layer that has a laterally modifiable filter effect, comprising a plurality of integrated photosensitive cells. The invention also relates to a method for the production of an optical detector by creating an insulating layer on the porous filter layer and by providing active filter surfaces.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: February 10, 2004
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Michel Marso, RĂ¼diger Arens-Fischer, Dirk Hunkel
  • Patent number: 6646289
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: November 11, 2003
    Assignee: Shellcase Ltd.
    Inventor: Avner Badehi
  • Patent number: 6638788
    Abstract: A solar cell is manufactured by bringing a front side of a semiconductor crystal substrate into contact with an electrolytic liquid containing a fluoride, placing an electrode in the electrolytic liquid, passing a current between the electrode and the semiconductor crystal substrate and applying light to the semiconductor crystal substrate to generate pairs of holes and electrons. Etching of the substrate proceeds by combining the holes with ions in the front side of the semiconductor crystal substrate which is held in contact with the electrolytic liquid, thereby forming at least one surface irregularity structure thereon.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: October 28, 2003
    Assignee: Ebara Corporation
    Inventors: Makiko Emoto, Kentaro Fujita, Akio Shibata, Hiroshi Yokota
  • Publication number: 20030194827
    Abstract: The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
    Type: Application
    Filed: April 11, 2002
    Publication date: October 16, 2003
    Applicant: Agere Systems Inc.
    Inventors: Charles W. Lentz, Bettina A. Nechay, Abdallah Ougazzaden, Padman Parayanthal, George J. Przybylek
  • Publication number: 20030194828
    Abstract: A gallium nitride layer is laterally grown into a trench in the gallium nitride layer, to thereby form a lateral gallium nitride semiconductor layer. At least one microelectronic device may then be formed in the lateral gallium nitride semiconductor layer. Dislocation defects do not significantly propagate laterally into the lateral gallium nitride semiconductor layer, so that the lateral gallium nitride semiconductor layer is relatively defect free.
    Type: Application
    Filed: April 30, 2003
    Publication date: October 16, 2003
    Inventors: Tsvetanka Zheleva, Darren B. Thomson, Scott A. Smith, Kevin J. Linthicum, Thomas Gehrke, Robert F. Davis
  • Publication number: 20030178057
    Abstract: There is presented a solar cell comprising a semiconductor substrate of one conductivity-type, a layer of the opposite conductivity-type provided on a surface side of the semiconductor substrate, a surface electrode formed thereon, and a backside electrode formed on a backside of the semiconductor substrate, wherein the semiconductor substrate is formed with protrusions and recesses on the surface side thereof, and spaces that are filled with a glass component of an electrode material of the surface electrode are present in bottom portions of the recesses. This arrangement has eliminated a conventional problem in that silver in the electrode material gets into the bottom portions of the recesses and causes defects to be generated in the recesses due to stress generated during forming of the electrode.
    Type: Application
    Filed: October 22, 2002
    Publication date: September 25, 2003
    Inventors: Shuichi Fujii, Yasuhiro Matsubara, Yuko Fukawa
  • Patent number: 6613974
    Abstract: P-type and n-type regions are defined in the first surface of a substrate upon which is formed an epitaxial layer of preferably Si—Ge material, preferably capped by Si material. During epitaxy formation, dopant in the defined regions diffuses down to form p-type and n-type junctions in the Si material, and diffuses up to form p-type and n-type junctions in the Si—Ge epitaxial material. Si junctions are buried beneath the surface and are surface recombination velocity effects are reduced. Photon energy striking the second substrate surface generates electron-hole pairs that experience the high bandgap of the Si materials and the low bandgap of the Si—Ge epitaxy. The tandem structure absorbs photon energy from about 0.6 eV to about 3.5 eV and exhibits high conversion efficiency.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: September 2, 2003
    Assignee: Micrel, Incorporated
    Inventor: John Durbin Husher
  • Publication number: 20030116187
    Abstract: P-type and n-type regions are defined in the first surface of a substrate upon which is formed an epitaxial layer of preferably Si—Ge material, preferably capped by Si material. During epitaxy formation, dopant in the defined regions diffuses down to form p-type and n-type junctions in the Si material, and diffuses up to form p-type and n-type junctions in the Si—Ge epitaxial material. Si junctions are buried beneath the surface and are surface recombination velocity effects are reduced. Photon energy striking the second substrate surface generates electron-hole pairs that experience the high bandgap of the Si material and the low bandgap of the Si—Ge epitaxy.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Applicant: MICREL, INCORPORATED
    Inventor: John Durbin Husher
  • Patent number: 6566595
    Abstract: A solar cell having a p-type semiconductor layer and an n-type semiconductor layer made of a first compound semiconductor material, and a semiconductor layer sandwiched between the p-type semiconductor layer and the n-type semiconductor layer. The semiconductor layer includes at least a quantum well layer which is made of a second compound semiconductor material and has a plurality of projections of at least two different sizes.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: May 20, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiyuki Suzuki
  • Patent number: 6541696
    Abstract: A high-efficiency bypass function added solar cell includes a first conductivity type substrate, a second conductivity type region formed at the light receiving side of the substrate, an electrode formed at the second conductivity type region, and a region of higher concentration than the substrate, arranged in contact with both the substrate and the second conductivity type region and not in contact with the electrode. The substrate includes a reflectionless surface construction and a planer portion at the light receiving side. The reflectionless surface construction has a plurality of grid configurations, and includes a first grid portion and a second grid portion having a grid configuration differing in size from that of the first grid portion. The region of higher concentration than the substrate is formed at the first grid portion.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: April 1, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hidetoshi Washio
  • Patent number: 6538195
    Abstract: A thin film silicon solar cell is provided on a glass substrate, the glass having a textured surface, including larger scale surface features and smaller scale surface features. Over the surface is deposited a thin barrier layer which also serves as an anti-reflection coating. The barrier layer may be a silicon nitride layer for example and will be 70 nm±20% in order to best achieve its anti-reflection function. Over the barrier layer is formed an essentially conformal silicon film having a thickness which is less than the dimensions of the larger scale features of the glass surface and of a similar dimension to the smaller scale features of the glass surface.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 25, 2003
    Assignee: Pacific Solar Pty Limited
    Inventors: Zhengrong Shi, Stuart Ross Wenham, Martin Andrew Green, Paul Alan Basore, Jing Jia Ji
  • Patent number: 6534336
    Abstract: The present invention provides a production method of a photoelectric conversion device, which comprises a step of forming an uneven shape on a surface of a substrate, a step of providing a separation layer maintaining the uneven shape on the substrate, a step of forming a semiconductor film maintaining the uneven shape on the separation layer, and a step of separating the semiconductor film from the substrate at the separation layer, wherein the step of forming the uneven shape on the surface of the substrate is a step of forming the substrate having the uneven shape on the surface by anisotropic etching of the substrate with the separation layer remaining after the separation. The present invention also provides a photoelectric conversion device produced by the above method.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: March 18, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaaki Iwane, Takao Yonehara, Shoji Nishida, Kiyofumi Sakaguchi
  • Patent number: 6521823
    Abstract: In a solar cell, there is provided a method of improving external appearance quality by lowering surface reflection and by making a change of a color tone at openings and portions between electrode patterns, resulting from integrating working, inconspicuous. In the solar cell, at the openings and the portions between the electrode patterns resulting from the integrating working, when seen from a light incident side, since the number of laminated films or the materials are different, colors in appearance become different among the respective regions. In the present invention, an insulating resin layer, a rear electrode layer, a sealing resin layer, and the like are colored by containing pigments or the like so that the colors thereof become similar to the color of a region of a structural portion occupying the great part of the solar cell.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: February 18, 2003
    Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Kubota, Kazuo Nishi
  • Patent number: 6506623
    Abstract: In a fabrication method of a microstructure array, such as a mold for forming a microlens array, a first insulating mask layer is formed on a conductive portion of s substrate, an array of openings for the microstructure array and at least an opening for an alignment marker are formed in the first insulating mask layer during a common process to expose the conductive portion of the substrate at the openings, and first plated or electrodeposited layers are grown in the openings and on the first insulating mask layer using the conductive portion of the substrate as a cathode. The opening for the alignment marker is surrounded by the array of openings for the microstructure array, and a pattern of the opening for the alignment marker is determined such that a current density distribution at the time of electroplating or electrodeposition can be oppressed.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: January 14, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takayuki Teshima, Takashi Ushijima
  • Patent number: 6458620
    Abstract: A photo-detecting device includes: a semiconductor substrate; a multilayer structure formed on the semiconductor substrate; an island-like photo-detecting region formed in at least a portion of the multilayer structure, the island-like photo-detecting region having a central portion; and a light-shielding mask formed on the semiconductor substrate so as to shield from light a portion of the island-like photo-detecting region at least excluding the central portion. The light-shielding mask comprises an upper metal film and a lower metal film, and the upper metal film and the lower metal film are at least partially isolated by an insulative film, the upper metal film and the lower metal film having different patterns.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: October 1, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenichi Matsuda
  • Publication number: 20020134425
    Abstract: A thin-film solar cell comprises a set of a transparent conductive layer and a photoelectric conversion layer laminated in this order on a substrate, wherein the photoelectric conversion layer is made of a p-i-n junction, the i-layer is made of a crystalline layer and the transparent conductive layer is provided with a plurality of holes at its surface of the side of the photoelectric conversion layer, each of said holes having irregularities formed on its surface.
    Type: Application
    Filed: January 10, 2002
    Publication date: September 26, 2002
    Inventors: Hiroshi Yamamoto, Kenji Wada
  • Patent number: 6429039
    Abstract: A gate oxide film 18 and a gate electrode 20 are formed on a surface of a P-type substrate 14. A concave portion 42 is provided in a region of the P-type substrate 14, the region being contiguous to the gate electrode 20. On the P-type substrate 14, an N-type drain region 30 is disposed on the opposite side of the gate electrode 20 from the concave portion 42. N-type impurities are implanted into the P-type substrate 14 at a predetermined angle relative to the latter, thereby forming an N-type region 44 which includes a region underneath the concave portion 42 and which is partially submerged beneath the gate oxide film 18. P-type impurities are then implanted into the P-type substrate 14 at right angles to the latter, thus forming a P-type region 46 which includes a region underneath the concave portion 42 while covering the N-type region 44 and which forms a PN junction diode in combination with the N-type region 44.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: August 6, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisayuki Kato
  • Patent number: 6420644
    Abstract: A solar battery having a board with a surface with a plurality of spherical segments projecting from the board surface. A primary electrode layer is provided on the board surface and the plurality of spherical segments. A semiconductor layer is provided on the primary electrode layer and has P-N connecting members. A secondary electrode layer on the semiconductor layer is made up of a translucent material.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: July 16, 2002
    Assignee: Mitsui High-tec, Inc.
    Inventors: Atsushi Fukui, Keisuke Kimoto
  • Patent number: 6399404
    Abstract: In an optical semiconductor device fabrication method for simultaneously forming elements having different operation wavelengths on a circular semiconductor substrate, the number of elements for each operation wavelength is made constant efficiently and the operation characteristics of the elements are made highly uniform, by parabolically changing the operation wavelength of the optical semiconductor device from a center portion of the circular semiconductor substrate toward an outer periphery thereof.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: June 4, 2002
    Assignee: NEC Corporation
    Inventor: Yasutaka Sakata
  • Patent number: 6395577
    Abstract: A light absorbing layer composed of intentionally undoped n-type InGaAs and a window layer composed of intentionally undoped n-type InP are formed sequentially on a first principal surface of a semiconductor substrate composed of n-type InP. A cathode is provided on a p-type diffused region forming an island pattern in the window layer, while an anode is provided on a second principal surface of the semiconductor substrate. A side edge portion of the second principal surface of the semiconductor substrate is formed with a gradient portion having an exposed surface with a (112) plane orientation and forming an angle of 35.3° with respect to the second principal surface. The gradient portion is formed to have a mirrored surface by using an etching solution containing hydrochloric acid and nitric acid at a volume ratio of approximately 5:1 to 3:1.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: May 28, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenichi Matsuda
  • Patent number: 6379992
    Abstract: A method capable of enhancing the uniformity of the color filter array and removing scum deposits from the surface of the color filter array to improve the yield ratio of the device is disclosed.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: April 30, 2002
    Assignee: Hynix Semiconductor Inc.
    Inventor: Wan-Hee Jo
  • Patent number: 6379995
    Abstract: A water-repellent layer is formed on a light-receiving surface of a solar battery prior to the formation of a coated-film electrode. The coated-film electrode is formed by screen-printing a coating solution on the water-repellent layer. The coating solution is restricted from spreading on the surface of the water-repellent layer and a narrow ridge-shaped coated-film electrode is formed. Thus, the front electrode is smaller in width and larger in height, so received light loss and transmission loss are decreased.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: April 30, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshitatsu Kawama, Hiroaki Morikawa, Katsuhiro Imada, Kazuyoshi Kojima
  • Publication number: 20020048840
    Abstract: A process for producing a solid-state imaging device which includes the steps of forming a light-receiving portion of a pixel in a surface region on the substrate, forming above the light receiving portion an inter-layer dielectric having a depression in its surface, forming on the inter-layer dielectric a light transmitting film having in its surface a concave conforming to the depression, forming at the position that covers the concave on the light transmitting film a mask layer with a convexly curved surface, and etching the mask layer and the light transmitting film all together, thereby making the light transmitting film into a shape of convex lens with an upwardly curved surface.
    Type: Application
    Filed: August 21, 2001
    Publication date: April 25, 2002
    Inventor: Kouichi Tanigawa
  • Patent number: 6376271
    Abstract: A dry film resist is used to form an interlayer insulating film in a process for fabricating a liquid crystal display device of the POP structure. The dry film resist is formed by applying a photosensitive resin on a base film to a uniform thickness, and a protective film layer is formed on a surface of the photosensitive resin film thus formed. From the dry film resist guided to the vicinity of a glass substrate, the protective film is removed immediately before transfer. Then, the photosensitive resin is heated and pressed against the foregoing glass substrate by a transfer roller, whereby the interlayer insulating film is formed.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: April 23, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yutaka Sawayama, Kazuhiko Tsuda, Shigeaki Mizushima
  • Patent number: 6365823
    Abstract: A thin film based solar cell module having superior appearance without glittering, and method of manufacturing the same in a simple manner at a low cost are provided. The solar cell module includes a glass substrate 10 and a photo semiconductor element formed on a surface different from a light entering surface of glass substrate 10. The glass substrate 10 is formed of a figured glass having recesses and protrusions formed to provide antiglaring effect, on the light entering surface. The photo semiconductor element is formed by successively stacking a transparent electrode 2, a photo semiconductor layer 3 and a back electrode layer 5.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: April 2, 2002
    Assignee: Kaneka Corporation
    Inventor: Masataka Kondo
  • Patent number: 6352877
    Abstract: Metal layer in a semiconductor device and method for fabricating the same, the semiconductor device having a transistor and a capacitor electrode formed on a region of a semiconductor substrate, the metal layer including a planar protection film on an entire surface of the semiconductor substrate inclusive of the transistor and the capacitor electrode, an absorber layer over the planar protection film inclusive of a region over the transistor, an insulating film on an entire surface, with a width of projection in a relievo form in a region over the absorber layer, a via hole through the planar protection film and the insulating layer, to expose a region of the capacitor electrode, a tungsten plug and a planar stuffed layer in the via hole, a mirror metal layer on the insulating film on both sides of the projection of a relievo form of the insulating film, inclusive of the planar stuffed layer, and an insulating film spacer on the projection of a relievo form of the insulating film and the mirror metal layer i
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: March 5, 2002
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dae Gun Yang
  • Patent number: 6350945
    Abstract: A thin film semiconductor device capable of improving the optical absorption efficiency of a single crystal silicon thin film solar battery or the like and thus improving the photoelectric conversion efficiency. A transparent thin plastic film substrate is located on a surface of each solar battery element, opposite to a plastic film substrate. A diffraction grating is located between the plastic film substrate and the solar battery elements. The diffraction grating has a reflection-type blazed grating structure made of a conductive material such as aluminum (Al). Incident light is diffracted by the diffraction grating and returns to the solar battery element. When a diffraction angle is more than a predetermined value, an angle between the diffracted light and a normal to the solar battery increases. Thus, the light is totally reflected by a top surface of a silicon thin film layer (the solar battery element) or the surface of the transparent plastic film substrate and returns to the solar battery element.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: February 26, 2002
    Assignee: Sony Corporation
    Inventor: Shinichi Mizuno
  • Publication number: 20020000244
    Abstract: Enhanced light absorption of solar cells and photodetectors by diffraction. Triangular, rectangular, and blazed subwavelength periodic structures are shown to improve performance of solar cells. Surface reflection can be tailored for either broadband, or narrow-band spectral absorption. Enhanced absorption is achieved by efficient optical coupling into obliquely propagating transmitted diffraction orders. Subwavelength one-dimensional structures are designed for polarization-dependent, wavelength-selective absorption in solar cells and photodetectors, while two-dimensional structures are designed for polarization-independent, wavelength-selective absorption therein. Suitable one and two-dimensional subwavelength periodic structures can also be designed for broadband spectral absorption in solar cells and photodetectors.
    Type: Application
    Filed: April 11, 2001
    Publication date: January 3, 2002
    Inventor: Saleem H. Zaidi
  • Patent number: 6331673
    Abstract: A solar cell module comprising a solar cell element and at least a surface side covering material positioned on the light receiving face side of said solar cell element, said surface side covering comprising at least a filler, a nonwoven glass fiber member, and a surface protective film, wherein said nonwoven glass fiber member has a texture bonded with an acrylic resin or is treated with a silane coupling agent.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: December 18, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ichiro Kataoya, Takahiro Mori, Satoru Yamada, Hidenori Shiotsuka, Ayako Komori
  • Patent number: 6331672
    Abstract: A photovoltaic cell comprising a substrate, a back reflector, a transparent conductive layer, and a photoelectric conversion layer, wherein the transparent conductive layer has holes on the surface, is provided. Additionally, a photovoltaic cell comprising a substrate, a back reflector, a transparent conductive layer, and a photoelectric conversion layer, wherein diffuse reflectance of the back reflector is 3 to 50%, is provided. According to the above-described structures, processability, yield and reliability of the photovoltaic cell can be improved, while photoelectric conversion efficiency is maintained at a high level due to back-surface diffuse reflection.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: December 18, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichi Matsuda, Jinsho Matsuyama
  • Publication number: 20010044166
    Abstract: There is provided a method for forming microlenses in an image sensor having high light transmittance in short wavelength regions of visible lights, the method comprising: depositing a resist film for microlens over a predetermined substrate; selectively first-exposing the resist film to light in a range of exposure wavelengths and developing it to form resist patterns; second-exposing the remaining resist patterns to light photochemically to decompose an active form of sensitisizer remained in the resist patterns into an inactive form; and heating and flowing the resist patterns to form microlenses.
    Type: Application
    Filed: December 30, 1999
    Publication date: November 22, 2001
    Inventors: KI-YEOP PARK, SANG-GIL BAE
  • Patent number: 6312969
    Abstract: A solid-state imaging sensor, a method for manufacturing the solid-state imaging sensor and an imaging device of which said solid state image sensor is designed to reduce unwanted light reflections, improve light focusing of light reflections from the substrate and oblique light constituents onto the sensor in order to allow further reduction in pixel size. Transfer electrodes in a line shape are arrayed at spaced intervals on a substrate, discrete sensors for photo-electric conversion are formed between the transfer electrode lines, a light-impervious film consisting of a first and second light-impervious films with an aperture positioned directly above a sensor is formed on the substrate and covers the transfer electrode to block any incident light other than the beam of light R from entering the sensor, and an on-chip lens for focusing the light R onto a sensor is formed above the light-impervious film.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: November 6, 2001
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6309906
    Abstract: The device (10) comprises a deposition chamber (12) containing two electrodes (13, 14), one of which comprises a support (16) for a substrate (17) and is earthed, the other being connected to an electric radio frequency generator (15). The device includes a mechanism (23) for extracting gas from the chamber (12) and a mechanism (18) for supplying gas. The device also comprises a mechanism for purification (31) of the gases introduced into the chamber, these a mechanism being arranged so as to reduce the number of oxygen atoms contained in the deposition gas, such gas being made up of silane, hydrogen and/or argon. The procedure consists of creating a vacuum in the deposition chamber (12), purifying the gases using purification a mechanism (31), introducing these purified gases into the chamber (12), then creating a plasma between the electrodes (13, 14). A film of intrinsic microcrystalline silicon in then deposited on the substrate.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: October 30, 2001
    Assignee: Universite de Neuchatel-Institut de Microtechnique
    Inventors: Johann Meier, Ulrich Kroll
  • Patent number: 6281034
    Abstract: A solid-state imaging device is able to prevent a sensitivity from being lowered and to suppress a smear caused as a pixel size is reduced and to provide an excellent image quality even though it is miniaturized and a manufacturing method thereof is proposed. Also, a method of manufacturing a semiconductor device is able to form a conductive layer having an excellent adhesion with an underlayer and whose surface has an excellent flatness in the process for forming a metal interconnection and the process for burying a contact-hole. A solid-state imaging device (20) includes a light-shielding film (6) of a two layer structure comprising a first film (11) formed of a film deposited by a sputtering or vapor deposition and a second film (12) formed of a tungsten film deposited by a chemical vapor deposition.
    Type: Grant
    Filed: October 6, 1998
    Date of Patent: August 28, 2001
    Assignee: Sony Corporation
    Inventors: Dai Sugimoto, Takeshi Matsuda
  • Patent number: 6274391
    Abstract: A high density interconnect land grid array package device combines various electronic packaging techniques in a unique way to create a very thin, electrically and thermally high performance package for single or multiple semiconductor devices. A thin and mechanically stable substrate or packaging material (12) is selected that also has high thermal conductivity. Cavities (14) in the substrate or packaging material (12) accommodate one or more semiconductor devices that are attached directly to the substrate or packaging material. At least one of said semiconductor devices includes at least one optical receiver and/or transmitter. A thin film overlay (18) having multiple layers interconnects the one or more semiconductor devices to an array of pads (20) on a surface of the thin film overlay facing away from the substrate or packaging material.
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: August 14, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Kurt P. Wachtler, David N. Walter, Larry J. Mowatt
  • Patent number: 6271537
    Abstract: Quantum-well sensors having an array of spatially separated quantum-well columns formed on a substrate. A grating can be formed increase the coupling efficiency.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: August 7, 2001
    Assignee: California Institute of Technology
    Inventors: Sarath D. Gunapala, Sumith V. Bandara, John K. Liu, Daniel W. Wilson
  • Patent number: 6172297
    Abstract: A solar cell (1) is proposed, which is having at least at one side a semiconductor surface (2), on which edges (3) are formed having flank-like regions (4) running substantially parallel to the substrate normal and on which the electrical conductive contacts (5) are arranged. To be able to produce solar cells using simple technology with high cell efficiencies the electrical conductive material is deposited to the flank-like regions as well as to some none flank-like areas (6). The electrical conductive material is removed mask-free and selectively from the none flank-like areas resulting in electrical conducting contacts remaining on the flank-like regions only.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: January 9, 2001
    Assignee: Institut fur Solarenergieforschung GmbH
    Inventors: Rudolf Hezel, Axel Metz
  • Patent number: 6166368
    Abstract: A photodetection device including at least one element incorporating a radiation absorption layer and an unabsorbed radiation reflection layer. The absorbing layer creates a first phase shift of the reflected radiation compared with the incident radiation. According to the invention, between the absorbing layer and the reflecting layer a layer is provided creating a second phase shift, which compensates the first phase shift for obtaining a substantially flat spectral response of the device.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: December 26, 2000
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Fran.cedilla.ois Marion, Patrick Agnese
  • Patent number: 6162658
    Abstract: The present invention makes use of geometry of grooves formed in a substrate, to allow a dielectric layer to be deposited with some regions of the grooves having a substantially thinner layer deposited than top surfaces of the substrate. These regions of reduced thickness dielectric within the grooves are then prematurely etched by an appropriate chemical, or other, etchant capable of controllably etching away the dielectric layer, with the result that in these regions the silicon surface can be exposed and plated by a metallization while the top surface remains protected by the dielectric material. The remaining dielectric material can optionally be required to act as an anti-reflective coating. The invention is applicable in making buried contact solar cells.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: December 19, 2000
    Assignee: Unisearch Limited
    Inventors: Martin Andrew Green, Stuart Ross Wenham, Christiana B Honsberg
  • Patent number: 6147297
    Abstract: Disclosed is a process for fabricating a solar cell as well as the solar cell itself having a grid-shaped surface texture provided with a n-doped emitter layer provided on a base material.The invention is distinguished by the fact that the base material is first covered full-surface with a n.sup.++ doping layer in the course of diffusion doping followed by a selective etching procedure on the emitter layer using a mask which produces the surface texture in such a manner that a multiplicity of crisscrossing rows of pointed ribs is created whose top section is composed of the n.sup.++ doped doping layer and bottom section of the base material.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: November 14, 2000
    Assignee: Fraunhofer Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Wolfram Wettling, Stefan Glunz
  • Patent number: 6127623
    Abstract: A solar cell comprises a crystalline substrate having projections and depressions formed on either side or both sides of the substrate, wherein a projection-depression depth is 25 .mu.m or more.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: October 3, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuyo Nakamura, Kenzo Kawano, Hidetoshi Washio, Yoshifumi Tonomura, Kunio Kamimura, Hideyuki Ueyama
  • Patent number: 6127194
    Abstract: Aspects for removing device packaging from an FBGA (fine pitch ball grid array) package are described. In an exemplary method aspect, the method includes recessing a predetermined area of the FBGA package, and exposing an integrated circuit die covered by the FBGA package. Device analysis is then performed on the exposed die. The step of recessing further includes milling the predetermined area, while the step of exposing includes chemically etching the FBGA package.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: October 3, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mehrdad Mahanpour, Mohammad Massoodi
  • Patent number: 6093882
    Abstract: A solar cell and a method of producing the same which realizes electrical separation of the p n junction in a simple manner, and a method of producing a semiconductor device a method of producing a semiconductor device in which an electrode is formed by using a metallic paste material on a substrate covered with a silicon nitride film or a titanium oxide film, wherein a glass paste 104 composed mainly of glass which has a property of melting silicon is provided on an n type diffusion layer 101 in the p n junction; the substrate is baked so that penetration of the n type diffusion layer 101 is effected by the glass paste; aluminum is diffused in the n type diffusion layer 101 below a p electrode 103 formed of an aluminum silver paste to thereby form a p type inversion layer 105 inverted to a p type, whereby the electrical separation of the p n junction can be realized.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: July 25, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Satoshi Arimoto
  • Patent number: 5994641
    Abstract: A photovoltaic module comprising an array of electrically interconnected photovoltaic cells disposed in a planar and mutually spaced relationship between a light-transparent front cover member in sheet form and a back sheet structure is provided with a novel light-reflecting means disposed between adjacent cells for reflecting light falling in the areas between cells back toward said transparent cover member for further internal reflection onto the solar cells.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: November 30, 1999
    Assignee: ASE Americas, Inc.
    Inventor: Michael J. Kardauskas