Specific Surface Topography (e.g., Textured Surface, Etc.) Patents (Class 438/71)
  • Publication number: 20090286346
    Abstract: Protuberances, having vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode, are formed at an optical interface between two layers having different refractive indices. The protuberances may be formed by employing self-assembling block copolymers that form an array of sublithographic features of a first polymeric block component within a matrix of a second polymeric block component. The pattern of the polymeric block component is transferred into a first optical layer to form an array of nanoscale protuberances. Alternately, conventional lithography may be employed to form protuberances having dimensions less than the wavelength of light. A second optical layer is formed directly on the protuberances of the first optical layer. The interface between the first and second optical layers has a graded refractive index, and provides high transmission of light with little reflection.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 19, 2009
    Applicant: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
  • Publication number: 20090280597
    Abstract: Methods for surface texturing a crystalline silicon substrate are provided. In one embodiment, the method includes providing a crystalline silicon substrate, wetting the substrate with an alkaline solution comprising a wetting agent, and forming a textured surface with a structure having a depth about 1 ?m to about 10 ?m on the substrate. In another embodiment, a method of performing a substrate texture process includes providing crystalline silicon substrate, pre-cleaning the substrate in a HF aqueous solution, wetting the substrate with a KOH aqueous solution comprising polyethylene glycol (PEG) compound, and forming a textured surface with a structure having a depth about 3 ?m to about 8 ?m on the substrate.
    Type: Application
    Filed: March 23, 2009
    Publication date: November 12, 2009
    Inventors: Kapila Wijekoon, Rohit Mishra, Michael P. Stewart, Timothy Weidman, Hari Ponnekanti, Tristan R. Holtam
  • Publication number: 20090261353
    Abstract: The invention relates to methods and devices comprising a nanostructure (2;4,4a) for improving the optical behavior of components and apparatuses and/or improving the behavior of sensors by increasing the active surface area. The nanostructure (2) is produced by means of a special RIE etching process, can be modified regarding the composition of the materials thereof, and can be provided with adequate coatings. The amount of material used for the base layer (3) can be reduced by supplying a buffer layer (406). Many applications are disclosed.
    Type: Application
    Filed: October 10, 2006
    Publication date: October 22, 2009
    Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AG
    Inventors: Daniel Gaebler, Konrad Bach
  • Patent number: 7579209
    Abstract: An image sensor includes the steps of forming a sublayer including a photodiode, a transistor and a metal line on a substrate, forming a pattern layer on the sublayer to be overlapped with the photodiode and to having a curved surface, and forming a combined color filter and microlens on the pattern layer to have a curved surface.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: August 25, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Sang Sik Kim
  • Patent number: 7572648
    Abstract: A cubic element of photonic crystal is integrally formed on the surface of a photo-detection element, and a portion of the photonic crystal cubic element is irradiated with ultraviolet rays thereby to change the refractive index of the portion of the cubic element that has been irradiated with ultraviolet rays. Alternatively, by causing globular particles having different refractive indices to eject on the surface of the photo-detection element from an ink-jet apparatus having a nozzle provided with a temperature control part by controlling temperature of the nozzle to form a laminate of globular particle layers having different refractive indices, a photonic crystal lens is integrally formed on the surface of the photo-detection element.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: August 11, 2009
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Akiko Suzuki, Akinobu Sato
  • Patent number: 7550312
    Abstract: Embodiments relate to an image sensor and a method of manufacturing an image sensor. In embodiments, the method may include preparing a semiconductor substrate formed with a plurality of photodiodes, forming an interlayer dielectric layer on the semiconductor substrate, forming a color filter layer on the interlayer dielectric layer, forming a planar layer on the color filter layer, and forming micro-lenses on the planar layer by using heat transfer liquid. Heat is uniformly applied to the micro-lens because the micro-lens is immersed in the heat transfer liquid having the high temperature, so the micro-lenses are prevented from being bonded to each other. Since a curvature surface of the micro-lens may be uniformly formed, the photo-sensitivity and color reproduction of the image sensor may be improved, which may result in a high-quality image sensor.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: June 23, 2009
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Sang Sik Kim
  • Patent number: 7547573
    Abstract: An image sensor and a method of manufacturing the same, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: June 16, 2009
    Assignees: United Microelectronics Corp., AltaSens Inc.
    Inventors: Tzeng-Fei Wen, Giuseppe Rossi, Ju-Hsin Yen, Chia-Huei Lin, Jhy-Jyi Sze, Chien-Yao Huang, Teng-Yuan Ko, Nien-Tsu Peng
  • Patent number: 7507600
    Abstract: A semiconductor photodetecting device including a PIN photodiode formed on an SI-InP substrate; a buried optical waveguide portion formed on the SI-InP substrate and including the film thickness continuously increased toward the PIN photodiode and an InP clad layer covering the upper surface and the side surface of the InGaAsP core layer; and a ridge-shaped connection optical waveguide portion formed on the SI-InP substrate between the PIN photodiode and the buried optical waveguide portion and including the InGaAsP core layer and the InP clad layer selectively covering only the upper surface of the InGaAsP core layer.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: March 24, 2009
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Akito Kuramata
  • Patent number: 7479404
    Abstract: The invention provides sensor compositions and method of making sensors.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: January 20, 2009
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Brian T. Cunningham, Ian Block, Leo Li-Ying Chan
  • Patent number: 7464459
    Abstract: A method of forming an actuator and a relay using a micro-electromechanical (MEMS)-based process is disclosed. The method first forms the lower sections of a square copper coil, and then forms a magnetic core member. The magnetic core member, which lies directly over the lower coil sections, is electrically isolated from the lower coil sections. The method next forms the side and upper sections of the coil, followed by the formation of an overlying cantilevered magnetic flexible member. Switch electrodes, which are separated by a switch gap, can be formed on the magnetic core member and the magnetic flexible member, and closed and opened in response to the electromagnetic field that arises in response to a current in the coil.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: December 16, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Trevor Niblock, Peter Johnson
  • Patent number: 7459334
    Abstract: A method of manufacturing a quartz crystal vibrating piece is provided. Etching masks of different sizes are each arranged on respective front and rear surfaces of a quartz crystal wafer such that the etching mask on one of the surfaces (e.g., the rear surface) is larger than the other etching mask. The quartz crystal wafer is etched using the etching masks so that a projection is formed on a side of the quartz crystal wafer due to the difference in size of the etching masks, and is overetched to remove the projection.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: December 2, 2008
    Assignee: Seiko Instruments Inc.
    Inventor: Kiyoshi Aratake
  • Patent number: 7450800
    Abstract: A coupled resonator includes a plurality of resonators such that at least one of the resonators is modified so as to adjust the resonant frequency associated with the coupled resonator.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 11, 2008
    Assignee: Massachusetts Institute of Technology
    Inventors: Tymon Barwicz, Michael R. Watts, Milos Popovic, Christina Manolatou
  • Patent number: 7439091
    Abstract: A light-emitting diode (LED) and a method for manufacturing the same are described. The method for manufacturing the LED comprises the following steps. An illuminant epitaxial structure is provided, in which the illuminant epitaxial structure has a first surface and a second surface on opposite sides, and a substrate is deposed on the first surface of the illuminant epitaxial structure. A metal layer is formed on the second surface of the illuminant epitaxial structure. An anodic oxidization step is performed to oxidize the metal layer, so as to form a metal oxide layer. An etching step is performed to remove a portion of the metal oxide layer, so as to form a plurality of holes in the metal oxide layer.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: October 21, 2008
    Assignee: Epistar Corporation
    Inventors: Shi-Ming Chen, Mau-Phon Houng, Chang-Hsing Chu, Te-Chi Yen
  • Publication number: 20080251121
    Abstract: One embodiment relates to a structure for a solar cell. The structure includes a silicon substrate with P-type and N-type active diffusion regions therein. An oxynitride passivation layer is included at least over the P-type and N-type active diffusion regions. The structure further includes contact openings through the oxynitride passivation layer to the P-type and N-type active diffusion regions, and metal grid lines which selectively contact the P-type and N-type active diffusion regions by way of the contact openings. Another embodiment relates to a method of fabricating a solar cell. Other embodiments, aspects and features are also disclosed.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Inventor: Charles Stone
  • Patent number: 7435615
    Abstract: A method for fabricating a CMOS image sensor improves the characteristics of device by preventing a pad from being contaminated without damaging a micro-lens.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: October 14, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Su Kon Kim
  • Publication number: 20080196761
    Abstract: A photovoltaic device and a process for producing the photovoltaic device that combine a high photovoltaic conversion efficiency with a high level of productivity. The photovoltaic device includes at least a transparent electrode-bearing substrate, prepared by providing a transparent electrode layer on a transparent, electrically insulating substrate, and a photovoltaic layer containing mainly crystalline silicon-based semiconductors and a back electrode layer formed sequentially on the transparent electrode layer of the transparent electrode-bearing substrate, wherein the surface of the transparent electrode layer of the transparent electrode-bearing substrate has a shape that contains a mixture of coarse and fine roughness, and exhibits a spectral haze ratio of 20% or greater for wavelengths of from 550 nm to 800 nm, and the photovoltaic layer containing mainly crystalline silicon-based semiconductors has a film thickness of from 1.2 ?m to 2 ?m, and a Raman ratio of from 3.0 to 8.0.
    Type: Application
    Filed: December 21, 2007
    Publication date: August 21, 2008
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD
    Inventors: Youji Nakano, Yoshiaki Takeuchi, Kengo Yamaguchi, Yasuhiro Yamauchi
  • Patent number: 7413923
    Abstract: Provided is a manufacturing method of a CMOS image sensor. The method includes forming an interlayer insulating layer, a color filter layer, and a planarizing layer. A first photoresist is applied on the planarizing layer, and patterning of the first photoresist is performed using a first mask to form a microlens pattern corresponding to photodiodes on a semiconductor substrate. The microlens pattern is reflowed to form dome-shaped microlenses. A second photoresist is applied on the resulting substrate, and patterning of the second photoresist is preformed using a second mask to retain the second photoresist on top portions of the microlenses. Edge portions of the microlenses are selectively removed using the patterned second photoresist as a mask to make CD (critical dimension) spaces between the microlenses uniform.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: August 19, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jun Han Yun
  • Publication number: 20080173964
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Application
    Filed: January 24, 2007
    Publication date: July 24, 2008
    Inventor: Salman Akram
  • Patent number: 7393709
    Abstract: The present invention provides a method for manufacturing a microlens in a semiconductor substrate having a first surface and a second surface, comprising the steps of preparing the semiconductor substrate, forming a first resist layer approximately cylindrical in form on the first surface of the semiconductor substrate, reflowing the first resist layer by heat treatment while holding the semiconductor substrate in such a manner that the first surface is normal to a vertical line and placed below the second surface, thereby to deform the first resist layer into a second resist layer approximately hemispherical in form, and simultaneously etching the second resist layer and the semiconductor substrate by means of anisotropic etching to form the corresponding lens in the semiconductor substrate.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: July 1, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Minoru Watanabe
  • Patent number: 7390689
    Abstract: Methods and systems for absorbing infrared light, and for emitting current are described. A sample, such as a sample containing mainly silicon, is microstructured by at least one laser pulse to produce cone-like structures on the exposed surface. Such microstructuring enhances the infrared absorbing, and current emission properties of the sample.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: June 24, 2008
    Assignee: President and Fellows of Harvard College
    Inventors: Eric Mazur, James Edward Carey, III, Catherine H. Crouch, Rebecca Jane Younkin, Claudia Wu
  • Patent number: 7388270
    Abstract: A method of fabricating a CMOS image sensor is provided, in which a trapezoidal microlens pattern profile is formed to facilitate reflowing the microlens pattern and by which a curvature of the microlens may be enhanced to raise its light-condensing efficiency. The method includes forming a plurality of photodiodes on a semiconductor substrate; forming an insulating interlayer on the semiconductor substrate including the photodiodes; forming a protective layer on the insulating interlayer; forming a plurality of color filters corresponding to the photodiodes; forming a top coating layer on the color filters; forming a microlens pattern on the top coating layer; and forming a plurality of microlenses by reflowing the microlens pattern.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: June 17, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Suk Lee
  • Patent number: 7384809
    Abstract: A method is disclosed for obtaining a high-resolution lenticular pattern on the surface of a light emitting diode. The method comprises imprinting a patterned sacrificial layer of etchable material that is positioned on a semiconductor surface that is in turn adjacent a light emitting active region, and thereafter etching the imprinted sacrificial layer and the underlying semiconductor to transfer an imprinted pattern into the semiconductor layer adjacent the light emitting active region.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: June 10, 2008
    Assignee: Cree, Inc.
    Inventor: Matthew Donofrio
  • Publication number: 20080121781
    Abstract: An optical filter structure for an imager which has customized sub-wavelength elements used to maintain the filter characteristics accordingly across a photo-conversion device to optimize the structure for the angle of incidence as it changes across the imager photo-conversion device. In particular, the layout (e.g., grating period among other parameters) of the sub-wavelength elements used in the structure design are customized to change with the angle of incidence of the optics used to project the image. The sub-wavelength elements are typically built by high resolution lithographic processes such as optical or imprint lithography.
    Type: Application
    Filed: August 31, 2006
    Publication date: May 29, 2008
    Inventor: Ulrich C. Boettiger
  • Patent number: 7371603
    Abstract: The invention relates to an LED package and proposes a method of fabricating an LED package including steps of providing a package substrate having a mounting area of an LED and a metal pattern to be connected with the LED, and plasma-treating the package substrate to reform at least a predetermined surface area of the package substrate where a resin-molded part will be formed. The method also includes mounting the LED on the mounting area on the substrate package and electrically connecting the LED with the metal pattern, and forming the resin-molded part in the mounting area of the LED to seal the LED package.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: May 13, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Suk Kim, Seog Moon Choi, Hyoung Ho Kim, Yong Sik Kim
  • Patent number: 7358111
    Abstract: A semiconductor wafer may be coated with an imageable anti-reflective coating. As a result, the coating may be removed using the same techniques used to remove overlying photoresists. This may overcome the difficulty of etching anti-reflective coatings using standard etches because of their poor selectivity to photoresist and the resulting propensity to cause integrated circuit defects arising from anti-reflective coating remnants.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: April 15, 2008
    Assignee: Intel Corporation
    Inventor: Swaminathan Sivakumar
  • Publication number: 20080054299
    Abstract: An image sensor includes a photo diode formed over a semiconductor substrate. At least one IMD layer is formed on the semiconductor substrate. A dielectric medium fills a through-hole formed in the IMD layer over the photo diode. The dielectric medium may be made with materials with a higher refractive index than the materials forming the IMD layer.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 6, 2008
    Inventor: Cheon-Man Shim
  • Publication number: 20080048283
    Abstract: An image sensor is provided. The image sensor can include an isolation layer, a transistor region, and a photodiode region on a semiconductor substrate. A plurality of holes can be formed in the substrate of the photodiode region. The plurality of holes can be densely formed in the substrate. At least one hole can be formed in a minimum design rule size.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 28, 2008
    Inventor: JAE WON HAN
  • Publication number: 20080001242
    Abstract: In a light detector that is a semiconductor integrated circuit, a wiring structure is disposed on a semiconductor substrate along a periphery of a rectangular region that corresponds to a light receiver, and an interlayer insulating film composed of an SOG film is layered over the wiring structure. In this structure, the interlayer insulating film is thicker at a corner than at a center part of the light receiver. In order to increase efficiency of the incidence of light on the light receiver, the planar shape of the open part is formed so that the corners of the rectangle that surrounds the wiring structure are removed when the interlayer insulating film is etched and the open part is formed (i.e., yielding an octagonal shape).
    Type: Application
    Filed: June 7, 2007
    Publication date: January 3, 2008
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Tetsuya Yamada
  • Publication number: 20070243655
    Abstract: A process that enables coplanarization of the structures that have been created in multiple independent etch steps. The various etches are performed independently by selectively exposing only certain patterns to particular etching conditions. After these structures have been created, it is possible that the various structures will exist at different planes/elevations relative to the template surface. The elevations of the various structures may be adjusted independently by selectively exposing “higher” structures to an anisotropic etch that reduces the overall elevation of the structures, while preserving the structural topography.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 18, 2007
    Applicant: MOLECULAR IMPRINTS, INC.
    Inventors: Gerard M. Schmid, Nicholas A. Stacey, Douglas J. Resnick, Ronald D. Voisin, Lawrence J. Myron
  • Patent number: 7282132
    Abstract: A film of zinc oxide electrochemically deposited from an aqueous solution is subjected to heat treatment at a temperature equal to or higher than 150° C. and equal to or lower than 400° C. in a nitrogen or inert gas atmosphere that contains oxygen, thereby obtaining a zinc oxide film that is low in electric resistance without impairing the light transmittance of the zinc oxide film.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: October 16, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masumitsu Iwata, Noboru Toyama, Ryo Hayashi, Yuichi Sonoda, Tomonori Nishimoto, Takaharu Kondo, Satoru Yamada, Yusuke Miyamoto
  • Patent number: 7227066
    Abstract: Methods for passivating crystalline grains in an active layer for an optoelectronic device and optoelectronic devices having active layers with passivated crystalline grains are disclosed. Crystalline grains of an active layer material and/or window layer material are formed within the nanotubes of an insulating nanotube template. The dimensions of the nanotubes correspond to the dimensions of a crystalline grain formed by the deposition technique used to form the grains. A majority of the surface area of these grains is in contact with the wall of the nanotube template rather than with other grains.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: June 5, 2007
    Assignee: Nanosolar, Inc.
    Inventors: Martin R. Roscheisen, Brian M. Sager
  • Patent number: 7217883
    Abstract: A solar cell involving a silicon wafer having a basic doping, a light-receiving front side and a backside, which is provided with an interdigital semiconductor pattern, which interdigital semiconductor pattern has a first pattern of at least one first diffusion zone having a first doping and a second pattern of at least one second diffusion zone, separated from the first diffusion zone(s) and having a second doping that differs from the first doping, wherein each second diffusion zone is arranged along the sides of at least one groove extending from the backside into the silicon wafer.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: May 15, 2007
    Assignee: Shell Solar GmbH
    Inventor: Adolf Münzer
  • Patent number: 7214116
    Abstract: A light-emitting diode with no fluctuations in optical properties and good sealing properties, and a simple production method for producing this light-emitting diode. The light-emitting diode has a base comprising a cup part on which the light-emitting diode is placed, a resin material introduced into cup part, and a lens member placed on top of a cup for focusing light emitted by a light-emitting diode chip. A layer of fluorescent material, which converts the wavelength of at least some of the light from the light-emitting diode chip, is applied to the inner convex face of the lens member. When the lens member is attached to the base, the inner convex face deforms the resin material and air and excess resin material can be pushed to the outside.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: May 8, 2007
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventor: Akira Takekuma
  • Patent number: 7166489
    Abstract: A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-lens array, in which the CMOS image sensor includes a plurality of photosensitive devices on a semiconductor substrate; an insulating interlayer on the plurality of photosensitive devices; a plurality of color filter layers in correspondence with the respective photosensitive devices, to filter the light by respective wavelengths; a planarization layer on the color filter layers, and having first micro-lens by intaglio in correspondence with the respective photosensitive patterns to condense the light secondly; and a plurality of second micro-lens layers on the planarization layer in correspondence with the respective photosensitive devices, to condense the light firstly.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 23, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Shang Won Kim
  • Patent number: 7101726
    Abstract: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being buried around a contact layer that connects an electrode layer of a pad portion and an interconnection layer of the surface side. A method of manufacturing such a solid-state imaging device is also provided.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: September 5, 2006
    Assignee: Sony Corporation
    Inventors: Yuichi Yamamoto, Hayato Iwamoto
  • Patent number: 7101727
    Abstract: A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is subjected to a planarization process such as chemical mechanical polishing, mechanical abrasion, or etching. A spin-on-glass layer may be deposited over the non-uniform passivation layer prior to planarization. Once a uniform, flat first passivation layer is achieved over the final metal, a second passivation layer, a color filter array, or a lens forming layer with uniform thickness is formed over the first passivation layer. The passivation layers can be oxide, nitride, a combination of oxide and nitride, or other suitable materials. The color filter array layer may also undergo a planarization process prior to formation of the lens forming layer. The present invention is also applicable to other devices.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: September 5, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7037745
    Abstract: In the manufacture of a MEMS device having a semiconductor-on-insulator substrate with a first portion closed by a lid to provide a hermetically sealed region and an second portion external to said hermetically sealed region, a method of providing electrical connections to said hermetically sealed region comprising forming at least one continuous deep trench in said semiconductor and extending down to said insulator, said at least one deep trench surrounding and isolating at least one block of semiconductor within said substrate, and said at least one block of semiconductor extending form within said first region to said second region; depositing an insulating layer in said trenches and over the surface of said substrate; depositing a metal ring around said first region; sealing said lid to said metal ring; and attaching a contact to said at least one block of semiconductor in said second region to provide one or more electrical connections through said at least one block of semiconductor to one or more compo
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: May 2, 2006
    Assignee: DALSA Semiconductor Inc.
    Inventor: Luc Ouellet
  • Patent number: 7026662
    Abstract: A MOSFET device structure and a method of manufacturing the same, in which a photon absorption layer is formed over a gate structure and a substrate in order to avoid plasma induced damage to the gate oxide during high density plasma deposition of a interlayer dielectric layer. The device structure may include an etch stop layer below the photon absorption layer. The photon absorption layer is formed entirely of silicon germanium or it may be a multi-layer formed of a silicon layer and a silicon germanium layer. In the multi-layer structure the silicon germanium layer may be formed on top of the silicon layer or vice-versa. The silicon germanium layer may be formed by implanting germanium ions into a silicon layer or by an epitaxial growth of the silicon germanium alloy layer. In the photon absorption layer the germanium may be substituted by another element whose band gap energy is less than that of silicon.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: April 11, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-Chul Song
  • Patent number: 7026542
    Abstract: A transparent substrate for a cover for a solar battery and a method for producing the same are presented. Hemispherical concave portions are formed in a surface of light entering side of a cover glass almost over the entire surface wherein the ratio d/D of the depth d of the central portion of each concave portion to the radius D of the opening of the concave portion is from 0.10 to 0.50 and the proportion of area occupied by a flat portion where no concave portion is formed in the surface of light entering side is not more than 40%.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: April 11, 2006
    Assignee: Asahi Glass Company, Limited
    Inventors: Junichi Kageyama, Kazuo Sato, Mika Kambe
  • Patent number: 6963024
    Abstract: A solar cell module 60 has a plurality of solar cells 14 having a plurality of parallel grooves 8 on the individual light-receiving surfaces thereof, each of the grooves having an electrode 5 for extracting output on the inner side face (electrode-forming inner side face) on one side in the width-wise direction thereof; and a support 10, 50 for supporting the solar cells 14 in an integrated manner so as to direct the light-receiving surfaces upward. The annual power output can be increased by adjusting the direction of arrangement of the electrode-forming inner side faces of the grooves 8 while taking the angle of inclination ? of the light-receiving surface of the individual as-installed solar cells 14 relative to the horizontal plane and the latitude ? of the installation site of the solar cell module into consideration.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: November 8, 2005
    Assignees: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Satoyuki Ojima, Hiroyuki Ohtsuka, Masatoshi Takahashi, Takenori Watabe, Takao Abe
  • Patent number: 6946597
    Abstract: Photovoltaic devices, such as solar cells, and methods for their manufacture are disclosed. A device may be characterized by an architecture where two more materials having different electron affinities are regularly arrayed such that their presence alternates within distances of between about 1 nm and about 100 nm. The materials are present in a matrix based on a porous template with an array of template pores. The porous template is formed by anodizing a layer of metal. A photovoltaic device may include such a porous template disposed between a base electrode and a transparent conducting electrode. A first charge-transfer material fills the template pores, A second (complementary) charge-transfer material fills additional space not occupied by the first charge-transfer material.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: September 20, 2005
    Assignee: Nanosular, Inc.
    Inventors: Brian M. Sager, Martin R. Roscheisen, Klus Petritsch, Karl Pichler, Jacqueline Fidanza, Dong Yu
  • Patent number: 6943049
    Abstract: The present invention provides a method of manufacturing an active matrix reflecting liquid crystal display device including the step of forming and processing an interlayer insulating film. The step forming and processing an interlayer insulating film includes step A of forming the interlayer insulating film on a silicon film in which the sources and drains of TFTs are formed; step B of forming a photoresist layer on the interlayer insulating film; step C of patterning the photoresist layer in a specified pattern by using, as a photoresist mask for the photoresist layer, a mask having a pattern formed with a resolution limit or less corresponding to the reflecting electrode to be formed; and step D of etching the interlayer insulating film by using the photoresist layer patterned in step C as an etching mask. After step D, a metal film is deposited for simultaneously forming source electrodes, signal wiring, drain electrodes, and the reflecting electrode.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: September 13, 2005
    Assignee: Sony Corporation
    Inventor: Masahiro Fujino
  • Patent number: 6933166
    Abstract: A method of manufacturing a component, in particular a thermal sensor, and a thermal sensor. The component has at least two regions having different heat conductivities, a surface region being created in a substrate and the heat conductivity of the surface region being lower than that of the surrounding substrate. For producing a flat topography on the component a layer is created which covers the surface region. The layer and the surface region have at least approximately similar physical properties.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Robert Bosch GmbH
    Inventor: Thorsten Pannek
  • Patent number: 6858462
    Abstract: Enhanced light absorption of solar cells and photodetectors by diffraction is described. Triangular, rectangular, and blazed subwavelength periodic structures are shown to improve performance of solar cells. Surface reflection can be tailored for either broadband, or narrow-band spectral absorption. Enhanced absorption is achieved by efficient optical coupling into obliquely propagating transmitted diffraction orders. Subwavelength one-dimensional structures are designed for polarization-dependent, wavelength-selective absorption in solar cells and photodetectors, while two-dimensional structures are designed for polarization-independent, wavelength-selective absorption therein. Suitable one and two-dimensional subwavelength periodic structures can also be designed for broadband spectral absorption in solar cells and photodetectors.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: February 22, 2005
    Assignees: Gratings, Inc., Sandia Corporation
    Inventors: Saleem H. Zaidi, James M. Gee
  • Patent number: 6852920
    Abstract: Nano-architected/assembled solar cells and methods for their manufacture are disclosed. The solar cells comprise oriented arrays of nanostructures wherein two or more different materials are regularly arrayed and wherein the presence of two different materials alternates. The two or more materials have different electron affinities. The two materials may be in the form of matrixed arrays of nanostructures. The presence of the two different materials may alternate within distances of between about 1 nm and about 100 nm. An orientation can be imposed on the array, e.g. through solution deposition surfactant templation or other methods.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: February 8, 2005
    Assignee: Nanosolar, Inc.
    Inventors: Brian M. Sager, Martin R. Roscheisen
  • Patent number: 6830951
    Abstract: The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter for said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: December 14, 2004
    Assignee: STMicroelectronics S.r.l.
    Inventors: Enrico Laurin, Matteo Bordogna, Oreste Bernardi
  • Patent number: 6821810
    Abstract: A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectronic fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for lowcost, high volume manufacturing of CMOS and CCD color video cameras.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: November 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Kung Hsiao, Sheng-Liang Pan, Bii-Juno Chang, Kuo-Liang Lu
  • Patent number: 6803261
    Abstract: There is provided a laminated type photoelectric converter whose sensitivity is enhanced uniformly. In the photoelectric converter in which a photoelectric conversion device is laminated above a signal transfer device, the sensitivity is enhanced by providing bends on a lower electrode of the photoelectric conversion device and by confining light uniformly.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: October 12, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6803250
    Abstract: A method for forming an optoelectronic product provides for forming a concave lensing layer registered with a photoactive region within a substrate. The concave lensing layer is formed employing an isotropic etching method. Registered in turn with a concavity with the concave lensing layer is a convex microlens layer formed over the concave lensing layer. The combination of the foregoing lensing layers provides the optoelectronic product with enhanced optical performance.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: October 12, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu
  • Patent number: 6787381
    Abstract: A semiconductor laser capable of emitting a plurality of laser light having different oscillation wavelengths which is formed with dielectric films having little fluctuation in reflectance at ends of a plurality of active layers and a method of production of the same, said semiconductor laser having a plurality of active layers having different compositions on a substrate and emitting in parallel a plurality of laser light having different oscillation wavelengths, wherein a front dielectric film having a predetermined thickness by which a reflectance with respect to light of a predetermined wavelength of an arithmetical mean of oscillation wavelengths becomes the extremal value is formed on an end of the laser emission side, while rear dielectric films having higher reflectances compared with the front dielectric film and having predetermined thicknesses by which reflectances with respect to light having a predetermined wavelength become the extremal values are formed on the end of the rear side, and a method
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: September 7, 2004
    Assignee: Sony Corporation
    Inventor: Kazuhiko Nemoto