Specific Surface Topography (e.g., Textured Surface, Etc.) Patents (Class 438/71)
  • Patent number: 7829906
    Abstract: A method is disclosed for obtaining a high-resolution lenticular pattern on the surface of a light emitting diode. The method comprises imprinting a patterned sacrificial layer of etchable material that is positioned on a semiconductor surface that is in turn adjacent a light emitting active region, and thereafter etching the imprinted sacrificial layer and the underlying semiconductor to transfer an imprinted pattern into the semiconductor layer adjacent the light emitting active region.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 9, 2010
    Assignee: Cree, Inc.
    Inventor: Matthew Donofrio
  • Patent number: 7820475
    Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: October 26, 2010
    Assignee: Sunpower Corporation
    Inventors: Denis De Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
  • Publication number: 20100267218
    Abstract: The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.
    Type: Application
    Filed: June 7, 2010
    Publication date: October 21, 2010
    Applicant: TRANSFORM SOLAR PTY LTD.
    Inventors: Klaus Johannes Weber, Andrew William Blakers
  • Publication number: 20100267186
    Abstract: A method is presented for fabrication of a three-dimensional thin-film solar cell semiconductor substrate from a template. A semiconductor template having three-dimensional surface features comprising a top surfaces substantially aligned along a (100) crystallographic plane of semiconductor template and a plurality of inverted pyramidal cavities defined by sidewalls substantially aligned along a (111) crystallographic plane is formed according to an anisotropic etching process. A dose of relatively of high energy light-mass species is implanted in the template at a uniform depth and parallel to the top surfaces and said sidewalls defining the inverted pyramidal cavities of the template. The semiconductor template is annealed to convert the dose of relatively of high energy light-mass species to a mechanically-weak-thin layer. The semiconductor template is cleaved along the mechanically-weak-thin layer to release a three-dimensional thin-film semiconductor substrate from the semiconductor template.
    Type: Application
    Filed: March 24, 2010
    Publication date: October 21, 2010
    Applicant: SOLEXEL, INC.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
  • Publication number: 20100243042
    Abstract: A high efficiency photovoltaic cell includes a single crystalline or multi-crystalline silicon substrate as an absorber and a selective emitter structure on the front of the absorber. On the back of the absorber is a laminate of intrinsic amorphous hydrogenated silicon, heavily doped amorphous hydrogenated silicon, a transparent conductive oxide and back metallic contact. A method of manufacturing this high efficiency photovoltaic cell includes texturing both surfaces of the absorber, forming the various layers and annealing the photovoltaic cell.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 30, 2010
    Applicant: JA Development Co., Ltd.
    Inventor: Wei Shan
  • Patent number: 7804148
    Abstract: An opto-thermal annealing mask stack layer includes a thermal dissipative layer located over a substrate. A reflective layer is located upon the thermal dissipative layer. A transparent capping layer, that may have a thickness from about 10 to about 100 angstroms, is located upon the reflective layer. The opto-thermal annealing mask layer may be used as a gate electrode within a field effect device.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Jack A. Mandelman, Chandrasekhar Narayan, Chun-Yung Sung
  • Patent number: 7803653
    Abstract: A method of manufacturing an image sensor includes forming a device isolation region in an active pixel sensor area of a semiconductor substrate and alignment keys in a scribe lane area of the semiconductor substrate, such that the depth of the alignment keys is equal to or shallower than the depth of the device isolation region. The method further includes forming a photoelectric converter in the active pixel sensor area, polishing a rear surface of the semiconductor substrate and using the alignment keys to form a microlens at a position corresponding to the photoelectric converter on the polished rear surface of the semiconductor substrate.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: September 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gil-sang Yoo, Byung-jun Park, Yun-ki Lee
  • Publication number: 20100212721
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, wherein the thin film type solar cell is comprised of a substrate with lower and upper surfaces; a first solar cell on the upper surface of the substrate; and a second solar cell on the lower surface of the substrate, wherein a wavelength range of light absorbed into the first solar cell is different from a wave-length range of light absorbed into the second solar cell. In this case, there is no requirement for the tunneling between a first semiconductor layer of the first solar cell and a second semiconductor layer of the second solar cell, whereby the current matching is unnecessary.
    Type: Application
    Filed: August 13, 2008
    Publication date: August 26, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventor: Jin Hong
  • Patent number: 7781240
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: August 24, 2010
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7781252
    Abstract: A method of manufacturing a CMOS image sensor comprising forming a first insulating film on a silicon semiconductor substrate which includes a metal pad; selectively etching the first insulating film, so as to form a first insulating film pattern with a first opening which exposes the metal pad; forming a metal pad protective film in the first opening portion with a predetermined thickness; forming a second insulating film on the first insulating film pattern and metal pad protective film; selectively etching the second insulating film, so as to form a second insulating film pattern which includes a second opening which exposes the metal pad protective film; forming a color filter array (CFA) on the second insulating film pattern; forming micro lenses on the CFA; and performing an etching process in order to remove the metal pad protective film so as to form a metal pad opening.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: August 24, 2010
    Assignee: Dongby Hitek Co., Ltd.
    Inventor: Jun Han Yun
  • Publication number: 20100210062
    Abstract: A method of fabricating a solar cell is disclosed. The solar cell fabricating method includes forming a first transparent conductive layer on a transparent substrate, texturing an upper surface of the first transparent conductive layer using an etchant solution configured to contain an acid with a molecular weight of about 58˜300, forming a photoelectric conversion layer on the first transparent conductive layer, forming a second transparent conductive layer on the photoelectric conversion layer, and forming a rear electrode on the second transparent conductive layer.
    Type: Application
    Filed: December 18, 2009
    Publication date: August 19, 2010
    Inventors: Tae Youn KIM, Weon Seo Park, Jeong Woo Lee, Seong Kee Park, Kyung Jin Shim
  • Patent number: 7777241
    Abstract: A semiconductor sensor, solar cell or emitter or a precursor therefore having a substrate and textured semiconductor layer deposited onto the substrate. The layer can be textured as grown on the substrate or textured by replicating a textured substrate surface. The substrate or first layer is then a template for growing and texturing other semiconductor layers from the device. The textured layers are replicated to the surface from the substrate to enhance light extraction or light absorption. Multiple quantum wells, comprising several barrier and quantum well layers, are deposited as alternating textured layers. The texturing in the region of the quantum well layers greatly enhances internal quantum efficiency if the semiconductor is polar and the quantum wells are grown along the polar direction. This is the case in nitride semiconductors grown along the polar [0001] or [000-1] directions.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: August 17, 2010
    Assignee: The Trustees of Boston University
    Inventors: Theodore D. Moustakas, Jasper S. Cabalu
  • Publication number: 20100190288
    Abstract: Thin semiconductor foils can be formed using light reactive deposition. These foils can have an average thickness of less than 100 microns. In some embodiments, the semiconductor foils can have a large surface area, such as greater than about 900 square centimeters. The foil can be free standing or releasably held on one surface. The semiconductor foil can comprise elemental silicon, elemental germanium, silicon carbide, doped forms thereof, alloys thereof or mixtures thereof. The foils can be formed using a release layer that can release the foil after its deposition. The foils can be patterned, cut and processed in other ways for the formation of devices. Suitable devices that can be formed form the foils include, for example, photovoltaic modules and display control circuits.
    Type: Application
    Filed: March 31, 2010
    Publication date: July 29, 2010
    Inventors: Henry Hieslmair, Ronald J. Mosso, Robert B. Lynch, Shivkumar Chiruvolu, William E. McGovern, Craig R. Horne, Narayan Solayappan, Ronald M. Cornell
  • Publication number: 20100184248
    Abstract: Low-relief texture can be created by applying and firing frit paste on a silicon surface. Where frit contacts the surface at high temperature, it etches silicon, dissolving silicon in the softened glass frit. The result is a series of small, randomly located pits, which produce a near-Lambertian surface, suitable for use in a photovoltaic cell. This texturing method consumes little silicon, and is advantageously used in a photovoltaic cell in which a thin silicon lamina comprises the base region of the cell. When the lamina is formed by implanting ions in a donor wafer to form a cleave plane and cleaving the lamina from the donor wafer at the cleave plane, the ion implantation step will serve to translate texture formed at a first surface to the cleave plane, and thus to the second, opposing surface following cleaving. Low-relief texture formed by other methods can be translated from the first surface to the second surface in this way as well.
    Type: Application
    Filed: March 30, 2010
    Publication date: July 22, 2010
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Mohamed M. Hilali, S. Brad Herner
  • Publication number: 20100175752
    Abstract: A three-dimensional solar cell comprising a semiconductor substrate with an inverted pyramidal cavity, emitter metallization regions on ridges on the surface of the semiconductor substrate which define an opening of the inverted pyramidal cavity, and base metallization regions on a region which form the apex of the inverted pyramidal cavity. A method for fabricating a three-dimensional thin-film solar cell from an inverted pyramidal three-dimensional thin-film silicon substrate by doping ridges on the surface of the semiconductor substrate which define an opening of an inverted pyramidal cavity on the substrate to form an emitter region, and doping a region which forms the apex of the inverted pyramidal cavity to form a base region. Adding a surface passivation layer to the surface of the substrate. Selectively etching the passivation layer from the emitter region and base region. Then concurrently metallizing the emitter region and base region.
    Type: Application
    Filed: November 13, 2009
    Publication date: July 15, 2010
    Applicant: SOLEXEL, INC.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
  • Publication number: 20100178723
    Abstract: A photovoltaic cell device, e.g., solar cell, solar panel, and method of manufacture. The device has an optically transparent substrate comprises a first surface and a second surface. A first thickness of material (e.g., semiconductor material, single crystal material) having a first surface region and a second surface region is included. In a preferred embodiment, the surface region is overlying the first surface of the optically transparent substrate. The device has an optical coupling material provided between the first surface region of the thickness of material and the first surface of the optically transparent material.
    Type: Application
    Filed: March 23, 2010
    Publication date: July 15, 2010
    Applicant: Silicon Genesis Corporation
    Inventor: Francois J. Henley
  • Patent number: 7754518
    Abstract: A method and apparatus for thermally processing a substrate is provided. A substrate is disposed within a processing chamber configured for thermal processing by directing electromagnetic energy toward a surface of the substrate. An energy blocker is provided to block at least a portion of the energy directed toward the substrate. The blocker prevents damage to the substrate from thermal stresses as the incident energy approaches an edge of the substrate.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: July 13, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Blake Koelmel, Robert C. McIntosh, David D L Larmagnac, Alexander N. Lerner, Abhilash J. Mayur, Joseph Yudovsky
  • Publication number: 20100159629
    Abstract: It is advantageous to create texture at the surface of a photovoltaic cell to reduce reflection and increase travel length of light within the cell. A method is disclosed to create texture at the surface of a silicon body by reacting a silicide-forming metal at the surface, where the silicide-silicon interface is non-planar, then stripping the silicide, leaving behind a textured surface. Depending on the metal and the conditions of silicide formation, the resulting surface may be faceted. The peak-to-valley height of this texturing will generally be between about 300 and about 5000 angstroms, which is well-suited for use in photovoltaic cells comprising a thin silicon lamina.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventor: S. Brad Herner
  • Patent number: 7741139
    Abstract: A method of manufacturing a solar cell includes forming a diffusion layer on a crystal-type silicon substrate. The diffusion layer has a conductivity opposite to that of the substrate. Furthermore, the method includes etching and removing a part of the diffusion layer by using sodium silicate, and forming a first electrode that makes an electric contact with the diffusion layer and forming a second electrode that makes an electric contact with the substrate.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: June 22, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoichiro Nishimoto
  • Publication number: 20100147378
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The method includes simultaneously forming a first doping region of a first conductive type and a second doping region of a second conductive type opposite the first conductive type into a substrate of the first conductive type, forming a back passivation layer on the first doping region and the second doping region, removing portions of the back passivation layer to expose a portion of the first doping region and a portion of the second doping region, and forming a first electrode and a second electrode that are connected to the exposed portion of the first doping region and the exposed portion of the second doping region, respectively.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 17, 2010
    Applicant: LG Electronics Inc.
    Inventors: Sungeun Lee, Youngho Choe
  • Patent number: 7736939
    Abstract: A method for forming microlenses of different curvatures is described, wherein a substrate having at least a first and a second areas different in height is provided. A transparent photosensitive layer having a planar surface is formed on the substrate and then patterned into at least two islands of different thicknesses respectively over the first area and the second area. The at least two islands are heated and softened to form at least two microlenses of different curvatures respectively over the first area and the second area, wherein the higher an area is, the smaller the curvature of the corresponding microlens is.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: June 15, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Ping Wu, Chia-Huei Lin
  • Publication number: 20100139763
    Abstract: A method for forming an emitter structure on a substrate and emitter structures resulting therefrom is disclosed. In one aspect, a method includes forming, on the substrate, a first layer comprising semiconductor material. The method also includes texturing a surface of the first layer, thereby forming a first emitter region from the first layer, wherein the first emitter region has a first textured surface. The method also includes forming a second emitter region at the first textured surface, the second emitter region having a second textured surface.
    Type: Application
    Filed: October 29, 2009
    Publication date: June 10, 2010
    Applicant: IMEC
    Inventors: Kris Van Nieuwenhuysen, Filip Duerinckx
  • Publication number: 20100132779
    Abstract: A solar cell includes a first electrode on a substrate; a plurality of pillars on the first electrode; a semiconductor layer on the first electrode, wherein a surface area of the semiconductor layer is greater than a surface area of the first electrode; and a second electrode over the semiconductor layer.
    Type: Application
    Filed: May 29, 2008
    Publication date: June 3, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Jin Hong, Jae-Ho Kim, Yong-Woo Shin
  • Publication number: 20100126569
    Abstract: A solar cell includes: a semiconductor substrate having a first surface and a second surface opposite the first surface; uneven patterns disposed on at least one of the first surface and the second surface of the semiconductor substrate; a first impurity layer disposed on the uneven patterns and which includes a first part having a first doping concentration and a second part having a second doping concentration greater than the first doping concentration; and a first electrode which contacts the second part of the first impurity layer and does not contact the first part of the first impurity layer.
    Type: Application
    Filed: October 20, 2009
    Publication date: May 27, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-Seok Oh, Byoung-Kyu Lee, Min Park, Czang-Ho Lee, Myung-Hun Shin, Yuk-Hyun Nam, Seung-Jae Jung, Mi-Hwa Lim, Joon-Young Seo
  • Publication number: 20100129955
    Abstract: A method for fabricating a solar cell is described. The method includes first providing, in a process chamber, a substrate having a light-receiving surface. An anti-reflective coating (ARC) layer is then formed, in the process chamber, above the light-receiving surface of the substrate. Finally, without removing the substrate from the process chamber, a protection layer is formed above the ARC layer.
    Type: Application
    Filed: January 14, 2010
    Publication date: May 27, 2010
    Inventors: Hsin-Chiao Luan, Peter Cousins
  • Patent number: 7723151
    Abstract: A CMOS image sensor and fabricating method thereof enhances a light-receiving capability of an image sensor by preventing poor light-refraction characteristics at the peripheral part of a microlens. The CMOS image sensor includes at least one microlens formed by anistropic etching to have a focusing centerline, a central lens portion, and a peripheral lens portion, wherein the focusing centerline passes through the central lens portion and wherein the peripheral lens portion surrounds the central lens portion. The central lens portion has a first convex curvature based on a first radius and the peripheral lens portion has second convex curvature based on a second radius, wherein the second radius is greater than the first radius.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: May 25, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Kae Hoon Lee
  • Patent number: 7704780
    Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer, and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: April 27, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Chintamani Palsule, John H. Stanback, Thomas E. Dungan, Mark D. Crook
  • Publication number: 20100087030
    Abstract: A method of manufacturing a crystalline silicon solar cell includes steps of preparing a crystalline silicon substrate, texturing the substrate using plasma to form uneven patterns for increasing light absorption, doping ions in the substrate using plasma to form a doping layer for a PN junction, heating the substrate to activate the doped ions, forming an antireflection film on the doping layer, and forming front and back electrodes on front and back surfaces of the substrate, respectively.
    Type: Application
    Filed: May 9, 2008
    Publication date: April 8, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventor: Joung-Sik Kim
  • Patent number: 7691728
    Abstract: A semiconductor device manufacturing method can produce semiconductor light emitting/detecting devices that have high connective strength and high luminous energy by increasing contact areas of electrodes thereof and decreasing enclosed areas of electrodes thereof. A wafer is provided with a semiconductor substrate and a semiconductor epitaxial layer. A plurality of substrate concave portions and epitaxial layer concave portions are formed on the semiconductor substrate and the semiconductor epitaxial layer, respectively. Substrate electrodes and epitaxial layer electrodes are formed in the substrate concave portions and the epitaxial layer concave portions. A substrate surface electrode and an epitaxial layer surface electrode can be formed on the semiconductor substrate and the substrate electrodes and the semiconductor epitaxial layer and the epitaxial layer electrodes, respectively.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: April 6, 2010
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Yasuhiro Tada, Akihiko Hanya
  • Publication number: 20100068839
    Abstract: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes forming at least one first conductor coupled to a base; coupling a plurality of substrate particles to the at least one first conductor; converting the plurality of substrate particles into a plurality of diodes; forming at least one second conductor coupled to the plurality of spherical diodes; and depositing or attaching a plurality of substantially spherical lenses suspended in a first polymer, with the lenses and the suspending polymer having different indices of refraction. In some embodiments, the lenses and diodes have a ratio of mean diameters or lengths between about 10:1 and 2:1. In various embodiments, the forming, coupling and converting steps are performed by or through a printing process.
    Type: Application
    Filed: September 15, 2009
    Publication date: March 18, 2010
    Applicant: NTHDEGREE TECHNOLOGIES WORLDWIDE INC.
    Inventors: William Johnstone Ray, Mark David Lowenthal, Neil O. Shotton, Richard A. Blanchard, Mark Allan Lewandowski, Kirk A. Fuller, Donald Odell Frazier
  • Publication number: 20100065117
    Abstract: The present invention relates to a solar cell. The solar cell includes a substrate of a first conductive type, the substrate having a textured surface on which a plurality of projected portions are formed, and surfaces of the projected portions having at least one of a plurality of particles attached thereto and a plurality of depressions formed thereon; an emitter layer of a second conductive type opposite the first conductive type, the emitter layer being positioned in the substrate so that the emitter layer has the textured surface; an anti-reflection layer positioned on the emitter layer which has the textured surface and including at least one layer; a plurality of first electrodes electrically connected to the emitter layer; and at least one second electrode electrically connected to the substrate.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 18, 2010
    Inventors: Jinsung KIM, Chulchae Choi, Changseo Park, Jaewon Chang, Hyungseok Kim, Youngho Choe, Philwon Yoon
  • Patent number: 7678603
    Abstract: A CMOS image sensor (CIS) device includes an array of pixels, each pixel including a sensing element (e.g., a photodiode) and access circuitry. To facilitate the passage of light to the photodiode, each pixel includes a via wave guide (VWG) defined in the metallization layer formed over the pixel's photodiode. The VWG includes an upper light concentrator having a curved (e.g., parabolic) surface extending from a relatively wide upper opening to a relatively small lower opening. The VWG also includes a lower section extending between the lower opening of the light concentrator and the associated photodiode. A mirror coating is optionally formed on the surface of the VWG. An optional light-guiding material and/or color filter materials are disposed inside the VWG. An optional microlens is formed over the VWG.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: March 16, 2010
    Assignee: Tower Semiconductor Ltd.
    Inventors: Hai Reznik, Amos Fenigstein, Doron Amihood, David Choen
  • Publication number: 20100060758
    Abstract: A solid-state imaging device includes a sensor including an impurity diffusion layer provided in a surface layer of a semiconductor substrate; and an oxide insulating film containing carbon, the oxide insulating film being provided on the sensor.
    Type: Application
    Filed: August 20, 2009
    Publication date: March 11, 2010
    Applicant: Sony Corporation
    Inventors: Itaru Oshiyama, Yuki Miyanami, Susumu Hiyama, Kazuki Tanaka
  • Patent number: 7671385
    Abstract: An image sensor contains a semiconductor substrate, a plurality of pixels defined on the semiconductor substrate, a photo conductive layer and a transparent conductive layer formed on the pixel electrodes of the pixels in order, and a shield device positioned between any two adjacent pixel electrodes. The shield device has a shield electrode and an isolation structure surrounding the shield electrode so that the shield electrode is isolated from the pixel electrodes and the photo conductive layer by the isolation structure.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: March 2, 2010
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Hsin-Heng Wang, Chiu-Tsung Huang, Shih-Siang Lin
  • Publication number: 20100043876
    Abstract: Improved organic photovoltaic cells including a composition useful for forming an active layer which comprises (a) at least one p-type material, (b) at least one n-type material, (c) at least one first solvent and (d) at least one second solvent, wherein the first solvent is different from the second solvent, and the first solvent comprises at least one alkylbenzene or benzocyclohexane, and the second solvent comprises at least one carbocyclic compound. The second solvent can be used in lesser amounts but can improve efficiency in cells.
    Type: Application
    Filed: August 14, 2009
    Publication date: February 25, 2010
    Inventors: Richard Tuttle, Matthew Ladd Reitz, Brian E. Woodworth
  • Patent number: 7667286
    Abstract: A high sensitive solid-state imaging apparatus which corresponds to an optical system has a short focal length (an optical system having a large incident angle ?). Each pixel (2.8 mm square in size) includes a distributed refractive index lens, a color filter for green, Al wirings, a signal transmitting unit, a planarized layer, a light-receiving element (Si photodiode), and an Si substrate. The concentric circle structure of the distributed index lens is made of four types of materials having different refractive indexes such as TiO2 (n=2.53), SiN (n=2.53), SiO2 (n=2.53), and air (n=1.0). In the concentric structure, a radial difference of outer peripheries of adjacent circular light-transmitting films is 100 nm. Furthermore, the film thickness is 0.4 ?m.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: February 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Kimiaki Toshikiyo, Kazutoshi Onozawa, Daisuke Ueda, Taku Goubara
  • Patent number: 7666705
    Abstract: Provided is an image sensor and method of manufacturing the same. The image sensor can include a semiconductor substrate, a metal interconnection layer, an inorganic layer, lens seed patterns, and microlenses. The semiconductor substrate can include unit pixels. The metal interconnection layer can be disposed on the semiconductor substrate to provide signal and poser connections to the unit pixels. The inorganic layer can be disposed on the metal interconnection layer. The lens seed patterns are selectively disposed on the inorganic layer and are formed of an organic material. The microlenses are formed on the lens seed patterns.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: February 23, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Young Je Yun
  • Publication number: 20100037943
    Abstract: Systems and methods that mitigate bulk recombination losses in a vertical multi junction (VMJ) cell via a texturing on a light receiving surface. The textures can be in form of cavity shaped grooves, and a plane containing repetitive cross section configurations thereof is substantially perpendicular to the direction of stacking the unit cells that form the VMJ. Incident light can be refracted in the plane that includes the cross section configurations and away from the p+ and n+ diffused doped regions.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 18, 2010
    Inventor: Bernard L. Sater
  • Publication number: 20100037946
    Abstract: [Object] To provide a method for manufacturing a solar cell element including a semiconductor substrate that includes a high-concentration dopant layer located near the surface of the semiconductor substrate and a low-concentration dopant layer located more inside the semiconductor substrate than the high-concentration dopant layer [Solving Means] A method includes' heating a semiconductor substrate having a first conductivity type in a first atmosphere which contains a dopant having a second conductivity type and which has a first dopant concentration; heating in a second atmosphere the semiconductor substrate heated in the first atmosphere, the second atmosphere having a second dopant concentration less than the first dopant concentration; and heating in a third atmosphere the semiconductor substrate heated in the second atmosphere, the third atmosphere having a third dopant concentration greater than the second dopant concentration.
    Type: Application
    Filed: September 27, 2007
    Publication date: February 18, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Rui Yatabe, Kenichi Kurobe, Yosuke Inomata
  • Publication number: 20100029034
    Abstract: A method of manufacturing a solar cell having a texture on a surface of a silicon substrate includes first forming a porous layer on the surface of the silicon substrate by dipping the silicon substrate into a mixed aqueous solution of oxidizing reagent containing metal ions and hydrofluoric acid. Second, a texture is formed by etching the surface of the silicon substrate after the porous layer is formed, by dipping the silicon substrate into a mixed acid mainly containing hydrofluoric acid and nitric acid.
    Type: Application
    Filed: October 24, 2007
    Publication date: February 4, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Yoichiro Nishimoto
  • Publication number: 20100025796
    Abstract: An energy-enhanced, low-temperature growth technique is used for direct deposition of periodic table column III nitrides-based negative electron affinity (NEA) photocathodes on standard glass microchannel plates (MCPs.) As working examples, low-temperature RF plasma-assisted molecular beam epitaxy growth (MBE) of p-type GaN layers on sapphire, quartz, and glass and alumina MCPs and their photoemission characterization is disclosed.
    Type: Application
    Filed: August 3, 2009
    Publication date: February 4, 2010
    Inventor: Amir Massoud Dabiran
  • Patent number: 7655495
    Abstract: A CMOS image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: February 2, 2010
    Assignee: International Business Machiens Corporation
    Inventors: James W. Adkisson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Anthony K. Stamper
  • Patent number: 7651884
    Abstract: A fabrication method of a CMOS image sensor provides forms micro lenses over a substrate by etching a plurality of holes in a wiring layer over a pixel area. An oxide layer is deposited to form a surface with a semi-circular cross section over the holes. The oxide layer may be etched away, leaving micro lenses formed in the wiring layer.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: January 26, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jeong-Su Park
  • Publication number: 20100012179
    Abstract: A solar cell with high photon utilization includes a substrate, a transparent conductive oxide layer, an anti-reflection coating (ARC) layer and at least one main charge collecting line. The substrate has a front side and a back side. The substrate has a first-type semiconductor layer close to the back side and a second-type semiconductor layer close to the front side. The transparent conductive oxide layer is formed on the front side. The ARC layer is formed on the transparent conductive oxide layer. The main charge collecting line penetrates through the ARC layer and projects from the ARC layer, and the main charge collecting line is electrically connected to the transparent conductive oxide layer. A method of manufacturing the solar cell is also disclosed.
    Type: Application
    Filed: February 18, 2009
    Publication date: January 21, 2010
    Inventor: Chien-Li Cheng
  • Patent number: 7644490
    Abstract: A method of forming an actuator and a relay using a micro-electromechanical (MEMS)-based process is disclosed. The method first forms the lower sections of a square copper coil, and then forms an actuation member that includes a core section and a horizontally adjacent floating cantilever section. The core section, which lies directly over the lower coil sections, is electrically isolated from the lower coil sections. The method next forms the side and upper sections of the coil, along with first and second electrodes that are separated by a switch gap. The first electrode lies directly over an end of the core section, while the second electrode lies directly over an end of the floating cantilever section.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: January 12, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Trevor Niblock, Peter Johnson
  • Patent number: 7646076
    Abstract: A method of fabricating a CMOS image sensor is provided, in which a trapezoidal microlens pattern profile is formed to facilitate reflowing the microlens pattern and by which a curvature of the microlens may be enhanced to raise its light-condensing efficiency. The method includes forming a plurality of photodiodes on a semiconductor substrate; forming an insulating interlayer on the semiconductor substrate including the photodiodes; forming a protective layer on the insulating interlayer; forming a plurality of color filters corresponding to the photodiodes; forming a top coating layer on the color filters; forming a microlens pattern on the top coating layer; and forming a plurality of microlenses by reflowing the microlens pattern.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: January 12, 2010
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Suk Lee
  • Patent number: 7642119
    Abstract: A method for manufacturing an image sensor is provided. The method can include forming an oxide layer on a color filter layer, forming a first oxide layer microlens by etching the oxide layer, forming a second oxide layer microlens on the first oxide layer microlens, and forming a third oxide layer microlens on the second oxide layer microlens.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: January 5, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Chung Kyung Jung
  • Patent number: 7638852
    Abstract: A backside illuminated sensor includes a semiconductor substrate having a front surface and a back surface, and a plurality of pixels formed on the front surface of the semiconductor substrate. The sensor further includes a plurality of absorption depths formed within the back surface of the semiconductor substrate. Each of the plurality of absorption depths is arranged according to each of the plurality of pixels. A method for forming a backside illuminated includes providing a semiconductor substrate having a front surface and a back surface and forming a first, second, and third pixel on the front surface of the semiconductor substrate. The method further includes forming a first, second, and third thickness within the back surface of the semiconductor substrate, wherein the first, second, and third thickness lies beneath the first, second, and third pixel, respectively.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: December 29, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Chris Hsieh, Dun-Nian Yaung, Chung-Yi Yu
  • Publication number: 20090309180
    Abstract: A surface profile sensor includes an interlayer insulating film provided with a planarized upper surface formed above a semiconductor substrate, a detection electrode film formed on the interlayer insulating film, an upper insulating film formed on the detection electrode film and the interlayer insulating film and including the surface on which a silicon nitride film is exposed, and a protection insulating film deposited on the upper insulating film and made of a tetrahedral amorphous carbon (ta-C) film including a window formed on the detection electrode film.
    Type: Application
    Filed: August 26, 2009
    Publication date: December 17, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Takahiro Yamagata, Kouichi Nagai
  • Publication number: 20090311821
    Abstract: A method for producing a silicon substrate for solar cells is provided. The method includes performing a saw damage removal (SDR) and surface macro-texturing on a silicon substrate with acids solution, so that a surface of the silicon substrate becomes an irregular surface. Thereafter, a metal-activated selective oxidation is performed on the irregular surface with an aqueous solution containing an oxidant and a metal salt, in which the oxidant is one selected from persulfate ion, permanganate ion, bichromate ion, and a mixture thereof. Afterwards, the irregular surface is etched with an aqueous solution containing HF and H2O2 so as to form a nano-texturized silicon substrate.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 17, 2009
    Applicant: Industrial Technology Research Institute
    Inventors: Zahariev Dimitrov, Chien-Rong Huang, Ching-Hsi Lin