Silicide Patents (Class 438/721)
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Patent number: 5880035Abstract: An object of this invention is to provide a dry etching method enabling a higher productivity and a higher yield without giving any bad effect to a substrate (such as, for instance, damages to a gate oxide film bed) even in a case where a side wall protection film is formed and then the side wall protection film must be removed later.This invention is a dry etching method for processing a polycide layer, in which a poly Si layer and a refractory metal silicide layer are formed in this order on an oxide film bed, by etching resist patterns selectively formed on said polycide layer into a mask, wherein the undercut 6 is provided in the refractory metal silicide layer 2 or other layers contacting the resist pattern 1 and then the refractory metal silicide layer 2 and the poly Si layer 3 are isotropically etched.Type: GrantFiled: April 25, 1997Date of Patent: March 9, 1999Assignee: Sony CorporationInventor: Seiichi Fukuda
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Patent number: 5880033Abstract: A method for etching metal silicide layers 22a, 22b and polysilicon layers 24a, 24b on a substrate 20 with high etching selectivity, and anisotropic etching properties, is described. In the method, the substrate 20 is placed in a plasma zone 55, and process gas comprising Cl.sub.2, O.sub.2, and N.sub.2, is introduced into the plasma zone. A plasma is formed from the process gas to selectively etch the metal silicide layer 22 at a first etch rate that is higher than a second rate of etching of the polysilicon layer 24, while providing substantially anisotropic etching of the metal silicide and polysilicon layers. Preferably, the plasma is formed using combined inductive and capacitive plasma sources.Type: GrantFiled: June 17, 1996Date of Patent: March 9, 1999Assignee: Applied Materials, Inc.Inventor: Hui-Ing Tsai
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Patent number: 5874363Abstract: Metal silicide is removed at a faster rate than polysilicon in dry etching of metal silicide/polysilicon composites with an etching gas made from HCl and Cl.sub.2 at a volumetric flowrate ratio of HCl:Cl.sub.2 within the range of 3:1 to 5:1.Type: GrantFiled: May 13, 1996Date of Patent: February 23, 1999Assignees: Kabushiki Kaisha Toshiba, International Business Machines Corporation, Siemens Components, Inc.Inventors: Peter D. Hoh, Tokuhisa Ohiwa, Virinder Grewal, Bruno Spuler, Waldemar Kocon, Guadalupe Wiltshire
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Patent number: 5863839Abstract: During the etching of a silicon-containing material using a halogen-containing etch gas, a silicon-hydride gas is added to the etch gas to provide increased sidewall protection during the etch. Suitably up to about 50 percent by volume of a silicon-containing gas such as silane is added to improve anisotropy of the etch and to prevent notching at the silicon-substrate interface.Type: GrantFiled: June 27, 1997Date of Patent: January 26, 1999Assignee: Applied Materials, Inc.Inventors: Dale A. Olson, Xue-Yu Qian, Patty Hui-ing Tsai
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Patent number: 5856239Abstract: A process for anisotropically etching a tungsten silicide or tungsten polycide structure. If the silicide/polycide film has an overlying oxide layer, the insulating layer is removed by a gas mixture composed of CHF.sub.3 and C.sub.2 F.sub.6. The WSi.sub.x silicide layer is then etched in a reactive ion etch using a gas mixture formed from Cl.sub.2 and C.sub.2 F.sub.6, with sufficient O.sub.2 added to control polymer formation and prevent undercutting of the silicide. The polysilicon layer is then etched using a gas mixture formed from Cl.sub.2 and C.sub.2 F.sub.6. The result is a highly anisotropic etch process which preserves the critical dimension of the etched structures. The etch parameters may be varied to produce a tapered sidewall profile for use in the formation of butted contacts without the need for a contact mask.Type: GrantFiled: May 2, 1997Date of Patent: January 5, 1999Assignee: National Semiconductor CorporatonInventors: Rashid Bashir, Abul Ehsanul Kabir, Francois Hebert
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Patent number: 5854137Abstract: An improved method of plasma-activated reactive subtractive etching of polycide layers by mixtures of sulfur hexafluoride, hydrogen bromide, and oxygen gases is achieved. After the subtractive etching of the polycide layer is performed, a purging operation of the reaction chamber by admission of a non-reactive gas such as nitrogen followed by evacuation results in the removal of water vapor and other residual species. This purging step inhibits the formation of needle-like crystals of residual compounds thought to form by chemical reaction between hydrogen bromide and water vapor and other species. Such needle-like crystalline residues can be construed as defects in the etched polycide patterns, and their minimization results in increased manufacturing yields after visual inspection. Additionally, the reduced incidence of residual crystalline residues is beneficial in helping to improve subsequent integrated circuit reliability.Type: GrantFiled: April 29, 1996Date of Patent: December 29, 1998Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: So Wein Kuo
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Patent number: 5843848Abstract: There is provided a process which assures a large etching selectivity for resist mask or interlayer insulating film and excellent anisotropy and results in lesser particle contamination and after-corrosion by mainly constituting, with a decomposition byproduct of resist mask, a side wall protection film material which is indispensable for anisotropic etching in the plasma etching of an Al-based metal and by enhancing ion impact resistance and radical attack resistance through reinforcement of film quality to obtain sufficient side wall protection film even when an amount of deposition of the side wall protection film is reduced.Type: GrantFiled: October 18, 1995Date of Patent: December 1, 1998Assignee: Sony CorporationInventor: Shusaku Yanagawa
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Patent number: 5792710Abstract: Disclosed herein is a method of manufacturing a semiconductor device, the method including a step of anisotropic-etching of a high-melting-point (or refractory) metal silicide layer by use of a halogen-containing gas using. This halogen-containing gas has a boron trichloride gas as a main component gas and either one of a chlorine gas or a hydrogen bromide gas as an auxiliary or a sub-component gas.Type: GrantFiled: March 11, 1997Date of Patent: August 11, 1998Assignee: NEC CorporationInventors: Kazuyoshi Yoshida, Hidenobu Miyamoto, Eiji Ikawa
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Patent number: 5756401Abstract: There is provided a process of dry etching of a double-layer film composed of a polycrystal silicon film and a metal silicide film formed on a base substance with an etching-proof film composed of an inorganic compound as a mask in a state that reaction gas loaded with at least any one of HBr gas, Br.sub.2 gas and BBr.sub.3 gas is activated by plasma discharge, and the temperature of the base substance is maintained at 60.degree. C. or higher. With this, it is possible to aim at improvement of dimensional controllability and selectivity of etching without using flon gas, and further to arrange so that the configuration after etching of an object to be etched does not depend on an area ratio on a wafer of the area of a region where an etching-proof film is formed to the exposed area of the object to be etched.Type: GrantFiled: March 8, 1993Date of Patent: May 26, 1998Assignee: Fujitsu LimitedInventor: Katsuhiko Iizuka
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Patent number: 5728619Abstract: A method for forming within an integrated circuit a narrow line-width high aspect ratio via through a first integrated circuit layer which resides upon a second integrated circuit layer. There is first formed upon a semiconductor substrate a second integrated circuit layer which has formed upon its surface a first integrated circuit layer. Through a first etch method, a partial via is then formed within the first integrated circuit layer to a distance of from about 2500 to about 4000 angstroms above the surface of the second integrated circuit layer. The first etch method is chosen to provide a partial via with substantially parallel sidewalls. Through a second etch method, the partial via is then etched completely through the first integrated circuit layer. The second etch method is chosen to possesses an etch selectivity ratio for the first integrated circuit layer with respect to the second integrated circuit layer of at least about 60:1.Type: GrantFiled: March 20, 1996Date of Patent: March 17, 1998Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia Shiung Tsai, Chen-Hua Douglas Yu
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Patent number: 5626775Abstract: The present invention is directed to the etching of a material selected from the group consisting of silicon dioxide, silicon nitride, boronphosphorus silicate glass, fluorosilicate glass, siliconoxynitride, tungsten, tungsten silicide and mixtures thereof under plasma etch conditions, particularly for cleaning operations to remove silicon dioxide or silicon nitride from the walls and other surfaces within a reaction chamber of a plasma-enhanced chemical vapor deposition reactor. The etching chemicals used in the etch process are trifluoroacetic acid and it derivatives, such as; trifluoroacetic anhydride, trifluoromethyl ester of trifluoroacetic acid and trifluoroacetic acid amide and mixtures thereof.Type: GrantFiled: May 13, 1996Date of Patent: May 6, 1997Assignee: Air Products and Chemicals, Inc.Inventors: David A. Roberts, Raymond N. Vrtis, Arthur K. Hochberg, Robert G. Bryant, John G. Langan
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Patent number: 5624582Abstract: In a dry non-isotropic etching process, backside cooling by helium controls the rate and uniformity of etching in a thermal silicon layer, the taper of profiles etched into silicon dioxide layers, and the dimension and uniformity of etched structures in a polycide or polysilicon layer, on the surface of a silicon wafer. Helium pressures from greater than 2 torr to more than 10 torr are satisfactorily utilized to produce these effects.Type: GrantFiled: March 28, 1994Date of Patent: April 29, 1997Assignee: VLSI Technology, Inc.Inventor: John L. Cain
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Patent number: 5620615Abstract: The present invention teaches a method for etching or removing a tungsten (W) film and a tungsten silicide (WSi.sub.x) film during a semiconductor fabrication process, by the steps of: removing any exposed portions of the W or WSi.sub.x film by presenting an etchant chemistry comprising NF.sub.3 and HeO.sub.2 to these exposed portions at a temperature ranging from -20.degree. C. to 100.degree. C. The etchant chemistry is also effective for dry cleaning a deposition chamber by removing previously deposited films of W or WSi.sub.x.Type: GrantFiled: November 30, 1995Date of Patent: April 15, 1997Assignee: Micron Technology, Inc.Inventor: David J. Keller