Electrically Conductive Material (e.g., Metal, Conductive Oxide, Etc.) Patents (Class 438/720)
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Patent number: 10280519Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.Type: GrantFiled: December 7, 2017Date of Patent: May 7, 2019Assignee: ASM IP HOLDING B.V.Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
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Patent number: 10283319Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.Type: GrantFiled: December 7, 2017Date of Patent: May 7, 2019Assignee: ASM IP HOLDING B.V.Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
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Patent number: 10273584Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.Type: GrantFiled: December 7, 2017Date of Patent: April 30, 2019Assignee: ASM IP HOLDING B.V.Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
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Patent number: 10231333Abstract: Methods of making a copper interconnect plated through hole assembly are disclosed. Nano copper ink dispersed in an organic solvent is able to be filled in the plated through hole and forming the copper interconnect by sintering at a temperature below the melting of the copper.Type: GrantFiled: June 17, 2014Date of Patent: March 12, 2019Assignee: Flextronics AP, LLC.Inventors: Weifeng Liu, Zhen Feng, Anwar Mohammed, David Geiger, Murad Kurwa
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Patent number: 10079176Abstract: A barrier seed tool is configured to clean trenches in a first chamber, line the trenches with a diffusion barrier layer, and form a copper seed layer over the diffusion barrier layer in a second chamber. The clean chamber is configured to reduce overhangs in the copper seed layer by producing a plasma comprising positively and negatively charged ions including halogen ions, filtering the plasma to selectively exclude positively charged ions, and bombarding with the filtered plasma. The tool and related method can be used to reduce overhangs and improve subsequent gap fill while avoiding excessive damage to the dielectric matrix.Type: GrantFiled: July 18, 2016Date of Patent: September 18, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Ya-Lien Lee
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Patent number: 9960052Abstract: Embodiments of the present invention provide methods for patterning a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a metal layer on a substrate includes (a) supplying an etching gas mixture comprising a hydro-carbon gas into a processing chamber having a substrate disposed therein, the substrate having a metal layer disposed thereon, (b) exposing the metal layer to an ashing gas mixture comprising a hydrogen containing gas to the substrate, and (c) repeatedly performing steps (a) and (b) until desired features are formed in the metal layer. During the patterning process, the substrate temperature may be controlled at greater than 50 degrees Celsius.Type: GrantFiled: April 2, 2014Date of Patent: May 1, 2018Assignee: Applied Materials, Inc.Inventors: Sumit Agarwal, Ann Chien, Chiu-Pien Kuo, Mark Hoinkis, Bradley J. Howard
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Patent number: 9837286Abstract: A method for selectively etching a tungsten layer on a substrate includes arranging a substrate including a tungsten layer on a substrate support. The substrate processing chamber includes an upper chamber region, an inductive coil arranged outside of the upper chamber region, a lower chamber region including the substrate support and a gas dispersion device arranged between the upper and lower chamber regions. The gas dispersion device includes a plurality of holes in fluid communication with the upper and lower chamber regions. The method further includes controlling pressure in the substrate processing chamber in a range from 0.4 Torr to 10 Torr; supplying an etch gas mixture including fluorine-based gas to the upper chamber region; striking inductively coupled plasma in the upper chamber region by supplying power to the inductive coil; and selectively etching the tungsten layer relative to at least one other film material of the substrate.Type: GrantFiled: February 3, 2016Date of Patent: December 5, 2017Assignee: LAM RESEARCH CORPORATIONInventors: Dengliang Yang, Helen H. Zhu, George Matamis, Brad Jacobs, Joon Hong Park, Joydeep Guha
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Patent number: 9659791Abstract: Methods are described for etching metal layers that are difficult to volatize, such as cobalt, nickel, and platinum to form an etched metal layer with reduced surface roughness. The methods include pretreating the metal layer with a local plasma formed from a hydrogen-containing precursor. The pretreated metal layer is then reacted with a halogen-containing precursor to form a halogenated metal layer having a halogenated etch product. A carbon-and-nitrogen-containing precursor reacts with the halogenated etch product to form a volatile etch product that can be removed in the gas phase from the etched surface of the metal layer. The surface roughness may be reduced by performing one or more plasma treatments on the etching metal layer after a plurality of etching sequences. Surface roughness is also reduced by controlling the temperature and length of time the metal layer is reacting with the etchant precursors.Type: GrantFiled: July 16, 2015Date of Patent: May 23, 2017Assignee: Applied Materials, Inc.Inventors: Xikun Wang, David Cui, Anchuan Wang, Nitin K. Ingle
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Patent number: 9396992Abstract: A barrier seed tool is configured to clean trenches in a first chamber, line the trenches with a diffusion barrier layer, and form a copper seed layer over the diffusion barrier layer in a second chamber. The clean chamber is configured to reduce overhangs in the copper seed layer by producing a plasma comprising positively and negatively charged ions including halogen ions, filtering the plasma to selectively exclude positively charged ions, and bombarding with the filtered plasma. The tool and related method can be used to reduce overhangs and improve subsequent gap fill while avoiding excessive damage to the dielectric matrix.Type: GrantFiled: March 4, 2014Date of Patent: July 19, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Ya-Lien Lee
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Patent number: 9359679Abstract: Embodiments of the present disclosure provide methods for etching a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one example, a method of patterning a metal layer on a substrate includes supplying a first etching gas mixture comprising a hydro-carbon gas and a hydrogen containing gas into a processing chamber having a substrate disposed therein, the substrate having a metal layer disposed thereon, supplying a second gas mixture comprising the hydrogen containing gas to a surface of the etched metal layer disposed on the substrate, and supplying a third gas mixture comprising an inert gas into the processing chamber to sputter clean the surface of the etched metal layer.Type: GrantFiled: October 3, 2014Date of Patent: June 7, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Sumit Agarwal, Bradley J. Howard
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Patent number: 9299582Abstract: Methods of selectively etching metal-containing materials from the surface of a substrate are described. The etch selectively removes metal-containing materials relative to silicon-containing films such as silicon, polysilicon, silicon oxide, silicon germanium and/or silicon nitride. The methods include exposing metal-containing materials to halogen containing species in a substrate processing region. A remote plasma is used to excite the halogen-containing precursor and a local plasma may be used in embodiments. Metal-containing materials on the substrate may be pretreated using moisture or another OH-containing precursor before exposing the resulting surface to remote plasma excited halogen effluents in embodiments.Type: GrantFiled: October 13, 2014Date of Patent: March 29, 2016Assignee: Applied Materials, Inc.Inventors: Nitin K. Ingle, Jessica Sevanne Kachian, Lin Xu, Soonam Park, Xikun Wang, Jeffrey W. Anthis
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Patent number: 9299575Abstract: Methods of evenly etching tungsten liners from high aspect ratio trenches are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor and a high flow of helium. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with tungsten coating a patterned substrate having high aspect ratio trenches. The plasmas effluents react with exposed surfaces and evenly remove tungsten from outside the trenches and on the sidewalls of the trenches. The plasma effluents pass through an ion suppression element positioned between the remote plasma and the substrate processing region. Optionally, the methods may include concurrent ion bombardment of the patterned substrate to help remove potentially thicker horizontal tungsten regions, e.g., at the bottom of the trenches or between trenches.Type: GrantFiled: March 17, 2014Date of Patent: March 29, 2016Assignee: Applied Materials, Inc.Inventors: Seung Park, Xikun Wang, Jie Liu, Anchuan Wang, Sang-jin Kim
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Patent number: 9076641Abstract: Contacts for semiconductor devices and methods of making thereof are disclosed. A method comprises forming a first layer on a semiconductor, the first layer comprising one or more metals; forming a second layer on the first layer, the second layer comprising the one or more metals, nitrogen and oxygen; and heating the first and second layer such that oxygen migrates from the second layer into the first layer and the first layer comprises a sub-stoichiometric metal oxide after heating. Exemplary embodiments use transition metals such as Ti in the first layer. After heating there is a sub-stoichiometric oxide layer of about 2.5 nm thickness between a metal nitride conductor and the semiconductor. The specific contact resistivity is less than about 7×10?9 ?·cm2.Type: GrantFiled: December 19, 2013Date of Patent: July 7, 2015Assignee: Intermolecular, Inc.Inventor: Khaled Ahmed
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Publication number: 20150140812Abstract: Embodiments of methods for etching cobalt metal using fluorine radicals are provided herein. In some embodiments, a method of etching a cobalt layer in a substrate processing chamber includes: forming a plasma from a process gas comprising a fluorine-containing gas; and exposing the cobalt layer to fluorine radicals from the plasma while maintaining the cobalt layer at a temperature of about 50 to about 500 degrees Celsius to etch the cobalt layer.Type: ApplicationFiled: October 22, 2014Publication date: May 21, 2015Inventors: BHUSHAN N. ZOPE, AVGERINOS V. GELATOS
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Publication number: 20150132970Abstract: An apparatus for processing reaction products that are deposited when an etching target film contained in a target object to be processed is etched is provided with: a processing chamber; a partition plate; a plasma source; a mounting table; a first processing gas supply unit; a second processing gas supply unit. The processing chamber defines a space, and the partition plate is arranged within the processing chamber and divides the space into a plasma generating space and a substrate processing space, while suppressing permeation of ions and vacuum ultraviolet rays. The plasma source generates a plasma in the plasma forming space. The mounting table is arranged in the substrate processing space to mount the target object thereon.Type: ApplicationFiled: April 16, 2013Publication date: May 14, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Eiichi Nishimura, Akitaka Shimizu, Fumiko Yamashita, Daisuke Urayama
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Publication number: 20150118859Abstract: A metal-containing deposit can be efficiently removed. A plasma processing method includes removing a deposit, which adheres to a member within a processing vessel and contains at least one of a transition metal and a base metal, by plasma of a processing gas containing a CxFy gas, in which x is an integer equal to or less than 2 and y is an integer equal to or less than 6, and without containing a chlorine-based gas and a nitrogen-based gas.Type: ApplicationFiled: October 23, 2014Publication date: April 30, 2015Inventors: Masaru NISHINO, Takao FUNAKUBO, Shinichi KOZUKA, Ryosuke NIITSUMA, Tsutomu ITO
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Publication number: 20150104951Abstract: Provided is a method of etching a copper layer. The method includes generating plasma of a processing gas within a processing container which accommodates an object to be processed that includes the copper layer and a metal mask formed on the copper layer. The metal mask contains titanium. In addition, the processing gas includes CH4 gas, oxygen gas, and a noble gas. In an exemplary embodiment, the metal mask may include a layer made of TiN.Type: ApplicationFiled: October 13, 2014Publication date: April 16, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Eiichi NISHIMURA, Keiichi SHIMODA, Kei NAKAYAMA
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Publication number: 20150099369Abstract: An apparatus configured to remove metal etch byproducts from the surface of substrates and from the interior of a substrate processing chamber. A plasma is used in combination with a solid state light source, such as an LED, to desorb metal etch byproducts. The desorbed byproducts may then be removed from the chamber.Type: ApplicationFiled: May 29, 2014Publication date: April 9, 2015Applicant: Applied Materials, Inc.Inventors: Subhash Deshmukh, Joseph Johnson, Jingjing Liu, He Ren
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Publication number: 20150093897Abstract: Semiconductor devices and methods of fabricating the same are provided. The methods include preparing a template having a three dimensional (3D) stair type structure formed in intaglio, forming an imprint pattern having the stair type structure using the template, and simultaneously forming stair type patterns on a substrate using the imprint pattern.Type: ApplicationFiled: June 9, 2014Publication date: April 2, 2015Inventors: Cha-Won Koh, Hyun-Woo Kim, Jeon-ll Lee, Hyo-Sung Lee
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Patent number: 8980763Abstract: Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasma effluents react with exposed surfaces and selectively remove tungsten while very slowly removing other exposed materials. Sequential and simultaneous methods are included to remove thin tungsten oxide which may, for example, result from exposure to the atmosphere.Type: GrantFiled: March 15, 2013Date of Patent: March 17, 2015Assignee: Applied Materials, Inc.Inventors: Xikun Wang, Ching-Mei Hsu, Nitin K. Ingle, Zihui Li, Anchuan Wang
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Patent number: 8975191Abstract: There is provided a plasma etching method including a first process of etching an intermediate layer, which contains silicon and nitrogen and is positioned below a resist mask formed on a surface of a substrate, to cause a silicon layer positioned below the intermediate layer to be exposed through the resist mask and the intermediate layer, a second process of subsequently supplying a chlorine gas to the substrate to cause a reaction product to attach onto sidewalls of opening portions of the resist mask and the intermediate layer, and a third process of etching a portion of the silicon layer corresponding to the opening portion of the intermediate layer using a process gas containing sulfur and fluorine to form a recess in the silicon layer.Type: GrantFiled: February 7, 2012Date of Patent: March 10, 2015Assignee: Tokyo Electron LimitedInventors: Kazuhito Tohnoe, Yusuke Hirayama, Yasuyoshi Ishiyama, Wataru Hashizume
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Patent number: 8969213Abstract: A metal layer is deposited over an underlying material layer. The metal layer includes an elemental metal that can be converted into a dielectric metal-containing compound by plasma oxidation and/or nitridation. A hard mask portion is formed over the metal layer. Plasma oxidation or nitridation is performed to convert physically exposed surfaces of the metal layer into the dielectric metal-containing compound. The sequence of a surface pull back of the hard mask portion, trench etching, another surface pull back, and conversion of top surfaces into the dielectric metal-containing compound are repeated to form a line pattern having a spacing that is not limited by lithographic minimum dimensions.Type: GrantFiled: July 30, 2012Date of Patent: March 3, 2015Assignee: International Business Machines CorporationInventors: Chiahsun Tseng, David V. Horak, Chun-chen Yeh, Yunpeng Yin
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Patent number: 8932959Abstract: Etching of a thin film stack including a lower thin film layer containing an advanced memory material is carried out in an inductively coupled plasma reactor having a dielectric RF window without exposing the lower thin film layer, and then the etch process is completed in a toroidal source plasma reactor.Type: GrantFiled: March 6, 2013Date of Patent: January 13, 2015Assignee: Applied Materials, Inc.Inventors: Srinivas D. Nemani, Mang-mang Ling, Jeremiah T. Pender, Kartik Ramaswamy, Andrew Nguyen, Sergey G. Belostotskiy, Sumit Agarwal
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Patent number: 8932406Abstract: The molecular etcher carbonyl fluoride (COF2) or any of its variants, are provided for, according to the present invention, to increase the efficiency of etching and/or cleaning and/or removal of materials such as the unwanted film and/or deposits on the chamber walls and other components in a process chamber or substrate (collectively referred to herein as “materials”). The methods of the present invention involve igniting and sustaining a plasma, whether it is a remote or in-situ plasma, by stepwise addition of additives, such as but not limited to, a saturated, unsaturated or partially unsaturated perfluorocarbon compound (PFC) having the general formula (CyFz) and/or an oxide of carbon (COx) to a nitrogen trifluoride (NF3) plasma into a chemical deposition chamber (CVD) chamber, thereby generating COF2. The NF3 may be excited in a plasma inside the CVD chamber or in a remote plasma region upstream from the CVD chamber.Type: GrantFiled: March 15, 2013Date of Patent: January 13, 2015Assignee: Matheson Tri-Gas, Inc.Inventors: Glenn Mitchell, Ramkumar Subramanian, Carrie L. Wyse, Robert Torres, Jr.
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Patent number: 8921234Abstract: Methods of etching exposed titanium nitride with respect to other materials on patterned heterogeneous structures are described, and may include a remote plasma etch formed from a fluorine-containing precursor. Precursor combinations including plasma effluents from the remote plasma are flowed into a substrate processing region to etch the patterned structures with high titanium nitride selectivity under a variety of operating conditions. The methods may be used to remove titanium nitride at faster rates than a variety of metal, nitride, and oxide compounds.Type: GrantFiled: March 8, 2013Date of Patent: December 30, 2014Assignee: Applied Materials, Inc.Inventors: Jie Liu, Jingchun Zhang, Anchuan Wang, Nitin K. Ingle, Seung Park, Zhijun Chen, Ching-Mei Hsu
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Patent number: 8894870Abstract: A system and method for etching a material, including a compound having a formulation of XYZ, wherein X and Y are one or more metals and Z is selected from one or more Group 13-16 elements, such as carbon, nitrogen, boron, silicon, sulfur, selenium, and tellurium, are disclosed. The method includes a first etch process to form one or more first volatile compounds and a metal-depleted layer and a second etch process to remove at least a portion of the metal-depleted layer.Type: GrantFiled: March 4, 2013Date of Patent: November 25, 2014Assignee: ASM IP Holding B.V.Inventors: Jereld Lee Winkler, Eric James Shero, Fred Alokozai
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Patent number: 8877651Abstract: A method for manufacturing a semiconductor device includes forming a contact etch stop layer on an active area of a substrate that has a gate stack formed thereon. The gate stack includes a metal gate and a metal oxide. The contact etch stop layer includes a silicon oxide layer sandwiched between a first silicon nitride layer and a second silicon nitride layer that is disposed on the active area. The method further includes forming a contact hole extending through an interlayer dielectric layer on the first silicon nitride layer using the first silicon nitride layer as a protection for the active area, removing a portion of the first silicon nitride layer disposed at the bottom of the contact hole using the silicon oxide layer as a protection for the active area, and removing the metal oxide using the second silicon nitride layer as a protection for the active area.Type: GrantFiled: December 14, 2011Date of Patent: November 4, 2014Assignee: Semiconductor Manufacturing International (Beijing) CorporationInventors: Qiuhua Han, Xinpeng Wang, Yi Huang
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Publication number: 20140273492Abstract: Provided are methods for etching films comprising transition metals. Certain methods involve activating a substrate surface comprising at least one transition metal, wherein activation of the substrate surface comprises exposing the substrate surface to heat, a plasma, an oxidizing environment, or a halide transfer agent to provide an activated substrate surface; and exposing the activated substrate surface to a reagent comprising a Lewis base or pi acid to provide a vapor phase coordination complex comprising one or more atoms of the transition metal coordinated to one or more ligands from the reagent. Certain other methods provide selective etching from a multi-layer substrate comprising two or more of a layer of Co, a layer of Cu and a layer of Ni.Type: ApplicationFiled: March 12, 2014Publication date: September 18, 2014Inventors: Jeffrey W. Anthis, Benjamin Schmiege, David Thompson
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Publication number: 20140264861Abstract: A method for fabricating one or more conductive lines in an integrated circuit includes providing a layer of copper containing conductive metal in a multi-layer structure fabricated upon a wafer, providing a first hard mask layer over the layer of copper containing conductive metal, performing a first sputter etch of first hard mask layer using a chlorine-based plasma or a sulfur fluoride-based plasma, and performing a second sputter etch of first hard mask layer using a second plasma, wherein a portion of the layer of copper containing conductive metal residing below a portion of the first hard mask layer that remains after the second sputter etch forms the one or more conductive lines. In one embodiment, the second plasma is a fluorocarbon-based plasma.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicants: Applied Materials, Incorporated, International Business Machines CorporationInventors: MARK D. HOINKIS, Eric A. Joseph, Hiroyuki Miyazoe, Chun Yan
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Patent number: 8828248Abstract: Write heads may be formed by reactive ion etching (RIE) a dielectric mask and then reactive ion etching a polymeric underlayer. The first RIE affects the second RIE. The first portion of the first RIE process is performed with a ratio of CF4 to CHF3 between about 1.3 to 2, a gas flow ratio of CF4 to He between 2.2 and about 3, and a ratio of RF source power to RF bias power between about 10 and about 16. The second portion of the first RIE process is performed with a ratio of CF4 to CHF3 between about 0.3 to 0.8, a gas flow ratio of CF4 to He between about 1.2 and about 1.8, and a ratio of RF source power to RF bias between about 22 to 28. With the above parameters, the dielectric mask can be formed with minimized damage on the underlayer.Type: GrantFiled: February 1, 2013Date of Patent: September 9, 2014Assignee: HGST Netherlands B.VInventors: Guomin Mao, Satyanarayana Myneni, Aron Pentek, Xiaoye Zhao
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Patent number: 8809198Abstract: A method for selectively removing nano-crystals on an insulating layer. The method includes providing an insulating layer with nano-crystals thereon; exposing the nano-crystals to a high density plasma comprising a source of free radical chlorine, ionic chlorine, or both to modify the nano-crystals; and removing the modified nano-crystals with a wet etchant.Type: GrantFiled: December 30, 2009Date of Patent: August 19, 2014Assignee: Micron Technology, Inc.Inventors: Ramakanth Alapati, Paul Morgan, Max Hineman
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Patent number: 8791001Abstract: The present disclosure provides a method for making a semiconductor device. The method includes forming a first material layer on substrate; forming a patterned photoresist layer on the first material layer; applying an etching process to the first material layer using the patterned photoresist layer as a mask; and applying a nitrogen-containing plasma to the substrate to remove the patterned photoresist layer.Type: GrantFiled: March 9, 2009Date of Patent: July 29, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu Chao Lin, Ryan Chia-Jen Chen, Yih-Ann Lin, Jr Jung Lin
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Patent number: 8790530Abstract: A method and manufacture for charge storage layer separation is provided. A layer, such as a polymer layer, is deposited on top of an ONO layer so that the polymer layer is planarized, or approximately planarized. The ONO includes at least a first region and a second region, where the first region is higher than the second region. For example, the first region may be the portion of the ONO that is over the source/drain region, and the second region may be the portion of the ONO that is over the shallow trench. Etching is performed on the polymer layer to expose the first region of the ONO layer, leaving the second region of the ONO unexposed. The etching continues to occur to etch the exposed ONO at the first region so that the ONO layer is etched away in the first region and the second region remains unexposed.Type: GrantFiled: February 10, 2010Date of Patent: July 29, 2014Assignee: Spansion LLCInventors: Angela T. Hui, Gang Xue
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Publication number: 20140206192Abstract: This present disclosure relates to an atomic layer etching method for graphene, including adsorbing reactive radicals onto a surface of the graphene and irradiating an energy source to the graphene on which the reactive radicals are adsorbed.Type: ApplicationFiled: January 22, 2014Publication date: July 24, 2014Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Geun Young YEOM, Woong Sun LIM, Kyung Seok MIN, Yi Yeon KIM, Jong Sik OH
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Patent number: 8786792Abstract: A mother substrate for a liquid crystal display device includes: a substrate; a plurality of unit array patterns on the substrate, each of the plurality of unit array patterns including a gate line, a data line crossing the gate line, a thin film transistor connected to the gate line and the data line and a pixel electrode connected to the thin film transistor; a first electrostatic discharge pattern surrounding the plurality of unit array patterns; a second electrostatic discharge pattern connected to the gate line and crossing the first electrostatic discharge pattern; and a third electrostatic discharge pattern connected to the data line and crossing the first electrostatic discharge pattern, the third electrostatic discharge pattern contacting the second electrostatic discharge pattern.Type: GrantFiled: December 9, 2009Date of Patent: July 22, 2014Assignee: LG Display Co., Ltd.Inventors: Jeong-yeop Lee, Jae-myung Seok, Jae-woo Jung, Young-seok Choi, Hyock-jae Shin
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Patent number: 8785331Abstract: The present invention discloses a method for replacing chlorine atoms on a film layer. More particularly, sufficient replacement ions for replacing the chlorine atoms are formed in a plasma process by reducing a volume ratio of a gas in a gas mixture (i.e. the film layer may be etched with the ions formed by dissociation of the gas) and dissociation of the gas mixture further decreases the etching reaction to the film layer in a process for replacing the chlorine atoms. In comparison to a conventional process by pure oxygen, the present invention can improve the prior art re-etching problem to avoid affecting an electric property of a thin film transistor, also has an advantage of manufacturing time reduction for an increased production yield.Type: GrantFiled: June 8, 2012Date of Patent: July 22, 2014Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventor: Yang-Ling Cheng
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Publication number: 20140199849Abstract: Methods of polysilicon over-etch using hydrogen diluted plasma for three-dimensional gate etch are described. In an example, a method of forming a three-dimensional gate structure includes performing a main plasma etch on a masked polysilicon layer formed over a semiconductor fin. The method also includes, subsequently, performing a plasma over etch on the masked polysilicon layer based on a plasma generated from gaseous composition including hydrogen gas (H2).Type: ApplicationFiled: January 15, 2014Publication date: July 17, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Radhika C. Mani, Nicolas Gani
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Patent number: 8778204Abstract: A method and apparatus for monitoring a target layer in a plasma process having a photoresist layer is provided. The method is useful in removing noise associated with the photoresist layer, and is particularly useful when signals associated with the target layer is weak, such as when detecting an endpoint for a photomask etching process.Type: GrantFiled: October 26, 2011Date of Patent: July 15, 2014Assignee: Applied Materials, Inc.Inventor: Michael N. Grimbergen
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Publication number: 20140179111Abstract: Methods of etching exposed titanium nitride with respect to other materials on patterned heterogeneous structures are described, and may include a remote plasma etch formed from a fluorine-containing precursor. Precursor combinations including plasma effluents from the remote plasma are flowed into a substrate processing region to etch the patterned structures with high titanium nitride selectivity under a variety of operating conditions. The methods may be used to remove titanium nitride at faster rates than a variety of metal, nitride, and oxide compounds.Type: ApplicationFiled: March 8, 2013Publication date: June 26, 2014Applicant: Applied Materials, Inc.Inventor: Applied Materials, Inc.
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Patent number: 8748323Abstract: A patterning method is provided. First, a substrate having an objective material layer thereon is provided. Thereafter, a mask layer is formed on the objective material layer. Afterwards, a patterned layer is formed over the mask layer, wherein a material of the patterned layer includes a metal-containing substance. Then, the mask layer is patterned to form a patterned mask layer. Further, the objective material layer is patterned, using the patterned mask layer as a mask.Type: GrantFiled: July 7, 2008Date of Patent: June 10, 2014Assignee: MACRONIX International Co., Ltd.Inventors: Han-Hui Hsu, Shih-Ping Hong, An-Chi Wei, Ming-Tsung Wu
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Patent number: 8747684Abstract: A method and apparatus for plasma etching a workpiece, such as a semiconductor wafer, including a thin film stack having a top film disposed over a bottom film with an intervening middle film there between. Etch selectivity between the top and bottom films may be as low as between 1:1 and 2:1 and a first carbon-lean gas chemistry is used to etch through the top film, a second carbon-lean gas chemistry is used to etch through the middle film, and the bottom film is etched through by alternating between depositing a polymer passivation on the top film using a carbon-rich gas chemistry and an etching of the bottom film with a third carbon-lean gas chemistry, which may be the same as the first carbon-lean gas chemistry.Type: GrantFiled: August 20, 2010Date of Patent: June 10, 2014Assignee: Applied Materials, Inc.Inventors: Sunil Srinivasan, Jinhan Choi, Anisul H. Khan
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Publication number: 20140154889Abstract: Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten. The plasma effluents react with exposed surfaces and selectively remove tungsten while very slowly removing other exposed materials. Sequential and simultaneous methods are included to remove thin tungsten oxide which may, for example, result from exposure to the atmosphere.Type: ApplicationFiled: March 15, 2013Publication date: June 5, 2014Applicant: Applied Materials, Inc.Inventors: Xikun Wang, Ching-Mei Hsu, Nitin K. Ingle, Zihui Li, Anchuan Wang
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Patent number: 8728946Abstract: The present invention provides, in a plasma etching method for plasma-etching a magnetic film, a plasma etching method that allows a desired etching depth to be obtained regardless of the opening size of a mask. The present invention is, in a plasma etching method for plasma-etching a magnetic film by using a tantalum film as a mask, characterized by including: a first process to plasma-etch the magnetic film to a desired depth by using a mixed gas of an ammonia gas and a helium gas; and a second process, after the first process, to plasma-etch the magnetic film etched to the prescribed depth by using a mixed gas of an ammonia gas and a gas containing the oxygen element or a mixed gas of an ammonia gas and a gas containing a hydroxyl group.Type: GrantFiled: February 15, 2013Date of Patent: May 20, 2014Assignee: Hitachi High-Technologies CorporationInventors: Takahiro Abe, Naohiro Yamamoto, Kentaro Yamada, Makoto Suyama, Daisuke Fujita
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Patent number: 8721903Abstract: A vacuum planarization method substantially improves the surface roughness of a thermally-assisted recording (TAR) disk that has a recording layer (RL) formed of a substantially chemically-ordered FePt alloy or FePt-X alloy (or CoPt alloy or CoPt-X alloy) and a segregant, like SiO2. A first amorphous carbon overcoat (OC1) is deposited on the RL and etched with a non-chemically reactive plasma to remove at least one-half the thickness of OC1. Then a second amorphous carbon overcoat (OC2) is deposited on the etched OC1. The OC2 is then reactive-ion-etched, for example in a H2/Ar plasma, to remove at least one-half the thickness of OC2. A thin third overcoat (OC3) may be deposited on the etched OC2.Type: GrantFiled: April 5, 2012Date of Patent: May 13, 2014Assignee: HGST Netherlands B.V.Inventors: Xiaoping Bian, Qing Dai, Oleksandr Mosendz, Franck Dreyfus Rose, Run-Han Wang
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Patent number: 8716142Abstract: Provided is a semiconductor device formed with a trench portion for providing a concave portion in a gate width direction and with a gate electrode provided within and on a top surface of the trench portion via a gate insulating film. At least a part of a surface of each of the source region and the drain region is made lower than other parts of the surface by removing a thick oxide film formed in the vicinity of the gate electrode. Making lower the part of the surface of each of the source region and the drain region allows current flowing through a top surface of the concave portion of the gate electrode at high concentration to flow uniformly through the entire trench portion, which increase an effective gate width of the concave portion formed so as to have a varying depth in a gate width direction.Type: GrantFiled: July 23, 2008Date of Patent: May 6, 2014Assignee: Seiko Instruments Inc.Inventor: Masayuki Hashitani
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Patent number: 8709919Abstract: A method is for the synthesis of an array of metal nanowires (w) capable of supporting localized plasmon resonances. A metal film (M) deposited on a planar substrate (D) is irradiated with a defocused beam of noble gas ions (IB) under high vacuum, so that, with increasing ion doses a corrugation is produced on the metal film surface, formed by a mutually parallel nanoscale self-organized corrugations (r). Subsequently, the height of the self-organized corrugations peaks is increased relative to the valleys (t) interposed therebetween. Then the whole the metal film is eroded so as to expose the substrate at the valleys, and to mutually disconnect the self-organized corrugations, thereby generating the array of metal nanowires. Finally, the transversal cross-section of the nanowires is reduced in a controlled manner so as to adjust the localized plasmon resonances wavelength which can be associated thereto. The nanowires array constitutes an electrode of an improved photonic device.Type: GrantFiled: March 6, 2009Date of Patent: April 29, 2014Assignee: Universita' Degli Studi di GenovaInventors: Francesco Buatier De Mongeot, Corrado Boragno, Ugo Valbusa, Daniele Chiappe, Andrea Toma
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Patent number: 8703619Abstract: A method of taper-etching a layer to be etched that is made of a dielectric material and has a top surface. The method includes the steps of: forming an etching mask with an opening on the top surface of the layer to be etched; and taper-etching a portion of the layer to be etched, the portion being exposed from the opening, by reactive ion etching so that a groove having two wall faces intersecting at a predetermined angle is formed in the layer to be etched. The step of taper-etching employs an etching gas containing a first gas contributing to the etching of the layer to be etched and a second gas contributing to the deposition of a sidewall protective film, and changes, during the step, the ratio of the flow rate of the second gas to the flow rate of the first gas so that the ratio increases.Type: GrantFiled: January 19, 2012Date of Patent: April 22, 2014Assignee: Headway Technologies, Inc.Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Shigeki Tanemura
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Patent number: 8679359Abstract: The present invention is directed to a method and apparatus for etching various metals that may be used in semiconductor or integrated circuit processing through the use of non-halogen gases such as hydrogen, helium, or combinations of hydrogen and helium with other gases such as argon. In one exemplary embodiment of the present invention, in a reaction chamber, a substrate having a metal interconnect layer deposited thereon is exposed to a plasma formed of non-halogen gas. The plasma generated is maintained for a certain period of time to provide for a desired or expected etching of the metal. In some embodiments, the metal interconnect layer may be copper, gold or silver.Type: GrantFiled: May 10, 2011Date of Patent: March 25, 2014Assignee: Georgia Tech Research CorporationInventors: Fangyu Wu, Dennis W. Hess, Galit Levitin
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Patent number: 8679984Abstract: An example embodiment relates to a method of manufacturing an array of electric devices that includes attaching a platform including a micro-channel structure to a substrate. The method includes injecting first and second solutions into the micro-channel structure to form at least three liquid film columns, where the first and second solutions include different solvent composition ratios and the liquid columns each, respectfully, include different solvent composition ratios. The method further includes detaching the platform the substrate, removing solvent from the liquid film columns to form thin film columns, and treating the thin film columns under different conditions along a length direction of the thin film columns. The solvent is removed from the thin film columns and the thin film columns are treated under different conditions along a length direction of the thin film columns.Type: GrantFiled: June 30, 2011Date of Patent: March 25, 2014Assignees: Samsung Electronics Co., Ltd., The United States of America as represented by the National Institutes of Health (NIH), The United States of America as represented by the Dept. of Health and Human Services (DHHS)Inventors: Jong Won Chung, Christopher J. Bettinger, Zhenan Bao, Do Hwan Kim, Bang Lin Lee, Jeong Il Park, Yong Wan Jin, Sang Yoon Lee
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Patent number: 8664124Abstract: A method of etching or removing an organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture to create a plasma of the mixture. The method further includes contacting the organic hardmask with the plasma, with the organic hardmask being at a temperature in excess of 200° C., to remove the organic hardmask without substantially harming the underlying substrate.Type: GrantFiled: February 13, 2012Date of Patent: March 4, 2014Assignee: Novellus Systems, Inc.Inventor: Wesley P. Graff