Metal Oxide Patents (Class 438/722)
  • Patent number: 5946569
    Abstract: A method of removing an etch-stop layer such as Si.sub.3 N.sub.4 from the vicinity of contact openings is described. A need for the removal of this material arises when the surface of the etch-stop layer is exposed during processing and the substrate is subjected to temperatures above 700.degree. C. Because of the high intrinsic interfacial stress residing in the Si.sub.3 N.sub.4, the thermal impact causes cracks in the layer which emanate from the corners of the contact openings and travel, with branching, over a considerable distance from the opening. These cracks are prone to moisture adsorption and contamination which can compromise the reliability and performance of contacts. In addition, where contact openings are formed through insulating layers having an intermediate etch-stop layer, protrusions of the etch-stop layer occur within the contact opening because of un-even etching.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: August 31, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Julie Huang
  • Patent number: 5888410
    Abstract: A dry etching method performing dry etching of a material containing zinc forms and patterns a resist on the material to be etched, and etches the material using an etching gas which is a mixed gas of methane gas and an inert gas. A dry etching method that dry etches a material containing zinc etches the material using an etching gas that consists only of methane gas, an inert gas, and hydrogen gas alone. Another dry etching method that dry etches a material containing zinc introduces an etching gas that contains methane gas, an inert gas, and hydrogen gas into a dry etching device, in which the flow rate of the hydrogen gas is set such that it is equal to or greater than the value at which the amount of dissociated hydrogen becomes saturated, and etches the material using the etching gas.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: March 30, 1999
    Assignee: Denso Corporation
    Inventors: Hajime Ishihara, Kazuhiro Inoguchi, Yutaka Hattori, Nobuei Ito, Tadashi Hattori
  • Patent number: 5888908
    Abstract: A method is provided for reducing the reflectivity of a metal layer prior to photolithography. A thin buffer layer, such as oxide, can be deposited over the metal layer. A short plasma etch is performed in order to roughen, but not completely remove, the thin oxide layer. This roughened layer significantly reduces the reflectivity of the underlying metal layer. As an alternative, the brief plasma etch can be applied directly to the metal layer, which results in a significant roughening of its upper surface. This also reduces the reflectivity of the metal layer.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: March 30, 1999
    Assignee: STMicroelectronics, Inc.
    Inventors: Gregory Joseph Stagaman, Michael Edward Haslam
  • Patent number: 5849207
    Abstract: A method for the plasma etching of a ferrodielectric perovskite oxide thin film such as PZT which comprises providing a resist pattern from on a perovskite oxide thin film as an etching mask, and subjecting the thin film to plasma etching using an etching gas which includes a compound having at least carboxyl group in the molecule, so that the carbonyl group formed by dissociation of the compound having at least carboxyl group in the molecule reacts with constituent metals of the perovskite oxide to efficiently form a reaction product in the form of a metal complex, enabling one to effect plasma etching at a practical etching rate while ensuring good anisotropic processing.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: December 15, 1998
    Assignee: Sony Corporation
    Inventor: Junichi Sato
  • Patent number: 5840200
    Abstract: A device insulating film, a lower-layer platinum film, a ferroelectric film, an upper-layer platinum film, and a titanium film are sequentially formed on a semiconductor substrate in this order. On the titanium film, a photoresist mask is further formed in a desired pattern. The thickness of the titanium film is adjusted to be 1/10 or more of the total thickness of a multilayer film consisting of the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film. The titanium film is then subjected to dry etching and the photoresist film is removed by ashing process. The titanium film thus patterned is used as a mask in etching the upper-layer platinum film, the ferroelectric film, and the lower-layer platinum film by a dry-etching method using a plasma of a gas mixture of chlorine and oxygen in which the volume concentration of oxygen gas is adjusted to be 40%. During the dry-etching process, the titanium film is oxidized to provide a high etching selectivity.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 24, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Satoshi Nakagawa, Toyoji Ito, Yoji Bito, Yoshihisa Nagano
  • Patent number: 5821133
    Abstract: A simplified method of manufacturing an active matrix substrate is disclosed. Gate wires, gate electrodes, gate insulating films, an etching stopper layer, semiconductor layers and contact layers are formed on an electrically insulating substrate. Pixel electrode material films, second electrical conductor films and second insulating films are formed successively on the substrate. The second insulating film and the second electrical conductor film are simultaneously patterned, so that source wires, source electrodes and drain electrodes are formed from the second electrical conductor film, and a protective film from the second insulating film. Then, the pixel electrode material film is patterned thereby to form pixel electrodes in a plurality of regions defined by the gate wires and the source wires.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: October 13, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuhiro Kawai, Mikio Katayama, Satoshi Yabuta, Masaru Kajitani
  • Patent number: 5773367
    Abstract: A method to planarize a partially completed semiconductor integrated device includes a first process to etch a first portion of a layer of photoresist on the device, a second process to etch the remaining layer of photoresist and to etch a first portion of an oxide on the device, and a third process to etch a second portion of the oxide layer on the device. The second process achieves an etch rate of approximately 5000 .ANG. per minute and the third process achieves an etch rate of approximately 2000 .ANG. per minute. The second process etches 80% of a targeted layer of oxide and the third process etches the remaining portion of the targeted layer of oxide.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: June 30, 1998
    Assignee: Integrated Device Technology, Inc.
    Inventor: Jang Jen
  • Patent number: 5707901
    Abstract: An etch stop layer prevents damage to the underlying semiconductor material or metallization layer during etching of a dielectric layer overlying the etch stop layer. The etch stop layer, aluminum nitride or aluminum oxide is used underlying silicon dioxide to prevent damage to the semiconductor material during a fluorocarbon based etch of the silicon dioxide. The etch stop layer is also used underlying a silicon dioxide layer and overlying a titanium nitride or titanium tungsten layer used in metallization to prevent etching of the titanium nitride or titanium tungsten layer during etching of the silicon dioxide.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: January 13, 1998
    Assignee: Motorola, Inc.
    Inventors: Jaeshin Cho, Naresh Saha
  • Patent number: 5705443
    Abstract: A plasma-assisted dry etching process for etching of a metal containing material layer on a substrate to remove the metal containing material from the substrate, comprising (i) plasma etching the metal containing material and, (ii) contemporaneously with said plasma etching, contacting the metal containing material with an etch enhancing reactant in a sufficient amount and at a sufficient rate to enhance the etching removal of the metal containing material, in relation to a corresponding plasma etching of the metal containing material layer on the substrate in the absence of the etch enhancing reactant metal material being contacted with the etch enhancing reactant.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: January 6, 1998
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Gregory Stauf, Robin A. Gardiner, Peter S. Kirlin, Peter C. Van Buskirk
  • Patent number: 5658820
    Abstract: A method for manufacturing ferroelectric thin-film which is used as a memory cell for an FRAM includes the steps of: (a) forming a lower electrode, a ferroelectric thin-film and an upper Pt electrode on a substrate in sequence; (b) forming a photoresist on the upper Pt electrode; (c) patterning the photoresist in a predetermined pattern; and (d) etching the substrate, the step (d) including the steps of installing a holder to which a predetermined DC self bias voltage is generated in a chamber of a plasma etching apparatus around which an RF coil is wound, of injecting Ar, chloric and fluoric gases of a predetermined composition ratio into the chamber, of applying a RF power of a predetermined frequency and power to the RF coil to generate an inductively coupled plasma in the chamber, and of etching down the substrate from the upper Pt electrode to the ferroelectric thin-film to a predetermined depth by the plasma of the Ar, chloric and fluoric gases using the photoresist as a mask.
    Type: Grant
    Filed: March 19, 1996
    Date of Patent: August 19, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chee-won Chung
  • Patent number: 5624583
    Abstract: A method of manufacturing a semiconductor device containing a ruthenium oxide includes the step of dry-etching the ruthenium oxide using a gas mixture containing oxygen or ozone gas and at least one material selected from the group consisting of fluorine gas, chlorine gas, bromine gas, iodine gas, a halogen gas containing at least one of the fluorine, chlorine, bromine, and iodine gases, and a hydrogen halide.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: April 29, 1997
    Assignee: NEC Corporation
    Inventors: Ken Tokashiki, Kiyoyuki Sato