Using Specified Electrode/susceptor Configuration (e.g., Of Multiple Substrates Using Barrel-type Susceptor, Planar Reactor Configuration, Etc.) To Generate Plasma Patents (Class 438/729)
-
Patent number: 8129283Abstract: The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.Type: GrantFiled: February 13, 2008Date of Patent: March 6, 2012Assignee: Hitachi High-Technologies CorporationInventors: Masahito Mori, Naoyuki Kofuji, Naoshi Itabashi
-
Patent number: 8124539Abstract: A plasma processing apparatus having a focus ring, enables the efficiency of cooling of the focus ring to be greatly improved, while preventing an increase in cost thereof. The plasma processing apparatus is comprised of a susceptor which has an electrostatic chuck and the focus ring. A wafer W to be subjected to plasma processing is mounted on the electrostatic chuck. The focus ring has a dielectric material portion and a conductive material portion. The dielectric material portion forms a contact portion disposed in contact with the electrostatic chuck. The conductive material portion faces the electrostatic chuck with the dielectric material portion therebetween.Type: GrantFiled: August 4, 2010Date of Patent: February 28, 2012Assignee: Tokyo Electron LimitedInventors: Shosuke Endoh, Noriyuki Iwabuchi, Shigeaki Kato, Tomoya Okubo, Jun Hirose, Koichi Nagakura, Chishio Koshimizu, Kazuki Denpoh
-
Patent number: 8119532Abstract: A dual zone plasma processing chamber is provided. The plasma processing chamber includes a first substrate support having a first support surface adapted to support a first substrate within the processing chamber and a second substrate support having a second support surface adapted to support a second substrate within the processing chamber. One or more gas sources in fluid communication with one or more gas distribution members supply process gas to a first zone adjacent to the first substrate support and a second zone adjacent to the second substrate support. A radio-frequency (RF) antenna adapted to inductively couple RF energy into the interior of the processing chamber and energize the process gas into a plasma state in the first and second zones. The antenna is located between the first substrate support and the second substrate support.Type: GrantFiled: May 26, 2011Date of Patent: February 21, 2012Assignee: Lam Research CorporationInventor: Sanket P. Sant
-
Patent number: 8110435Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed, which is capable of realizing an extension of a cleaning cycle for a processing chamber, the method comprising preheating a substrate; placing the preheated substrate onto a substrate-supporting unit provided in a susceptor while the preheated substrate is maintained at a predetermined height from an upper surface of the susceptor provided in a processing chamber; and forming a thin film on the preheated substrate, wherein a temperature of the preheated substrate is higher than a processing temperature for forming the thin film in the processing chamber.Type: GrantFiled: December 10, 2009Date of Patent: February 7, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Sang Ki Park, Seong Ryong Hwang, Geun Tae Cho
-
Patent number: 8105953Abstract: A semiconductor manufacturing apparatus includes a chamber, a gas supplier, a vacuum pump, an electrode, a conductive knitted wire mesh and a radio frequency power supply. The electrode is placed outside of the chamber and fixed to the chamber. The gas supplier supplies gas into the chamber. The vacuum pump exhausts the chamber. The radio frequency power supply supplies radio frequency power to the electrode through the conductive knitted wire mesh.Type: GrantFiled: July 26, 2011Date of Patent: January 31, 2012Assignee: Renesas Electronics CorporationInventor: Keiichirou Takehara
-
Patent number: 8043971Abstract: [Problem to be Solved] In a plasma processing apparatus for executing a process using plasma, promoting the sharing of an apparatus in executing a plurality of different processes and plasma states amongst apparatuses in executing same processes in a plurality of apparatuses are provided. [Solution] A ring member formed of an insulating material is disposed to surround a to-be-treated substrate in a processing vessel and an electrode is installed in the ring member for adjusting a plasma sheath region. For example, a first DC voltage is applied to the electrode when a first process is performed on the to-be-treated substrate and a second DC voltage is applied to the electrode when a second process is performed on the to-be-treated substrate. In this case, the plasma state can be matched by applying an appropriate DC voltage according to each process or each apparatus executing the same process. Therefore, the sharing of an apparatus can be promoted and the plasma state can be readily adjusted.Type: GrantFiled: December 19, 2008Date of Patent: October 25, 2011Assignee: Tokyo Electron LimitedInventors: Yasuharu Sasaki, Tsuyoshi Moriya, Hiroshi Nagaike
-
Publication number: 20110165779Abstract: Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.Type: ApplicationFiled: March 14, 2011Publication date: July 7, 2011Inventors: Gregory S. Sexton, Andrew D. Bailey, III, Alan M. Schoepp, John D. Boniface
-
Patent number: 7943523Abstract: A plasma etching method for plasma-etching an anti-reflective coating formed on a target object includes the step of placing the target object into a processing chamber having a first electrode and a second electrode provided while facing each other, the target object including an etching target film, the anti-reflective coating and a patterned photoresist film sequentially formed in that order on a substrate. The plasma etching method further includes the steps of introducing a processing gas into the processing chamber; generating a plasma by applying a high frequency power to one of the first electrode and the second electrode; and applying a DC voltage to one of the first electrode and the second electrode.Type: GrantFiled: February 22, 2007Date of Patent: May 17, 2011Assignee: Tokyo Electron LimitedInventors: Shin Hirotsu, Wakako Naito, Yoshinori Suzuki
-
Patent number: 7943524Abstract: Silicon oxide film having, as a sublayer, a silicon nitride film layer serving as a protective film layer for 5 gate formed on silicon substrate is etched by introducing a processing gas including a gaseous mixture containing at least C4F6, Ar, O2 and N2 into an airtight processing chamber and carrying out a plasma treatment in a self-alignment contact process, thereby forming contact hole. For the 10 processing gas, e.g., the ratio of N2 gas flow rate to C4F6 gas flow rate ranges from 25/8 to 85/8, the ratio of O2 and N2 gas flow rate to C4F6 gas flow rate ranges from 15/4 to 45/4 and the ratio of N2 gas flow rate to O2 gas flow rate ranges from 5 to 17. Accordingly, stable contact holes of 15 high aspect ratio exhibiting desirable control characteristics is formed while minimizing etching the silicon nitride film, a protective film layer for gate.Type: GrantFiled: July 20, 2007Date of Patent: May 17, 2011Assignee: Tokyo Electrons LimitedInventors: Noriyuki Kobayashi, Kenji Adachi
-
Publication number: 20110104884Abstract: A hot edge ring with extended lifetime comprises an annular body having a sloped upper surface. The hot edge ring includes a step underlying an outer edge of a semiconductor substrate supported in a plasma processing chamber wherein plasma is used to process the substrate. The step includes a vertical surface which surrounds the outer edge of the substrate and the sloped upper surface extends upwardly and outwardly from the upper periphery of the vertical surface.Type: ApplicationFiled: November 2, 2010Publication date: May 5, 2011Applicant: Lam Research CorporationInventors: Akira Koshiishi, Sathya Mani, Gautam Bhattacharyya, Gregory R. Bettencourt, Sandy Chao
-
Patent number: 7915062Abstract: A TFT array substrate includes a TFT having an ohmic contact film and a source electrode and a drain electrode formed on the ohmic contact film. It also includes a pixel electrode electrically connected with the drain electrode. The source electrode and the drain electrode are made of an Al alloy containing Ni as an additive.Type: GrantFiled: June 13, 2007Date of Patent: March 29, 2011Assignee: Mitsubishi Electric CorporationInventors: Shinichi Yano, Tadaki Nakahori, Nobuaki Ishiga
-
Patent number: 7858155Abstract: It is intended to provide a plasma processing method and apparatus capable of increasing the uniformity of amorphyzation processing. A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 through a gas inlet 11 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus through an exhaust hole 12. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power of 13.56 MHz is supplied from a high-frequency power source 5 to a coil 8 disposed close to a dielectric window 7 which is opposed to a sample electrode 6, whereby induction-coupled plasma is generated in the vacuum container 1. A high-frequency power source 10 for supplying high-frequency electric power to the sample electrode 6 is provided and functions as a voltage source for controlling the potential of the sample electrode 6.Type: GrantFiled: October 27, 2005Date of Patent: December 28, 2010Assignee: Panasonic CorporationInventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Cheng-Guo Jin, Satoshi Maeshima, Hiroyuki Ito, Ichiro Nakayama, Bunji Mizuno
-
Patent number: 7829463Abstract: A plasma processing method performs a desired plasma process on substrates by using a plasma generated in a processing space. A first and a second electrode are disposed in parallel in a processing vessel that is grounded, the substrate is supported on the second electrode to face the first electrode, the processing vessel is vacuum evacuated, a desired processing gas is supplied into the processing space formed between the first electrode, the second electrode and a sidewall of the processing vessel, and a first radio frequency power is supplied to the second electrode. The first electrode is connected to the processing vessel via an insulator or a space, and is electrically coupled to a ground potential via a capacitance varying unit whose electrostatic capacitance is varied based on a process condition of the plasma process performed on the substrate.Type: GrantFiled: March 30, 2007Date of Patent: November 9, 2010Assignee: Tokyo Electron LimitedInventors: Naoki Matsumoto, Chishio Koshimizu, Manabu Iwata, Satoshi Tanaka
-
Publication number: 20100216313Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.Type: ApplicationFiled: October 9, 2008Publication date: August 26, 2010Applicant: Panasonic CorproationInventor: Tetsuhiro Iwai
-
Publication number: 20100210114Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.Type: ApplicationFiled: February 17, 2010Publication date: August 19, 2010Applicant: TOKYO ELECTRON LIMITEDInventor: Yoshinobu OOYA
-
Patent number: 7772123Abstract: A structure and method of forming through substrate vias in forming semiconductor components are described. In one embodiment, the invention describes a method of forming the through substrate via by filling an opening with a first fill material and depositing a first insulating layer over the first fill material, the first insulating layer not being deposited on sidewalls of the fill material in the opening, wherein sidewalls of the first insulating layer form a gap over the opening. The method further includes forming a void by sealing the opening using a second insulating layer.Type: GrantFiled: June 6, 2008Date of Patent: August 10, 2010Assignee: Infineon Technologies AGInventors: Albert Birner, Uwe Hoeckele, Thomas Kunstmann, Uwe Seidel
-
Patent number: 7763863Abstract: An apparatus capable of improving image quality by making it possible to suck specimens of different sizes electrostatically, and uniformalizing an electric field of a specimen edge portion, while suppressing increase in prime cost is provided. Specimen holding means is an electrostatic chuck, a master flat plane part surrounding a specimen of the largest size of specimen sizes, and an opening surrounding a specimen size except for the largest specimen size are included at an outer peripheral portion of the electrostatic chuck, a dummy specimen attachable to and detachable from the electrostatic chuck is included, and at a time of switching the specimen size, a dummy specimen is selected (or may be prevented from being used).Type: GrantFiled: June 11, 2008Date of Patent: July 27, 2010Assignee: Hitachi High-Technologies CorporationInventors: Masaki Mizuochi, Shoji Tomida
-
Patent number: 7758762Abstract: An electron-emitting device comprises a pair of electrodes and an electroconductive film arranged between the electrodes and including an electron-emitting region carrying a graphite film. The graphite film shows, in a Raman spectroscopic analysis using a laser light source with a wavelength of 514.5 nm and a spot diameter of 1 ?m, peaks of scattered light, of which 1) a peak (P2) located in the vicinity of 1,580 cm?1 is greater than a peak (P1) located in the vicinity of 1,335 cm?1 or 2) the half-width of a peak (P1) located in the vicinity of 1,335 cm?1 is not greater than 150 cm?1.Type: GrantFiled: June 19, 2007Date of Patent: July 20, 2010Assignee: Canon Kabushiki KaishaInventors: Fumio Kishi, Masato Yamanobe, Takeo Tsukamoto, Toshikazu Ohnishi, Keisuke Yamamoto, Sotomitsu Ikeda, Yasuhiro Hamamoto, Kazuya Miyazaki
-
Patent number: 7759214Abstract: Provided is a semiconductor device and method of making, incorporating a trench having rounded edges. According to an embodiment, a pad oxide layer, nitride layer, and TEOS layer are sequentially formed on a substrate. The TEOS layer, nitride layer, and pad oxide layer are dry-etched using a photosensitive layer pattern as a mask. After removing the photosensitive layer pattern, a trench is formed by dry-etching the substrate using the etched TEOS layer, nitride layer, and pad oxide layer as a mask. A portion of the pad oxide layer is pullback-etched, resulting in a first rounding of the trench. A portion of the etched nitride layer is pullback-etched and a portion of the etched TEOS layer is pullback-etched. The upper corner of the trench of the substrate is dry-etched using the pullback-etched TEOS layer, nitride layer, and pad oxide layer as a mask, resulting in a second rounding of the trench.Type: GrantFiled: August 17, 2006Date of Patent: July 20, 2010Assignee: Dongbu Electronics Co., Ltd.Inventor: Suh Byoung Yoon
-
Patent number: 7759249Abstract: A method of using a post-etch treatment system for removing photoresist and etch residue formed during an etching process is described. For example, the etch residue can include halogen containing material. The post-etch treatment system comprises a vacuum chamber, a radical generation system coupled to the vacuum chamber, a radical gas distribution system coupled to the radical generation system and configured to distribute reactive radicals above a substrate, and a high temperature pedestal coupled to the vacuum chamber and configured to support the substrate. The method comprises introducing a NxOy based process gas to the radical generation system.Type: GrantFiled: March 28, 2006Date of Patent: July 20, 2010Assignee: Tokyo Electron LimitedInventor: Vaidyanathan Balasubramaniam
-
Patent number: 7754615Abstract: A method and apparatus for detecting the endpoint in a dry plasma etching system comprising a first electrode (e.g., upper electrode) and a second electrode (e.g., lower electrode) upon which a substrate rests is described. A direct current (DC) voltage is applied between the first electrode and a ring electrode surrounding the second electrode, and the DC current is monitored to determine the endpoint of the etching process. The DC current is affected by the impedance of the plasma, and therefore responds to many variations including, for example, the plasma density, electron/ion flux to exposed surfaces, the electron temperature, etc.Type: GrantFiled: July 31, 2006Date of Patent: July 13, 2010Assignees: Tokyo Electron Limited, International Business Machines Corporation (“IBM ”)Inventors: Siddhartha Panda, Richard Wise, Lee Chen, Michael Sievers
-
Publication number: 20100124822Abstract: A plasma processing chamber includes a cantilever assembly configured to neutralize atmospheric load. The chamber includes a wall surrounding an interior region and having an opening formed therein. A cantilever assembly includes a substrate support for supporting a substrate within the chamber. The cantilever assembly extends through the opening such that a portion is located outside the chamber. The chamber includes an actuation mechanism operative to move the cantilever assembly relative to the wall.Type: ApplicationFiled: January 25, 2010Publication date: May 20, 2010Applicant: Lam Research CorporationInventors: Rajinder Dhindsa, Eric H. Lenz, Andy W. DeSepte, Lumin Li
-
Patent number: 7678705Abstract: An apparatus to perform semiconductor processing includes a process chamber; a plasma generator for generating a plasma in the process chamber; and a helical ribbon electrode coupled to the output of the plasma generator.Type: GrantFiled: July 5, 2001Date of Patent: March 16, 2010Assignee: Tegal CorporationInventors: Tue Nguyen, Tai Dung Nguyen
-
Patent number: 7655565Abstract: A method and apparatus for electroprocessing a substrate is provided. In one embodiment, a method for electroprocessing a substrate includes the steps of biasing a first electrode to establish a first electroprocessing zone between the electrode and the substrate, and biasing a second electrode disposed radially outward of substrate with a polarity opposite the bias applied tot he first electrode.Type: GrantFiled: January 26, 2005Date of Patent: February 2, 2010Assignee: Applied Materials, Inc.Inventors: Antoine P. Manens, Vladimir Galburt, Yan Wang, Alain Duboust, Donald J. K. Olgado, Liang-Yuh Chen
-
Patent number: 7618515Abstract: In a plasma etching apparatus for performing a plasma etching on a surface of a substrate mounted on a susceptor in a processing vessel, a focus ring is installed to surround the substrate and has a first region at an inner side on a surface thereof, in which an average surface roughness is small such that a reaction product produced during an etching processing is not captured to be deposited, and a second region at an outer side from the first region, in which an average surface roughness is large such that a reaction product produced during the etching process is captured to be deposited. A boundary between the first and the second region is a part where an etching amount is relatively significantly changed compared to other parts while the focus ring is equipped in the plasma etching apparatus and the plasma etching is performed on the substrate.Type: GrantFiled: November 10, 2005Date of Patent: November 17, 2009Assignee: Tokyo Electron LimitedInventors: Daiki Satoh, Hideyuki Kobayashi, Masato Horiguchi
-
Publication number: 20090275207Abstract: A plasma etching method includes disposing first electrode and second electrodes; preparing a part in a processing chamber; supporting a substrate by the second electrode to face the first electrode; vacuum-evacuating the processing chamber; supplying a first processing gas containing an etchant gas into a processing space between the first electrode and the second electrode; generating a plasma of the first processing gas in the processing space by applying a radio frequency power to the first electrode or the second electrode; and etching a film on the substrate by using the plasma. Further, a resist modification process includes vacuum-evacuating the processing chamber; supplying a second processing gas into the processing space; generating a plasma; and applying a negative DC voltage to the part, the part being disposed away from the substrate in the processing chamber and injecting electrons discharged from the part into the resist pattern on the substrate.Type: ApplicationFiled: March 31, 2009Publication date: November 5, 2009Applicant: Tokyo Electron LimitedInventors: Masanobu HONDA, Michiko NAKAYA
-
Patent number: 7608544Abstract: An etching method which makes it possible to obtain a desired etching shape with ease, and a computer-readable storage medium storing a program for implementing the method. The etching method is executed by a substrate processing apparatus that performs plasma processing on a semiconductor wafer by plasma. The apparatus comprises a substrate accommodating chamber for accommodating the semiconductor wafer which has an oxide film and a resist film formed on the oxide film, and an upper electrode plate disposed in the substrate accommodating chamber and exposed in a processing space in the substrate accommodating chamber. At least part of the upper electrode plate is formed of a silicon-containing material. The upper electrode plate is sputtered by plasma, and the oxide film is etched by plasma.Type: GrantFiled: May 24, 2007Date of Patent: October 27, 2009Assignee: Tokyo Electron LimitedInventor: Akitoshi Harada
-
Publication number: 20090242516Abstract: A plasma etching method includes disposing a first electrode and a second electrode to face each other; preparing a part in the processing chamber; supporting a substrate; vacuum-evacuating the processing chamber; supplying an etching gas into a processing space between the first electrode and the second electrode; generating a plasma of the etching gas in the processing space by applying a radio wave power to the first electrode or the second electrode; and etching a film to be processed on a surface of the substrate by using the plasma. Further, a DC voltage is applied to the part during the etching process, the part being disposed away from the substrate and being etched by reaction with reactant species in the plasma.Type: ApplicationFiled: March 30, 2009Publication date: October 1, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Masanobu Honda, Hiroyuki Nakayama, Manabu Sato
-
Publication number: 20090221151Abstract: The present invention provides an upper electrode used in an etching apparatus and the etching apparatus including the upper electrode, both of which can properly reduce intensity of electric field of plasma around a central portion of a substrate to be processed, thus enhancing in-plane uniformity of a plasma process. In this apparatus, a recess, serving as a space for allowing a dielectric to be injected therein, is provided around a central portion of the upper electrode. A dielectric supply passage configured for supplying the dielectric into the space and a dielectric discharge passage configured for discharging the dielectric from the space are connected with the space, respectively.Type: ApplicationFiled: February 11, 2009Publication date: September 3, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Masanobu Honda, Shinji Himori
-
Patent number: 7557049Abstract: A producing method of a wired circuit board includes the step of preparing a wired circuit board including an insulating layer and a conductive pattern having a wire covered with the insulating layer and a terminal portion exposed from the insulating layer; and the step of forming a semiconductive layer on a surface of the insulating layer by dipping the wired circuit board in a polymeric liquid of a conductive polymer in which an electrode is provided, and applying a voltage so that the electrode becomes an anode and the conductive pattern becomes a cathode.Type: GrantFiled: October 23, 2007Date of Patent: July 7, 2009Assignee: Nitto Denko CorporationInventors: Jun Ishii, Yasunari Ooyabu, Hiroyuki Kurai
-
Publication number: 20090163034Abstract: A showerhead electrode for a plasma processing apparatus includes an elastomeric sheet adhesive bond between mating surfaces of an electrode and a backing member to accommodate stresses generated during temperature cycling due to mismatch in coefficients of thermal expansion. The elastomeric sheet comprises a thermally conductive silicone adhesive able to withstand a high shear strain of ?300% in a temperature range of room temperature to 300° C. such as heat curable high molecular weight dimethyl silicone with fillers. The sheet form adhesive has bond thickness control for parallelism of bonded surfaces over large areas. The sheet adhesive may be cast or die cut into pre-form shapes that can conform to irregularly shaped features, maximize surface contact area with mating electrode surfaces, and installed into cavities of the mating assembly. Installation can be manually, manually with installation tooling, or with automated machinery.Type: ApplicationFiled: December 17, 2008Publication date: June 25, 2009Applicant: Lam Research CorporationInventors: DEAN JAY LARSON, Tom Stevenson, Victor Wang
-
Patent number: 7541292Abstract: A plasma etch process for etching high aspect ratio openings in a dielectric film on a workpiece is carried out in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a first polymerizing etch process gas through a radially inward one of plural concentric gas injection zones in the ceiling electrode and injecting a second polymerizing etch process gas through a radially outward one of the plural concentric gas injection zones in the ceiling electrode, the compositions of the first and second process gases having first and second carbon-to-fluorine ratios that differ from one another.Type: GrantFiled: April 28, 2006Date of Patent: June 2, 2009Assignee: Applied Materials, Inc.Inventors: Kallol Bera, Xiaoye Zhao, Kenny L. Doan, Ezra Robert Gold, Paul Lukas Brillhart, Bruno Geoffrion, Bryan Pu, Daniel J. Hoffman
-
Patent number: 7517803Abstract: Silicon parts of a semiconductor processing apparatus containing low levels of metal impurities that are highly mobile in silicon are provided. The silicon parts include, for example, rings, electrodes and electrode assemblies. The silicon parts can reduce metal contamination of wafers processed in plasma atmospheres.Type: GrantFiled: September 28, 2004Date of Patent: April 14, 2009Assignee: Lam Research CorporationInventors: Daxing Ren, Jerome S. Hubacek, Nicholas E. Webb
-
Publication number: 20090081878Abstract: A temperature control module for a showerhead electrode assembly for a semiconductor material plasma processing chamber includes a heater plate adapted to be secured to a top surface of a top electrode of the showerhead electrode assembly, and which supplies heat to the top electrode to control the temperature of the top electrode; a cooling plate adapted to be secured to and thermally isolated from a surface of a top plate of the showerhead electrode assembly, and to cool the heater plate and control heat conduction between the top electrode and heater plate; and at least one thermal choke adapted to control heat conduction between the heater plate and cooling plate.Type: ApplicationFiled: September 24, 2008Publication date: March 26, 2009Applicant: Lam Research CorporationInventor: Rajinder Dhindsa
-
Publication number: 20090047795Abstract: A plasma processing apparatus includes a first radio frequency (RF) power supply unit for applying a first RF power for generating a plasma from a processing gas to at least one of a first and a second electrode which are disposed facing each other in an evacuable processing chamber. The first RF power supply unit is controlled by a control unit so that a first phase at which the first RF power has a first amplitude for generating a plasma and a second phase at which the first RF power has a second amplitude for generating substantially no plasma are alternately repeated at predetermined intervals.Type: ApplicationFiled: August 15, 2008Publication date: February 19, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Tatsuo MATSUDO, Shinji Himori, Noriaki Imai, Takeshi Ohse, Jun Abe, Takayuki Katsunuma
-
Patent number: 7485580Abstract: A process for removing organic electroluminescent residues from a substrate is described herein. The process includes the steps of providing a process gas comprising a fluorine-containing gas, optionally an oxygen-containing gas, and optionally an additive gas; activating the process gas in a remote chamber using at least one energy source to provide reactive species; and contacting the surface of the substrate with the reactive species to volatilize and remove the organic electroluminescent residue from the surface.Type: GrantFiled: September 12, 2006Date of Patent: February 3, 2009Assignee: Air Products and Chemicals, Inc.Inventors: Andrew David Johnson, Peter James Maroulis, Mark Ian Sistern, Martin Jay Plishka, Steven Arthur Rogers, John Bartram Dickenson
-
Patent number: 7479457Abstract: Atomic oxygen generated in oxygen stripping plasmas reacts with and damages low-k dielectric materials during stripping of dielectric post etch residues. While damage of low-k dielectric materials during stripping of dielectric post etch residues is lower with hydrogen stripping plasmas, hydrogen stripping plasmas exhibit lower strip rates. Inclusion of oxygen in a hydrogen stripping plasma improves both photoresist strip rate and uniformity, while maintaining a hydrogen to oxygen ratio avoids low-k dielectric material damage.Type: GrantFiled: September 8, 2005Date of Patent: January 20, 2009Assignee: Lam Research CorporationInventors: Cristian Paduraru, Alan Jensen, David Schaefer, Robert Charatan, Tom Choi
-
Publication number: 20090017635Abstract: The present invention comprises an apparatus and method for etching at a substrate edge region. In one embodiment, the apparatus comprises a chamber having a process volume, a substrate support arranged inside the process volume and having a substrate support surface, a plasma generator coupled to the chamber and configured to supply an etching agent in a plasma phase to a peripheral region of the substrate support surface, and a gas delivery assembly coupled to a gas source for generating a radial gas flow over the substrate support surface from an approximately central region of the substrate support surface toward the peripheral region of the substrate support surface.Type: ApplicationFiled: July 11, 2008Publication date: January 15, 2009Inventors: Ashish Shah, Ganesh Balasubramanian, Dale R. Du Bois, Mark A. Fodor, Eui Kyoon Kim, Chiu Chan, Karthik Janakiraman, Thomas Nowak, Joseph C. Werner, Visweswaren Sivaramakrishnan, Mohamad Ayoub, Amir Al-Bayati, Jianhua Zhou
-
Patent number: 7473646Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.Type: GrantFiled: August 26, 2004Date of Patent: January 6, 2009Assignees: Sony CorporationInventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
-
Publication number: 20090004873Abstract: A dielectric etch chamber and method for improved control of plasma parameters. The plasma chamber comprises dual-frequency bias source that capacitively couples the RF energy to the plasma, and a single or dual frequency source that inductively couples the RF energy to the plasma. The inductive source may be modulated for improved etch uniformity.Type: ApplicationFiled: June 26, 2007Publication date: January 1, 2009Applicant: INTEVAC, INC.Inventors: Jang Gyoo Yang, Michael Barnes, Terry Bluck
-
Publication number: 20080318433Abstract: Plasma confinement ring assemblies are provided that include confinement rings adapted to reach sufficiently high temperatures on plasma-exposed surfaces of the rings to avoid polymer deposition on those surfaces. The plasma confinement rings include thermal chokes adapted to localize heating at selected portions of the rings that include the plasma exposed surfaces. The thermal chokes reduce heat conduction from those portions to other portions of the rings, which causes selected portions of the rings to reach desired temperatures during plasma processing.Type: ApplicationFiled: August 26, 2008Publication date: December 25, 2008Applicant: Lam Research CorporationInventors: Rajinder Dhindsa, Felix Kozakevich, James H. Rogers, David Trussell
-
Publication number: 20080318432Abstract: A reactor for processing semiconductor wafers with electrodes and other surfaces that can be one of heated, textured and/or pre-coated in order to facilitate adherence of materials deposited thereon, and eliminate the disadvantages resulting from the spaulding, flaking and/or delaminating of such materials which can interfere with semiconductor wafer processing.Type: ApplicationFiled: September 2, 2008Publication date: December 25, 2008Applicant: TEGAL CORPORATIONInventors: Stephen P. DeOrnellas, Leslie G. Jerde, Kurt A. Olson
-
Patent number: 7442650Abstract: A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency.Type: GrantFiled: January 10, 2007Date of Patent: October 28, 2008Assignee: International Business Machines CorporationInventors: Peter Biolsi, Samuel S Choi, Kevin Mackey
-
Patent number: 7422982Abstract: A method and apparatus for electroprocessing a substrate is provided. In one embodiment, a method for electroprocessing a substrate includes the steps of biasing a first electrode to establish a first electroprocessing zone between the electrode and the substrate, and biasing a second electrode disposed radially inward of the first electrode with a bias that is different than the bias applied to the first electrode. In one embodiment, the first electrode is coated with an inert material and in this way the same polish rate is obtained with a lower potential level applied to the first electrode.Type: GrantFiled: July 7, 2006Date of Patent: September 9, 2008Assignee: Applied Materials, Inc.Inventors: You Wang, Jie Diao, Stan D. Tsai, Lakshmanan Karuppiah
-
Patent number: 7413673Abstract: An apparatus and method for adjusting the voltage applied to a Faraday shield of an inductively coupled plasma etching apparatus is provided. An appropriate voltage is easily and variably applied to a Faraday shield such that sputtering of a plasma can be controlled to prevent and mitigate deposition of non-volatile reaction products that adversely affect an etching process. The appropriate voltage for a particular etching process or step is applied to the Faraday shield by simply adjusting a tuning capacitor. It is not necessary to mechanically reconfigure the etching apparatus to adjust the Faraday shield voltage.Type: GrantFiled: April 19, 2005Date of Patent: August 19, 2008Assignee: Lam Research CorporationInventors: Shrikant P. Lohokare, Andras Kuthi, Andrew D. Bailey, III
-
Publication number: 20080182416Abstract: A method is provided for processing a workpiece in a plasma reactor chamber having electrodes including at least a ceiling electrode and a workpiece support electrode. The method includes coupling respective RF power sources of respective VHF frequencies f1 and f2 to either (a) respective ones of the electrodes or (b) a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. The method further includes adjusting a ratio of an RF parameter at the f1 frequency to the RF parameter at the f2 frequency so as to control plasma ion density distribution, the RF parameter being any one of RF power, RF voltage or RF current.Type: ApplicationFiled: April 11, 2007Publication date: July 31, 2008Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
-
Publication number: 20080182418Abstract: A method of processing a workpiece in a plasma reactor chamber includes coupling RF power via an electrode to plasma in the chamber, the RF power being of a variable frequency in a frequency range that includes a fundamental frequency f. The method also includes coupling the electrode to a resonator having a resonant VHF frequency F which is a harmonic of the fundamental frequency f, so as to produce VHF power at the harmonic. The method controls the ratio of power near the fundamental f to power at harmonic F, by controlling the proportion of power from the generator that is up-converted from f to F, so as to control plasma ion density distribution.Type: ApplicationFiled: April 11, 2007Publication date: July 31, 2008Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
-
Publication number: 20080182417Abstract: In a plasma reactor chamber a ceiling electrode and a workpiece support electrode, respective RF power sources of respective VHF frequencies f1 and f2 are coupled to either respective ones of the electrodes or to a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. Respective center ground return paths are provided for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequencies f1 and f2, and an edge ground return path is provided for each of the frequencies f1 and f2. The impedance of at least one of the ground return paths is adjusted so as to control the uniformity of the plasma ion density distribution.Type: ApplicationFiled: April 11, 2007Publication date: July 31, 2008Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Douglas A. Buchberger, Shahid Rauf, Kallol Bera, Lawrence Wong, Walter R. Merry, Matthew L. Miller, Steven C. Shannon, Andrew Nguyen, James P. Cruse, James Carducci, Troy S. Detrick, Subhash Deshmukh, Jennifer Y. Sun
-
Publication number: 20080171444Abstract: A plasma processing chamber includes a cantilever assembly configured to neutralize atmospheric load. The chamber includes a wall surrounding an interior region and having an opening formed therein. A cantilever assembly includes a substrate support for supporting a substrate within the chamber. The cantilever assembly extends through the opening such that a portion is located outside the chamber. The chamber includes an actuation mechanism operative to move the cantilever assembly relative to the wall.Type: ApplicationFiled: January 17, 2007Publication date: July 17, 2008Applicant: Lam Research CorporationInventors: Rajinder Dhindsa, Eric H. Lenz, Andy W. DeSepte, Lumin Li
-
Patent number: 7384873Abstract: A method of manufacturing a semiconductor device, includes: forming a resin layer with a resin containing an aromatic compound on a surface, where an electrode is formed, of a semiconductor substrate, by avoiding at least part of the electrode; removing an oxide film from a surface of the electrode using Ar gas and carbonizing the surface of the resin layer to form a carbonized layer; forming wiring from the electrode to over the carbonized layer; and etching, after forming the wiring, the carbonized layer by O2 plasma using the wiring as a mask so as to remove the carbonized layer partially.Type: GrantFiled: April 12, 2006Date of Patent: June 10, 2008Assignee: Seiko Epson CorporationInventor: Kazunari Nagata