Abstract: Method for fabricating a solid state image sensor, which can improve a charge transfer efficiency of an end terminal, including the steps of (1) providing a first conduction type substrate having a second conduction type well and a BCCD formed therein for an end terminal, (2) continuously increasing impurity concentrations in a region of the substrate in which a floating diffusion region is to be formed and in a portion of an area of other substrate in which the regions are are to be formed for improving a horizontal charge transfer efficiency, and (3) forming transfer gates, an output gate, and reset gate on the substrate, and the floating diffusion region and a reset drain region in the BCCD, respectively.

Abstract: A solid-state imaging device that prevents the transfer errors of the signal charges from vertical charge-transfer sections to a horizontal charge-transfer section. A first plurality of buried channel regions in vertical charge-transfer sections are connected to a second buried channel region in a horizontal charge-transfer section so that the interfaces between the first plurality of buried channel regions and the second buried channel region are located to be aligned with the corresponding ends of the first plurality of gate electrodes. Thus, no potential dip nor potential barrier are generated in the vicinity of the interfaces between the first plurality of buried channel regions and the second buried channel region.

Abstract: A solid state image sensor includes a semiconductor substrate and a plurality of transfer lines over the substrate and receiving clock signals, at least one of the plurality of transfer lines having a transparent conductive material. A plurality of transfer electrodes are connected to the transfer lines and a plurality of photoelectric conversion regions under a surface of the substrate generate image signals. A plurality of charge transfer regions under the surface of the substrate transfer the image signals from the photoelectric conversion regions in response to the clock signals from the transfer lines.

Abstract: A solid state image sensing device comprises a cell area, located at a semiconductor substrate, including photoelectric conversion portions and charge transfer portions and a peripheral circuit area formed around the cell area located at the semiconductor substrate. The peripheral circuit area includes a first p.sup.+ -type semiconductor region and an insulating film with a relatively large thickness formed on the first p.sup.+ -type semiconductor region. The cell area further includes a second p.sup.+ -type semiconductor region and an insulating film with a relatively small thickness formed on the second p.sup.+ -type semiconductor region. The majority of the insulating film with the relatively large thickness is formed by means of a CVD process.

Abstract: A charge coupled device includes a substrate, a photoelectric conversion region, a hole accumulation region, a vertical charge coupled region, and a buried transmission gate region. The substrate includes a surface with a light receiving region and a charge transmission region. The photoelectric conversion region is provided in a substrate beneath the light receiving and charge transmission regions, and the photoelectric conversion region generates a photoelectric signal responsive to light received at the light receiving region of the substrate surface. The hole accumulation region is provided in the substrate between the photoelectric conversion region and the light receiving region of the substrate surface. The vertical charge coupled region is provided in the substrate between the photoelectric conversion region and the charge transmission region of the substrate surface. The buried transmission gate region is provided between the vertical charge coupled region and the photoelectric conversion region.

Abstract: A semiconductor device includes at least one active region. A thick dielectric film with an opaque layer embedded therein is deposited over the light sensitive active regions to provide protection from incident light without detrimentally affecting the optical properties of an uppermost optically active layer. An active layer is deposited over the thick dielectric film.

Abstract: A CMOS sensor structure and method of manufacture that includes the fabrication of a special shallow trench isolation structure. Besides isolating the active region for forming the CMOS sensor device, the shallow trench isolation structure has a special reflective plug embedded inside capable of reflecting incoming light onto the sensitive region of the CMOS sensor. Hence, the interactive length of incoming light with the light sensitive region can be increased, thereby increasing the contrast ratio and light sensitivity of the CMOS sensor.

Abstract: It may be necessary to provide conductors at very small distances from one another when electronic circuits, for example integrated circuits, are manufactured on an insulating substrate. A multilayer wiring system is often used in that case. The invention renders it possible to make very small inter-electrode gaps in a single conductor layer. To achieve this, the conductor layer is covered with a comparatively thick dielectric layer 4, 5 in which windows 8 are formed which extend over only part of the dielectric layer. Then an auxiliary layer 9 is provided which has depressions at the areas of the windows 8. Windows 11 are formed in the dielectric layer by anisotropic etching-back with dimensions which are substantially smaller than the dimensions of the original windows 8. The windows 11 may be used as etching windows or oxidation windows for the subsequent formation of the definitive conductor pattern.

Abstract: A method for avoiding interference in a CMOS sensor. A substrate at least comprising a CMOS sensor, an interconnect layer and an inter-layer dielectric layer thereon is provided. A passivation layer is formed over the substrate. A photolithography and etching process is performed to remove a part of the passivation layer and a part of the inter-layer dielectric layer above a sensor region of the CMOS sensor. The sensor region is thus exposed. An oxide layer is formed on the exposed sensor region. A micro-lens is formed on the oxide layer.

Abstract: A color linear charge coupled device for an image pickup apparatus includes red, green, and blue photo diode arrays. First, second, third and fourth transfer gates formed in the device move signal charges generated at the photo diode arrays toward first, second and third horizontal charge coupled device (HCCD) shift registers. By controlling the transfer gates, the red and green signal charges are first transferred to their HCCD shift registers. The blue signal charge is then transferred to its HCCD shift register. Only three HCCD shift registers are required, thus, the device dimension and configuration is considerably simplified compared to prior art configurations. Also, the color resolution of the device is greatly improved because the distance between the respective photo diode arrays is substantially decreased.

Abstract: A solid-state imaging device provided here comprises a p-type semiconductor substrate, a p-type impurity layer formed thereon, a light-intercepting part formed inside said impurity layer for storing signal charges produced through incident light, and a n-type drain part formed in a region of the substrate excluding the light-intercepting part for discharging excess charges of the light-intercepting part. As a result, sensitivity characteristics on the long wavelength side can be improved, and miniaturization can be facilitated. An n-type buried drain part for discharging charges is formed under a transfer part via a p-type impurity layer. The readout side between the light-intercepting part and the transfer part is separated by a p-type readout control part which is installed to control threshold voltage (Vt), and the non-readout side is separated by a channel stopper.

Abstract: A contact image sensor has a plurality of sensor elements on an insulating substrate, the sensor elements having electrodes as common electrodes and other electrodes as individual electrodes. The contact image sensor is manufactured by extending the common electrodes and the individual electrodes out of a document passage region, and forming short-circuiting patterns which electrically connect the common electrodes and the individual electrodes outside of the document passage region through pads which connect ICs for energizing the contact image sensor. After the ICs are connected to the pads, the insulating substrate is cut along the short-circuiting patterns to break the electrical connection between the common electrodes and the individual electrodes.

Abstract: In a method of forming a color filter for use in a solid-state image sensing device forming a color filter made of a resist material on a planarized layer made of a thermosetting resin formed on the surface of a solid-state image sensing device, a temperature for the heat treatment upon forming the color filter is defined as equal to or higher than 205.degree. C. and less than 220.degree. C., so that occurrence of micro-cracks in the planarized layer made of the thermosetting resin can be prevented.

Abstract: A method of manufacturing a semiconductor substrate includes according to the present invention a step of growing, when an epitaxial semiconductor substrate used for a solid-state imaging device is manufactured, an epitaxial layer on a substrate by using SiHCl.sub.3 as a source gas without HCl etching being effected on a substrate surface immediately before the epitaxial growth. A method of manufacturing a solid-state imaging device according to the present invention includes a step of growing an epitaxial layer on the substrate by using SiHCl.sub.3 as a source gas without HCl etching being effected on a substrate surface immediately before the epitaxial growth, and a step of forming a solid-state imaging element on the epitaxial layer of the epitaxial semiconductor substrate.

Abstract: Disclosed is a backside-illuminated charge-coupled device imager, which has: a silicon substrate which includes a light-receiving region which is formed on the frontside of the silicon substrate and includes charge-coupled devices which are arranged one-dimensionally or two-dimensionally and has a thickness equal to or less than a pixel pitch, wherein light is supplied from the backside of the silicon substrate; wherein the light-receiving region of the silicon substrate is provided with a silicon layer with a thickness equal to or less than the pixel pitch and a silicon dioxide (SiO.sub.2) layer thicker than the silicon layer.

Abstract: A method and apparatus of manufacturing an array of closely spaced electrodes wherein a semiconductor surface having a plurality cells that are capable of storing charge is fabricated such that there are a plurality of closely spaced electrodes associated with the cells and placing insulation regions between the closely spaced electrodes. The insulating regions are preferably made out of silicon dioxide and the material to form the electrodes is selected as one that is not oxidizable to silicon dioxide. The preferred embodiment uses an electrode material indium tin oxide. A barrier region is provided to assist charge transfer in the preferred embodiment the barrier region is preferably edge aligned to one of the electrodes.

Abstract: The lateral overflow drain for charge coupled devices includes: a semiconductor region 70 of a first conductivity type having a trench 92; a drain region 24 of a second conductivity type below the trench 92; a gate 20 in the trench 92 overlying and separated from a portion of the semiconductor region 70; and a virtual gate 30 of the first conductivity type in the semiconductor region 70 adjacent the trench 92.

Abstract: The semiconductor device of the present invention is equipped with a plurality of photodiodes, a horizontal transfer part and a vertical transfer part, and in particular, the horizontal transfer part or the vertical transfer part has a configuration described as in the following. Namely, the device has a semiconductor region which is formed by regularly and consecutively arranging a plurality of blocks of the same conductivity type, where each of the plurality of the blocks is equipped with three regions of mutually different impurity concentrations, clock pulses are applied to two regions out of the three regions and the voltage of the high level or low level of the clock pulse is applied to the remaining region out of the three regions as a constant potential.

Abstract: The method for fabricating a charge coupled device disclosed includes the steps of forming a gate oxide film and forming a transfer electrode. The provisional oxide film is formed on a semiconductor substrate, and the provisional oxide film at a transfer electrode formation region is selectively etched away. The transfer electrode from a polycrystalline silicon film on the gate oxide film of the transfer electrode formation region is selectively formed, and the provisional oxide film between transfer electrodes is etched away. Since the oxide film which protects the silicon substrate surface (oxide film/silicon interface) of the second layer transfer electrode formation region during the patterning of the first layer polycrystalline film and the insulating oxide film which covers the first layer transfer electrode surface, is formed in the two-step oxidation process, it is possible to adjust the thicknesses of the two oxide films as desired.

Abstract: In a charge coupled device (CCD) comprising a semiconductor substrate having a channel layer therein and a gate insulator thereon, a plurality first electrodes arranged in charge transfer direction on the gate insulator with inter-electrode spaces defined by opposite sidewalls of the first electrodes, an interlayer insulators covering the outer surfaces including the sidewalls of the first electrodes, a plurality of second electrodes formed at the inter-electrodes spaces, and a potential barrier region formed in the channel layer under the inter-electrode spaces, each of the sidewalls are tapered to diverge the inter-electrode space upwardly from the gate insulator so that each of the first electrodes has a thin portion at the tapered sidewall. In boron injection to form the potential barrier region using the first electrodes as a mask.

Abstract: The method for making a charge coupled device includes: forming a semiconductor region 24 of a first conductivity type; forming gate regions 28 and 30 overlying and separated from the semiconductor region 24; forming clocked barrier implants 36 and 38 of a second conductivity type in the semiconductor region 24 and aligned to the gate regions 36 and 38; depositing a semiconductor layer 70 overlying and separated from the semiconductor region 24 and the gate regions 28 and 30; removing a portion of the semiconductor layer 70 leaving semiconductor side walls 40 and 42 coupled to the gate regions 28 and 30.

Abstract: By introducing an n-type drain implant substantially below the surface of the p-type substrate of a full frame image sensor, then enclosing the drain on the bottom and the sides with a deep p-type implant, and accumulating the surface with a shallow p-type implant, with all implantations performed through the same mask aperture, the blooming control, channel stop, and dark current suppression features of the imager are compressed, increasing the fill factor, facilitating pixel miniaturization, and therefore enabling high resolution imaging applications.

Abstract: An improved coating for a charged coupled device is disclosed which eliminates problems caused by prior coatings. The coating does not significantly decrease quantum efficiency in any spectral range of interest.

Abstract: A product and process for making backside inned semiconductor image sensing devices employing neutral ion beams to reduce substrate volumes so that the image sensor can be illuminated from the backside, or side opposite etched circuitry. A neutral ion beam is contained in a vacuum chamber that has a fixture for holding a semiconductor image sensor, a control mechanism for controlling the neutral ion beam via the raster mechanism, and a map of the semiconductor image sensor. The image sensor is placed on the fixture within the vacuum chamber and the neutral ion beam removes a predetermined amount of substrate from the backside of the sensor. The result is an image sensor than can be backside thinned at the molecular level.

Abstract: A method for manufacturing a charge-coupled device in which the resistances of the respective poly-gates are made to be the same to thereby enhance the charge transfer efficiency, is disclosed including the steps of forming a first semiconductor layer on a substrate; implanting an impurity ion having a first concentration on the first semiconductor layer; patterning the first semiconductor layer to form a plurality of first gate electrode lines having a first width and spaced apart by a constant distance; forming a second semiconductor layer on the first gate electrode line and the exposed entire surface of the substrate; implanting an impurity ion having a second concentration on the second semiconductor layer; and patterning the second semiconductor layer to form second gate electrode lines having a second width between the first gate electrode lines.

Abstract: A method of making a fully self-aligned, planar, two phase charge coupled device comprises the steps of first forming upon a semiconductive substrate a uniform dielectric; then implanting ions of a second conductivity type into the substrate, then patterning closely spaced first conductive strips of a first conductive layer on the dielectric, then further implanting ions of the first or second conductivity type in the regions between said first conductive strips, then depositing uniformly a second conductive layer electrically isolated from the first conductive strips by an insulative region, then entirely removing by uniform planarization those portions of the second conductive layer disposed over regions of the first conductive strips so as to form coplanar, alternating first and thick electrically isolated conductive strips, then depositing a second insulative layer, then electrically connecting selected adjacent first and second conductive strips together to form first and second composite gate electrodes

Abstract: A miniaturized electronic imaging chip has stratified layers wherein a base silicon layer has a peripheral edge defining an area and a thickness which allows passage therethrough of most UV, visible and IR light. A pixel layer is formed on the back side of this first silicon layer. At least one interconnect layer is bonded to the pixel layer. Electric leads are bump bonded to the bonding pads on the outermost interconnect layer and extend away from it within the area for attachment to means for sensing electrical signals generated by an image projected onto the pixel layer through the silicon layer. Preferably, the leads are perpendicular to the chip. A unique method of manufacturing the miniaturized electronic imaging chip from a standard CCD comprises the steps of shaving a silicon layer, having a peripheral edge defining a second area which is smaller than the first area, on the back side of the standard CCD to a thickness which allows passage of a light image therethrough.

Abstract: A resist layer with a pattern having openings on portions exposed to boundaries between any two adjacent transfer gate electrodes is formed on the surface of a polycrystal silicon layer used as a material for forming the transfer gate electrodes which polycrystal silicon layer has been formed on a gate insulating layer. The polycrystal silicon layer is then etched with the resist layer used as a mask and the surface of the polycrystal silicon layer is subsequently oxidized to form silicon oxide layers between any two adjacent transfer gate electrodes for insulating the adjacent transfer gate electrodes from each other. In this way, the number of manufacturing processes can be reduced by preventing a potential pocket, which gives rise to signal charge left untransferred beneath the space between any two adjacent transfer gate electrodes, from being developed while forming the transfer gate electrodes of the electric charge transferring device into a single-layer structure.