Abstract: A process for reducing the dark current generation of an image sensor cell, fabricated on a semiconductor substrate, has been developed. The process features the use of polysilicon pad structure, formed simultaneously with a polysilicon gate structure of a reset transistor, with the polysilicon pad structure located overlying, and contacting, a portion of the top surface of the photodiode element, of the image sensor cell. A small diameter opening, in a composite polysilicon-silicon oxide layer, exposes the portion of photodiode element to be contacted by the polysilicon pad structure. The small diameter opening is created using a procedure which allows the surface of the photodiode element, exposed in the small diameter opening to experience only a minimum of RIE processing at end point, thus minimizing damage to the surface of the photodiode element, and thus reducing dark current generation.

Abstract: A magnetic detection device and a manufacturing method for the same that allows effective control of the magnetization of a free magnetic layer in a design with narrower tracks. A second antiferromagnetic layer is deposited on a free magnetic layer, and a thin nonmagnetic layer formed from an element such as Ru or the like is deposited on the second antiferromagnetic layer. Third antiferromagnetic layers are deposited on both end portions of the free magnetic layer. Both end portions of the second antiferromagnetic layer exhibit antiferromagnetic properties so that the magnetization of both end portions of the free magnetic layer is firmly fixed. A central portion of the second antiferromagnetic layer is non-antiferromagnetic. A central portion of the free magnetic layer is formed into a weak single domain so it permits inverted magnetization in response to an external magnetic field.

Abstract: A method for treatment of the surface of a CdZnTe (CZT) crystal that provides a native dielectric coating to reduce surface leakage currents and thereby, improve the resolution of instruments incorporating detectors using CZT crystals. A two step process is disclosed, etching the surface of a CZT crystal with a solution of the conventional bromine/methanol etch treatment, and after attachment of electrical contacts, passivating the CZT crystal surface with a solution of 10 w/o NH4F and 10 w/o H2O2 in water.

Abstract: A X-Y addressable MOS imager sensor method and apparatus wherein a semiconductor based MOS sensor having an array of pixels forming the X-Y addressable MOS imager, the X-Y addressable MOS imager having a plurality of the pixels such that each pixel within the plurality of pixels has a photodetector with a reset mechanism that adjusts the photodetector potential to a predetermined potential level employs the measuring a plurality of reset levels with two different elapsed times between reset and measurement of the reset level, a comparison circuit operatively coupled to the means for measuring to determine a difference in reset levels, a predetermined set of transfer functions used to identify effective signal levels of the photodetectors, and determines from the difference which transfer function is applicable to that photodetector range of accumulated light. In response to the difference detected, transfer functions are applied to the charge read out from the photodetector.

Abstract: An image sensor, includes a semiconductor substrate; a photosensor having, a first photosensing region including a first stack of one or more layers of transparent materials overlying the substrate, the first photosensing region having a spectral response having peaks and valleys, and a second photosensing region including a second stack of one or more layers of transparent materials overlying the substrate, the second photosensing region having a spectral response having peaks and valleys; and wherein at least one peak or valley of the spectral response of the first region is matched to at least one valley or peak respectively of the spectral response of the second region such that the average spectral response of the photosensor is smoother than the individual spectral response of either the first or second photosensing regions.

Abstract: A solid state image sensor device and a method of fabricating the same are disclosed in the present invention. A solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.

Abstract: A semiconductor manufacturing unit according to the invention includes a processing container into which a semiconductor substrate is adapted to be conveyed. A heating unit is adapted to heat an atmosphere in the processing container in order to thermally process the semiconductor substrate. A plane thermoelectric module having a first surface is arranged opposite to an area heated by the heating unit, for converting a thermal energy of the area into an electric energy by making use of Seebeck effect. According to the feature, the thermal energy which has been disposed in conventional units can be used as the electric energy. Thus, total energy efficiency of the semiconductor manufacturing unit can be raised.

Abstract: A method for re-forming a semiconductor layer of a thin film transistor-liquid crystal display device, including the steps of forming a gate electrode on a substrate, and forming a first gate insulation film on the gate electrode and the substrate; forming a semiconductor layer on the first gate insulation film; etching the semiconductor layer to remove the semiconductor layer if the formed semiconductor layer is defective; etching an upper portion of the first gate insulation film to a certain thickness damaged as the interface is exposed to the air by the etching of the semiconductor layer; forming a second gate insulation film on the remaining first gate insulation film; and forming a semiconductor layer on the second gate insulation film.

Abstract: An electronic component having an image sensing device (41, 71, 86, 132, 182, 212) and a method for improving pixel charge transfer in the image sensing device (41, 71, 86, 132, 182, 212). The image sensing device (41, 71, 86, 132, 182, 212) has a transfer gate (42, 82) between a source region (43, 83) and an image sensing region. The image sensing region is formed to have a wider device width proximate to the transfer gate (42, 82) than at a point distal from the transfer gate (42, 82).

Abstract: A solid-state imaging device comprises: an electric charge transfer portion for transferring an electric charge produced in a photodetector through photoelectric conversion from incident light to the electric charge; and, an output amplifier portion for detecting the electric charge to issue a signal. The charge transfer portion is provided with a first gate insulation film having a sufficient film thickness to keep a predetermined transfer efficiency. The output amplifier portion is provided with a second gate insulation film having a film thickness suitable for obtaining a predetermined mutual conductance capable of increasing the gain of the output amplifier portion.

Abstract: In a solid state image sensor comprising a plurality of photoelectric conversion regions and a plurality of transfer regions which are formed in a principal surface of a semiconductor substrate, and a plurality of transfer electrodes formed above the transfer regions, a first insulating film, an antireflection film and a second insulating film are formed in the named order on the photoelectric conversion regions. The antireflection film has a refractive index larger than that of the second insulating film but smaller than that of the semiconductor substrate. The stacked film composed of the first insulating film, the antireflection film and the second insulating film, is formed, in the transfer regions, to extend over the transfer electrode which is formed a third insulating film formed on the semiconductor substrate.

Abstract: An image sensor chip for use in configuring a contact-type image sensor, wherein the fabrication of a substrate on which this chip is mounted can be markedly simplified, and the pickup of noise by the analog output can be reduced. The chip is fabricated by integrating a prescribed number of photoelectric conversion elements (28) as photoreceptors, analog switches (29) connected in series to the corresponding photoelectric conversion elements (28), a switch circuit (30) for sequentially switching on the analog switches (29) in accordance with clock signals, output loads (31, 40) jointly connected in series to sets composed of the photoelectric conversion elements (28) and their respective analog switches (29), an amplification circuit (32) for amplifying the potential of the output load components on the side of the photoelectric conversion elements, and, preferably, a gain-adjusting resistor R for this operational amplifier (32).

Abstract: Object: To provide a solid-state imaging device having contacts for a charge sweeping component or the like, with which increases in dark current can be suppressed while increases in contact resistance and the production of alloy spikes can be prevented, and to provide a method for manufacturing this device.

Abstract: In a method for manufacturing a solid state image pick up device capable of improving gettering efficiency a semiconductor substrate having a front side on which a solid state image pick-up device may be formed, and a rear side opposite to the front side is provided. Subsequently, a polysilicon layer including impurities for gettering having a predetermined concentration is formed on the rear side of the semiconductor substrate. Next, a predetermined thickness of the polysilicon layer including the impurities for gettering is oxidized, and the impurities for gettering are condensed into the reduced polysilicon layer.

Abstract: A solid imaging device including: a semiconductor substrate of a first conductivity types a layer of a second conductivity type formed on a surface of the semiconductor substrate, the layer at least including a photosensitive portion of the second conductivity type; and a MOS transistor of the second conductivity type coupled to the photosensitive portion, wherein the solid imaging device further includes a layer of the first conductivity type in at least a channel region of the MOS transistor of the second conductivity type, the layer of the first conductivity type having an impurity concentration which is higher than an impurity concentration of the semiconductor substrate, and wherein at least a portion of a boundary of the layer of the second conductivity type is in direct contact with the semiconductor substrate.

Abstract: A process for producing a solid image pickup device is demanded that can enhance a photoelectric conversion region by forming an overflow barrier layer at a deep position and can prevents generation of radiation due to the use of resist as a mask. Upon producing a solid image pickup device having a vertical overflow drain structure, ion implantation is conducted on an entire of a silicon substrate without using a resist mask, so as to form an overflow barrier layer. It is also possible that a trench is formed in a peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and an outer peripheral part, and an impurity diffusion layer having a conductive type different from that of the overflow barrier layer is formed on an inner surface of the trench.

Abstract: This invention relates to a TFT-LCD and a manufacturing method therefor which etches triple layer patterns in a single process step. As a result, the number of masking processes is reduced and a high quality device is produced with less defects.

Abstract: Disclosed is a semiconductor structure and manufacturing process for making an integrated FET and photodetector optical receiver on a semiconductor substrate. A FET is formed by forming at least one p region in a p-well of the substrate and forming at least one n region in the p-well of the substrate. A p-i-n photodetector is formed in the substrate by forming at least one p region in an absorption region of the substrate when forming the at least one p region in the p well of the FET and forming at least one n region in the absorption region of the substrate when forming the at least one n region in the p-well of the FET.

Abstract: A solid-state imaging device provided with color filter in which process margin with respect to color reproducibility at the time of production is increased. This solid-state imaging device includes a semiconductor substrate, light shielding films formed so as to define light opening portions by material of light shielding characteristic above the semiconductor substrate, and color filters formed, in a manner to correspond to the light opening portions, above the light shielding films so that respective end portions thereof are correspondingly positioned within the regions where the light shielding films are respectively formed.

Abstract: A charge transfer device has a charge transfer region under charge transfer electrodes for stepwise conveying charge packets through potential wells to a floating diffusion region, and the charge transfer region has a boundary sub-region contracting toward the floating diffusion region, wherein the final potential well is created at a certain portion in said boundary sub-region close to the floating diffusion region so that each charge packet travels over a short distance, thereby enhancing a charge transfer efficiency.

Abstract: A method and apparatus of forming adjacent, non-overlapping CCD electrodes within an image sensing device such the electrodes are U-shaped. The device provided by the disclosed method employs a substrate with a gate dielectric layer formed on a surface of the substrate with a plurality of phases created within the CCD. A deposited silicon layer is placed on the surface of the CCD and a mask is used to cover areas other than the first set of electrodes. Etching takes places leaving the mask areas to the deposited silicon and a set of side walls to the remaining deposited silicon are then oxidized. A first set of electrodes by forming an electrode layer placed over the CCD. CMP is employed to remove remaining deposited silicon layer as well as portions of the electrode layer such that the side walls remain vertical portions to electrode layer remaining in the side walls. The process is then repeated by placing another electrode material layer and another CMP process leaving two sets of adjacent U-shaped gates.

Abstract: A solid-state imaging device includes a second conductive type impurity region formed in a first conductive type semiconductor substrate in an area corresponding to a pixel area, a high-resistivity semiconductor layer of the first conductive type formed on the semiconductor substrate including the impurity region, and an ion-implanted region of the first conductive type formed in at least one of the semiconductor substrate and the high-resistivity semiconductor layer in a peripheral area other than the pixel area. A method of fabricating the solid-state imaging device is also disclosed.

Abstract: The charge coupled device (CCD) formed according the method of the present invention includes a substrate, at least two photodiodes formed in the substrate and a first insulating layer formed on the substrate. A first transfer gate is formed on a portion of the first insulating layer between the photodiodes. A second insulating layer covers the first transfer gate, and has a projecting portion projecting up from the first transfer gate. The CCD further includes second and third transfer gates disposed over respective sides of the projecting portion of the second insulating layer and the first transfer gate with the second and third transfer gates having a gap therebetween over the projecting portion. A third insulating layer covers the second and third transfer gates, and a fourth transfer gate is formed over a portion of the second and third transfer gates and over the projecting portion of the second insulating layer.

Abstract: A semiconductor substrate has a sensor disposed in a surface layer on an entrance surface thereof for receiving incident light, and an intermediate-refractive-index film is disposed on the entire entrance surface of the semiconductor substrate either directly or with an insulating film interposed therebetween. The intermediate-refractive-index film has a refractive index lower than the semiconductor substrate and a low hydrogen permeability thin film is disposed on an entrance surface of the intermediate-refractive-index film and having refractive index lower than the intermediate-refractive-index film the thin film being permeable to hydrogen. The intermediate-refractive-index film serves as a reflection-resistant film. Reflections of incident light applied through the thin film and the reflection-resistant film of the sensor of the semiconductor substrate are suppressed. The intermediate-refractive-index film has a hole defined therein for passage of hydrogen therethrough upon hydrogen alloying.

Abstract: A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increased photon collection area, when compared to counterparts fabricated using non-serpentine shaped patterns. In addition the use of the serpentine shaped N type regions allow both vertical, as well as horizontal depletion regions, to result, thus increasing the quantum efficiency of the photodiode element. The combination of narrow width, and a reduced dopant level, for the N type serpentine shaped region, result in a fully depleted photodiode element.

Abstract: A solid-state image sensor and a fabricating method thereof in which poly gates in a horizontal charge coupled device (hereinafter referred to as HCCD) are made to have different lengths to omit a barrier ion implanting process step, thus simplifying the entire process and maximizing the charge-transferring efficiency are disclosed, the solid-state image sensor having an HCCD and VCCDs including a well region of a second conductivity type formed in a semiconductor substrate of a first conductivity type; a HCCD of the first conductivity type formed on the well region of the second conductivity type; and a plurality of polygate electrodes having sequentially different lengths repeatedly formed on the semiconductor substrate.

Abstract: A method of manufacturing a charge-coupled image sensor, wherein a silicon slice (1) is provided at its surface with semiconductor zones (8, 12, 16) formed by implantation of ions of dopants and subsequent heat treatments. The surface (2) is provided with a gate dielectric (3, 4) comprising a layer of silicon oxide (3) and a layer of silicon nitride (4) deposited on said layer of silicon oxide (3). A system of electrodes (17, 20) is formed on the gate dielectric layer (3, 4). In this method, the semiconductor zones (8, 12, 16) are not formed in the silicon slice (1) until after the gate dielectric layer (3, 4) has been formed, the ions being implanted through the gate dielectric layer (3, 4). An image sensor thus formed has a very small dark current, a very low fixed pattern noise, and images formed by means of the sensor are practically free of white spots.

Abstract: There is provided a method for fabricating a CMOS image sensor having enhanced reliability and light sensitivity, which comprises the steps of providing a substrate including photosensitive elements and metal wire; forming a first protecting film for protecting the elements over the substrate, covering the metal wire; forming a flattened spin-on-glass film on the first protecting film; forming a second protecting film for protecting the elements on the spin-on-glass film; forming color filter patterns on the second protecting film; forming a photoresist film for flattening on the color filter patterns and the second protecting film; and forming microlenses on the photoresist film. By using the flattened SOG film and a photoresist for flattening and pad opening, the present invention can accomplish the thickness uniformity of the color filter corresponding to each unit pixel, the wire-bonding pad devoid of the residuals of the color filter materials and the figure uniformity of the microlenses.

Abstract: A process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter to said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.

Abstract: A method of manufacturing a semiconductor device in which a cobalt silicide layer is formed on a semiconductor substrate. In the method, the semiconductor substrate is prepared, and cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature approximately equal to 200 degrees Celsius. Thereafter, cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature between 300 degrees Celsius and 400 degrees Celsius without exposing the semiconductor substrate to the atmosphere. Preferably, the semiconductor substrate is thereafter rapid thermal annealed at a temperature equal to or higher than 500 degrees Celsius in nitrogen atmosphere for a predetermined time. Further, at least a part of cobalt portion or cobalt oxide portion on the semiconductor substrate is removed by wet etching.

Abstract: A barrier area is located adjacent a horizontal transfer area and spaced from a field insulating area. The barrier area includes an insulating layer and a conductor extending from the horizontal transfer layer over the surface of a semiconductor substrate, a barrier layer of a second conductivity type formed under the surface of the semiconductor substrate and adjacent a first impurity layer of a first conductivity type of the horizontal transfer area, and a second impurity layer extending from the horizontal transfer area and formed under the barrier layer. A discharge area is located between the barrier area and the field insulating area.

Abstract: A process for fabricating a lateral photodiode element, for an image sensor cell, with an increased depletion region, has been developed. The process features protecting a portion of the semiconductor substrate from ion implantation procedures used to create the P well, and the N well components of the lateral photodiode element. The protected region, or the space between the P well and N well regions, allows a larger depletion region to be realized, when compared to lateral photodiode elements in which the N well and P well regions butt. The space between the P well and N well regions, between about 0.2 to 0.4 um, result in the desired P well—intrinsic or P type semiconductor substrate—N well, (P-I-N), lateral photodiode element.

Abstract: A solid-state imaging device provided with color filter in which process margin with respect to color reproducibility at the time of production is increased. This solid-state imaging device includes a semiconductor substrate, light shielding films formed so as to define light opening portions by material of light shielding characteristic above the semiconductor substrate, and color filters formed, in a manner to correspond to the light opening portions, above the light shielding films so that respective end portions thereof are correspondingly positioned within the regions where the light shielding films are respectively formed.

Abstract: A charge coupled device has an n- type charge accumulating layer equal to or less than 5 micron in width, and the unit cells suffer from reduction of signal charge accumulated therein and an increased pulse height of a pulse signal for a substrate shutter, wherein at least one p- type local impurity region is formed in such a manner as to form a p-n junction together with the n- type charge accumulating layer and the n- type semiconductor substrate, thereby increasing the amount of signal charge accumulated in each unit cell without sacrifice of the pulse height of the pulse signal for the substrate shutter.

Abstract: A method and apparatus of making high energy implanted photodiode that is self aligned with the transfer gate, the high energy implant is defined by providing a substrate, or well, of a first conductivity type, defining a charge coupled device within the substrate, or well, such that gate electrode layers are allowed to exist over areas to contain photodiodes during construction of the charge coupled device, patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes, anisotropically etching down through the gate electrode over the photodiodes to the gate dielectric material, implanting photodiodes with high-energy ions of a second conductivity type opposite the first conductivity type and creating a pinned photodiode by employing a shallow implant of the first conductivity type. The apparatus made by this method yields a photodiode employing high energy ions to form the P/N junction that is self aligned with the transfer gate.

Abstract: A process of fabricating an image sensor cell, on a semiconductor substrate, with the image sensor cell exhibiting low dark current generation, and high signal to noise ratio, has been developed. The process features the use of a photoresist shape, used to protect a previously formed photodiode element, from an reactive ion etching procedure, used to define insulator spacers on the sides of a polysilicon gate structure, of a reset transistor structure This process sequence avoids damage to the surface of an N type component, of the photodiode element, resulting in the improved electrical characteristics, when compared to counterpart image sensor cells, in which the photodiode element was subjected to the insulator spacer definition procedure.

Abstract: A method for manufacturing a CMOS sensor comprises the steps of providing a substrate having a first conductive type, wherein the substrate comprises an isolation region, an active region, a gate structure on the active region and a source/drain region having a second conductive type in the substrate. A patterned photoresist is formed over the substrate. A first doped region having the second conductive type is formed across a portion of the source/drain region and extends from the surface of the substrate into the substrate. A second doped region having the first conductive type is formed to wrap the first doped region in the substrate. A third doped region having the second conductive type is formed under the second doped region. A fourth doped region having the first conductive type is formed under the third doped region. The patterned photoresist is removed.

Abstract: A method and apparatus of forming adjacent, non-overlapping CCD electrodes within an image sensing device such the electrodes are U-shaped. The device provided by the disclosed method employs a substrate with a gate dielectric layer formed on a surface of the substrate with a plurality of phases created within the CCD. A deposited silicon layer is placed on the surface of the CCD and a mask is used to cover areas other than the first set of electrodes. Etching takes places leaving the mask areas to the deposited silicon and a set of side walls to the remaining deposited silicon are then oxidized. A first set of electrodes by forming an electrode layer placed over the CCD. CMP is employed to remove remaining deposited silicon layer as well as portions of the electrode layer such that the side walls remain vertical portions to electrode layer remaining in the side walls. The process is then repeated by placing another electrode material layer and another CMP process leaving two sets of adjacent U-shaped gates.

Abstract: A method of making a solid state image sensor having a color filter array with color filter elements having a plurality of different types of colored pixels embedded in a planar surface, the method includes providing a first transparent layer covering the pixels; making the first transparent layer optically planar by chemical mechanical polishing; and uniformly depositing a second transparent etch-stop layer over the first transparent layer.

Abstract: A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.

Abstract: An array substrate for use in an X-ray sensing device and in an LCD device is fabricated using plasma gas treatment. Especially, an indium-tin-oxide (ITO) transparent conductive metallic layer is plasma-treated by N2 plasma, He plasma or Ar plasma, before forming the insulation layer on the ITO transparent conductive metallic layer. Thus, the plasma removes the impurities on a surface of the transparent conductive metallic layer and changes the lattice structure of the surface of the transparent conductive metallic layer, and thus the adhesion between the transparent conductive metallic layer and the insulation layer is improved. The defects caused by a gap or a space between the transparent conductive metallic layer and the insulation layer do not occur.

Abstract: A solid state image sensor device and a method of fabricating the same are disclosed in the present invention. A solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.

Abstract: Readout gate sections are formed by implanting an impurity there and into photosensors at the same time by utilizing a step of implanting an impurity for increase of the transfer efficiency of vertical CCD registers. As a result, the potential of the regions under the gate electrodes of the readout gate sections can be set at an optimum value without being influenced by misregistration of photomasks.

Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.

Abstract: A fast frame-rate CCD imaging device is produced by modifying the optical mask of an otherwise ordinary and inexpensive CCD integrated circuit to darken a majority of the active imaging photocells. The modified CCD integrated circuit is operated at near its maximum horizontal and vertical clock rates, but multiple image frames are newly defined within the one previous active photocell array field. The added dark areas in the optical mask act to protect all recent frames still in transit within the active array area from being double exposed and thus corrupted.

Abstract: A solid state imaging device includes a plurality of photoelectric conversion elements arranged in an imaging area of a semiconductor substrate. Above each of the photoelectric conversion elements, a light-gathering microlens for gathering light on the photoelectric conversion element is disposed. Further, a microlens for shape inspection having the same shape as that of the light-gathering microlens is disposed outside the imaging area. A base pattern for inspection is disposed below the microlens for shape inspection. The shape of the microlens for shape inspection is inspected through observing an image of the base pattern through the microlens for shape inspection. A result of this inspection applies as it is to the light-gathering microlenses.

Abstract: A method of fabricating a complementary metal-oxide-semiconductor (CMOS) photosensitive device. In this method, a wafer substrate is provided. Then, a first passivation layer is formed over the wafer substrate. The first passivation layer, which is made from a material that includes silicon nitride or silicon oxide, is heated so that it melts. Then, color filters including a red filter region, a green filter region and a blue filter region are formed over the first passivation layer. The color filters are used to filter out different colors of monochromatic light. The color filters are made from a material that includes acrylic. Subsequently, a second passivation layer having a planar top surface is formed over the color filters. The second passivation layer is made from a material that includes silicon nitride or silicon oxide. Next, photolithographic and etching operations are carried out to form an opening through the second passivation layer and the first passivation layer.

Abstract: In a charge transfer device and a driving method therefor, electrons are injected through an insulating film into floating gate 108 or electrons are extracted through the insulating film from the floating gate 108, whereby the potential of the floating gate is converged to a fixed voltage.

Abstract: A method for producing a color CMOS image sensor including a matrix of pixels (e.g., CMOS APS cells) that are fabricated on a semiconductor substrate. A silicon-nitride layer is deposited on the upper surface of the pixels, and is etched using a reactive ion etching (RIE) process to form microlenses. A protective layer including a lower color transparent layer formed from a polymeric material, a color filter layer and an upper color transparent layer are then formed over the microlenses. Standard packaging techniques are then used to secure the upper color transparent layer to a glass substrate.

Abstract: An integrated circuit device structure comprises a semiconductor plateau containing an active region subjacent its front side, an electrode structure at the front side of the plateau, and an insulating layer surrounding the semiconductor plateau. A front side bus at the front side of the insulating layer is connected to the electrode structure. The front side bus extends over an elongate aperture in the insulating layer and is connected through the aperture to a back side bus over substantially the entire length of the front side bus.