Abstract: A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.

Abstract: The method for fabricating a semiconductor device including a step of forming a gate insulation film on a semiconductor substrate 10, the method further comprises, before the step of forming the gate insulation film, the step of forming an insulation film 12, covering a first side (upper side) and a second side (underside) of the semiconductor substrate 10, the step of etching off the insulation film 12 on the first side of the semiconductor substrate 10, and the step of annealing the semiconductor substrate 10 with the insulation film 12 present on the second side of the semiconductor substrate 10.

Abstract: A method of manufacturing a MOS transistor is provided that achieves high-speed devices by reducing nitrogen diffusion to a silicon substrate interface due to redistribution of nitrogen and further suppressing its diffusion to a polysilicon interface, which prevents realization of faster transistors. An oxide film is exposed to a nitriding atmosphere to introduce nitrogen into the oxide film, and a thermal treatment process is performed in an oxidizing atmosphere. The thermal treatment process temperature in the oxidizing atmosphere is made equal to or higher than the maximum temperature in all the thermal treatment processes that are performed later than that thermal treatment process step.

Abstract: A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O as it enters the high pressure oxidation furnace. This catalyst is used in an environment of between five atmospheres and 25 atmospheres N2O and a temperature range of 600° to 750° C., which are the conditions that lead to the N2O going super critical. By preventing the N2O from becoming super critical, the reaction is controlled that prevents both temperature and pressure spikes. The catalyst can be selected from the group of noble transition metals and their oxides. This group can comprise palladium, platinum, iridium, rhodium, nickel, silver, and gold.

Abstract: A method is disclosed for forming an ultrathin oxide layer of uniform thickness. The method is particularly advantageous for producing uniformly thin interfacial oxides beneath materials of high dielectric permitivity, or uniformly thin passivation oxides. Hydrofluoric (HF) etching of a silicon surface, for example, is followed by termination of the silicon surface with ligands larger than H or F, particularly hydroxyl, alkoxy or carboxylic tails. The substrate is oxidized with the surface termination in place. The surface termination and relatively low temperatures moderate the rate of oxidation, such that a controllable thickness of oxide is formed. In some embodiments, the ligand termination is replaced with OH prior to further deposition. The deposition preferably includes alternating, self-limiting chemistries in an atomic layer deposition process, though any other suitable deposition process can be used.

Abstract: A new step is provided for the creation of polysilicon gate electrode structures. A layer of polysilicon is deposited over the surface of a layer of semiconductor material, the layer of polysilicon is etched using a layer of hardmask material for this purpose. The etch of the layer of polysilicon is performed using a dual power source plasma system. During the etching of the layer of polysilicon, a step of inert oxidation is inserted. This step forms a layer of passivation over the sidewalls of the etched layer of polysilicon. The step of inert oxidation is an oxygen-based plasma exposure.

Abstract: Disclosed is a method for the electrochemical oxidation of a semiconductor layer. In an electrochemical oxidation treatment for the production process of an electron source 10 (field-emission type electron source) as one of electronic devices, a control section 37 determines a voltage increment due to the resistance of an electrolytic solution B in advance, based on a detected voltage from a resistance detect section 35. Then, the control section 37 controls a current source to supply a constant current so as to initiate an oxidation treatment for a semiconductor layer formed on an object 30. The control section 37 corrects a detected voltage from a voltage detect section 36 by subtracting the voltage increment therefrom. When the corrected voltage reaches a given upper voltage value, the control section 37 is operable to discontinue the output of the current source 32 and terminate the oxidation treatment.

Abstract: Method and device for doping or diffusion, or oxidation of silicon wafers (4), the wafers being introduced into the chamber (2) of an oven (1) wherein is introduced at least a gas for performing the doping or diffusion or oxidation process. The method comprises simultaneously with the introduction and passage of gas into the chamber (2) of the oven (1), continuously subjecting the latter to a depression of constant value. The device comprises an oven (1) provided with a chamber (2) wherein are introduced the wafers, the oven including at least an inlet tube (5a, 5b, 5c) for introducing at least a gas into the chamber (2) to carry out the processes and at least an outlet tube (6) for extracting the gas whereto is connected a suction unit (7) for generating in the chamber (2) a constant and controlled depression.

Abstract: A method of low-temperature oxidation of a silicon substrate includes placing a silicon wafer in a vacuum chamber; maintaining the silicon wafer at a temperature of between about 25° C. and 600° C.; introducing N2O gas into the vacuum chamber; dissociating the N2O gas into oxygen(1D) with a xenon laser generating light at a wavelength of about 172 nm and flowing the oxygen(1D) over the silicon wafer; and forming an oxide layer on at least a portion of the silicon wafer.

Abstract: Improved methods for fabricating semiconductor integrated circuit devices, in particular flash EEPROM devices. According to an embodiment, the present invention provides a method of forming a semiconductor device having a gate oxide layer (160) that is thin in some regions, such as the cell region, and thicker in other regions (165), such as the periphery region. The method simultaneously provides a gate oxide layer with two or more thicknesses without the thickness control problems of prior art methods that use contaminant-containing photoresist with an etching step. According to a specific embodiment of the present invention, the gate oxide has a first thickness that is sufficiently thin to provide high driving capability for the semiconductor ROM device, and a second thickness that is sufficiently thick to provide high voltage reliability of the semiconductor ROM device.

Abstract: The conveyance of wafers in bays (equipment groups) of a clean room is performed by RGVs (Rail Guided Vehicles) that linearly travel on conveying rails (3) laid on the floor of the clean room at high speed. A structure is adopted wherein a conveying area over which the RGV travels, is separated from a human working area by a compartment (partition) (4), and a human does not enter the conveying area upon operation of a line.

Abstract: Ultra-thin gate oxides are formed by exposing the upper surface of a substrate to a pulsed laser light beam in an atmosphere containing oxygen. Embodiments include exposing a silicon substrate to a pulsed laser light beam at a radiant fluence of 0.1 to 0.8 joules/cm2 for 1 to 10 nanoseconds to form a gate oxide layer having a thickness of 3 Å to 8 Å, e.g., 3 Å to 5 Å.

Abstract: A metal processing method is provided for growing a polycrystalline film by preferably chemical vapor deposition (CVD) from a suitable precursor gas or gases on a substrate which has been coated with seeds, preferably of nanocrystal size, of the metal material. The nanocrystal seeds serve as a template for the structure of the final polycrystalline film. The density of the seeds and the thickness of the grown polycrystalline film determine the grain size of the polycrystalline film at the surface of said film. CVD onto the seeds to produce the polycrystalline film avoids the recrystallization step generally necessary for the formation of a polycrystalline film, and thus allows for the growth of polycrystalline films at reduced temperatures.

Abstract: A method of manufacturing an LDMOS transistor includes providing a semiconductor substrate of a first conductivity type having a well region of a second conductivity type formed on a surface of the substrate. Ions of the first conductivity type are implanted into a part of the well region with a predetermined energy. The substrate is subjected to a heat treatment so that the implanted ions are diffused to form a diffusion region of the first conductivity type on the surface of the substrate. Then, a gate oxide layer and a gate electrode are formed on the surface of the substrate. Finally, a drain region is formed on the surface of the substrate. The predetermined energy for the implantation is set so that an accelerated oxidation during a formation of the gate oxide layer is inhibited.

Abstract: A method of fabricating poly crystalline silicon type thin film transistor is disclosed. In the method, before the step of re-crystallization of amorphous silicon to form polycrystalline silicon active pattern, a step for injecting predetermined amount of oxygen atom into the surface part of the amorphous silicon layer. By this addition of step, the surface part of the silicon layer is to be oxidized and the crystal defect in the interface between the gate insulating layer and poly crystalline silicon layer can be cured and the mobility of charge carrier can be improved in the channel of the thin film transistor.

Abstract: A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric barrier. The dielectric barrier is coated with an material that expands during oxidation or nitridization to a thickness about half the depth of the space between metallized features. The layer is then plasma oxidized using an RF or ECR plasma at low temperature with an oxygen ambient. Alternatively, the layer is plasma nitridized at low temperature. The plasma oxidation or nitridization is continued until the expandable material is converted to a dielectric and has expanded to fill the space between patterned metal features. Optionally, the process can be followed by a mechanical or chemical mechanical planarization step.

Abstract: Disclosed is a method of forming an oxynitride film. The method comprises the steps of loading a silicon substrate into an oxidization furnace, implanting an oxygen based source gas into the oxidization furnace to grow a pure silicon oxide film on the silicon substrate, blocking implantation of the oxygen based source gas and implanting an inert gas to exhaust the oxygen based source gas remaining within the oxidization furnace, raising a temperature within the oxidization furnace to a nitrification process temperature, stabilizing the temperature within the oxidization furnace, implementing a nitrification process for the pure silicon oxide film by implanting a nitrogen based source gas, and stopping implantation of the nitrogen based source gas and rapidly cooling the oxidization furnace while implanting the inert gas into the oxidization furnace.

Abstract: A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.

Abstract: A manufacturing method for semiconductor devices that can improve uniformity in the surface of a silicon nitride film or a nitride film to be formed and improve production efficiency is provided. A step of forming a first film that is a silicon oxide film or a silicon oxynitride film on a silicon substrate, a step of forming a second film that is a tetrachlorosilane monomolecular layer, and a step of forming a third film that is a silicon nitride monomolecular layer by performing a nitriding process on the second film are included. A silicon nitride film having a predetermined film thickness is formed by repeating the step of forming the second film and the step of forming the third film for a predetermined number of times. In a manufacturing apparatus, a plurality of silicon substrates are arranged on a stair-like wafer boat, and a process gas is supplied toward the upper side of a reaction tube from a process gas supply pipe.

Abstract: Oxidation methods and resulting structures including providing an oxide layer on a substrate and then re-oxidizing the oxide layer by vertical ion bombardment of the oxide layer in an atmosphere containing at least one oxidant. The oxide layer may be provided over diffusion regions, such as source and drain regions, in a substrate. The oxide layer may overlie the substrate and is proximate a gate structure on the substrate. The at least one oxidant may be oxygen, water, ozone, or hydrogen peroxide, or a mixture thereof. These oxidation methods provide a low-temperature oxidation process, less oxidation of the sidewalls of conductive layers in the gate structure, and less current leakage to the substrate from the gate structure.

Abstract: A silicon semiconductor substrate which realizes a defect-free region of void type crystals to a greater depth and allows the duration of production to be decreased and a method for the production thereof are provided. A silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method, which is obtainable by using a silicon semiconductor substrate satisfying the relational expression, 0.2≧V/S/R, providing V denotes the volume of void type defects, S denotes the surface area thereof, and R denotes the radius of spherical defects presumed to have the same volume as the void defects having the volume of V, and heat treating this substrate at a temperature exceeding 1150° C.

Abstract: Methods for fabricating a layer of oxide on a silicon carbide layer are provided by forming the oxide layer on the silicon carbide layer by oxidizing the silicon carbide layer in an N2O environment. A predetermined temperature profile and/or a predetermined flow rate profile of N2O are provided during the oxidation. The predetermined temperature profile and/or predetermined flow rate profile may be constant or variable and may include ramps to steady state conditions. The predetermined temperature profile and/or the predetermined flow rate profile are selected so as to reduce interface states of the oxide/silicon carbide interface with energies near the conduction band of SiC.

Abstract: To a polycrystalline silicon layer crystallized by irradiation with laser light, a mixed gas comprised of ozone gas and H2O or N2O gas is fed at a processing temperature of 500° C. or below, or the polycrystalline silicon layer is previously treated with a solution such as ozone water or an aqueous NH3/hydrogen peroxide solution, followed by oxidation treatment with ozone, to form a silicon oxide layer of 4 nm or more thick at the surface of the polycrystalline silicon layer for forming a thin-film transistor having less variations of characteristics on an unannealed glass substrate.

Abstract: The present invention includes a method of forming a metal gate electrode on which whiskers are not formed after performing a selective oxidation process and a subsequent heating process. The metal gate electrode is formed by forming a metal gate electrode pattern which is comprised of a polysilicon layer and a metal layer, and performing a selective oxidation process. After the selective oxidation process, the metal gate electrode undergoes a subsequent heating treatment. The selective oxidation process is carried out in a nitrogen containing gas ambient, so that a metal oxide layer is minimally formed on the metal layer. As a result, it is prevented from causing whiskers on the metal layer.

Abstract: A method for forming oxynitride layer. The method includes (a) providing a substrate and removing the native oxide layer; (b) forming a nitride layer on the substrate; (c) oxidizing the nitride layer to form an oxynitride layer; and (d) subjecting the oxynitride layer to in-situ annealing. This method inhibits the penetration of boron into the substrate thereby improving the performance of semiconductor devices and production yield.

Abstract: An aluminium film is formed by sputtering on a ferromagnetic layer made of, e.g., Ni—Fe alloy. The aluminum film is oxidized while an alumina film is deposited on the aluminum film by reactive sputtering, to form a tunneling barrier film. Assuming that the aluminum film has a thickness of 1 nm and the alumina film deposited has a thickness of 0.2 nm, an alumina film having a thickness of about 1.5 nm is formed on the ferromagnetic layer, this alumina film being a lamination of an alumina film which is the oxidized aluminum film and the deposited alumina film. The surface of the ferromagnetic layer is prevented from being oxidized because of the presence of the aluminum film. A thin oxide film such as alumina can be formed in a short time without oxidizing an underlying layer.

Abstract: The present invention relates generally to semiconductor fabrication. More particularly, the present invention relates to system and method of selectively oxidizing one material with respect to another material formed on a semiconductor substrate. A hydrogen-rich oxidation system for performing the process are provided in which innovative safety features are included to avoid the dangers to personnel and equipment that are inherent in working with hydrogen-rich atmospheres.

Abstract: The aim of the invention is the simple and economical production of a hydrogen-rich process gas from water vapour and hydrogen, whereby the proportion of water vapour to hydrogen may be precisely controllable and reproducible. Said aim is achieved, with a method and device for the production of a process gas for the treatment of substrates, in particular semiconductor substrates, in which the oxygen for formation of a process gas, comprising water vapour and hydrogen, is burnt in a hydrogen-rich environment in a combustion chamber.

Abstract: Method for oxidation of a silicon substrate under ultrahigh vacuum base conditions, wherein the substrate undergoes a number of oxidation cycles with exposure to oxygen and heat treatment for converting the adsorbed oxygen into silicon oxide.

Abstract: A thermal nitride film is formed as a gate insulating film on a silicon substrate, and after a gate electrode material is formed on the insulating film, it is patterned to form gate electrodes. After processing the electrodes, part of the gate insulating film other than a portion thereof which lies under the gate electrodes is removed. Further, an insulating film (a post oxidation film) is formed on side walls and upper surfaces of the stacked gate structures and the exposed main surface of the silicon substrate by use of thermal oxidation method.

Abstract: First, an first insulating film is formed along surfaces of a plurality of combinations of an gate electrode and an gate insulating films, and a semiconductor substrate, respectively. Then, on the first insulating film, an second insulating film different from the first insulating film is formed. The steps of forming the first insulating film and forming the second insulating film are alternately repeated until a concave formed by the surface of an later insulating film, which is a film formed later out of the first insulating film and the second insulating film, is positioned above the upper surface of the gate electrode. Thereafter, an third insulating film is formed on the later insulating film. Thus, a semiconductor device with high reliability can be obtained by improving a state of the insulating film formed between the gate electrodes.

Abstract: A method of reducing charge loss for nonvolatile memory. First, a semiconductor substrate having a semiconductor device thereon is provided. Next, a dielectric layer is formed on the entire surface of the semiconductor substrate, and a thermal treatment is performed in an atmosphere containing a reactive gas, and the reactive gas reacts with free ions remaining on the semiconductor substrate from prior manufacturing processes. Finally, a metal layer is formed on the dielectric layer.

Abstract: A method of manufacturing a semiconductor device includes forming copper conductive patterns on an insulating layer formed on a semiconductor base, ashing the whole insulating layer including the copper conductive patterns at a temperature at which no oxide film is formed on the copper conductive patterns, and thereafter baking the whole insulating layer including the copper conductive patterns in an oxidative atmosphere at a temperature range of about 150° C. to about 200° C. After the baking step, an encapsulating resin is formed on the insulating layer including the copper conductive patterns.

Abstract: The present disclosure provides a method for forming a gate stack structure for semiconductor devices. The disclosed method comprises steps such as forming a dielectric layer on a substrate; applying a plasma nitridation process on the formed dielectric layer; applying a first anneal process on the deposited dielectric layer; etching the dielectric layer to a predetermined thickness using a diluted etchant; applying a second anneal process using an oxygen environment on the etched dielectric layer after the etching; and forming a gate electrode layer on top of the dielectric layer. The etching makes the top portion of the etched dielectric layer have a significantly higher concentration of nitrogen than the lower portion of the etched dielectric layer so as the leakage current is significantly reduced.

Abstract: A two-type gate process is suitable for forming a gate insulation film partially formed of a high dielectric film, for example, a titanium oxide film (gate insulation film of the internal circuit) having a relative dielectric constant larger than that of silicon nitride on a substrate, and a silicon nitride film is deposited on the titanium oxide film. The silicon nitride film will prevent oxidation of the titanium oxide film when the surface of the substrate is subjected to thermal oxidation in the next process step. Next, the silicon nitride film and the titanium oxide film on the I/0 circuit region are removed, while the silicon nitride film and the titanium oxide film on the internal circuit region remain, and the substrate is subjected to thermal oxidation to form a silicon oxide film as a gate insulation film on the surface of the I/O circuit region.

Abstract: To provide a method for the formation of oxide films to form with advantage a high-quality oxide film having excellent uniformity in film thickness and film quality over the entire wafer. The method for the formation of oxide films comprises: the pretreatment process of forming a protective oxide film on the surface of a wafer positioned in a reaction vessel by performing oxidation treatment with radical oxidative species or an atmosphere containing radical oxidative species under depressurized conditions; and the oxide-film-formation process of forming an oxide film on the wafer by performing oxidation treatment at a predetermined temperature under depressurized conditions. The oxide-film-formation process is preferably performed following the pretreatment process in a continuous manner in the reaction vessel in which the pretreatment process is performed.

Abstract: In a semiconductor device using a silicon carbide substrate (1), the object of the present invention is to provide a method of manufacturing a semiconductor device that is a buried channel region type transistor having hot-carrier resistance, high punch-through resistance and high channel mobility. This is achieved by using a method of manufacturing a buried channel type transistor using a P-type silicon carbide substrate that includes a step of forming a buried channel region, a source region and a drain region, a step of forming a gate insulation layer after the step of forming the buried channel region, source region and drain region, and a step of exposing the gate insulation layer to an atmosphere containing water vapor at a temperature of 500° C. or more after the step of forming the gate insulation layer. The gate insulation layer is formed by a thermal oxidation method using dry oxygen.

Abstract: Forming a vertical MOS transistor or making another three-dimensional integrated circuit structure in a silicon wafer exposes planes having at least two different crystallographic orientations. Growing oxide on different crystal planes is inherently at different growth rates because the inter-atomic spacing is different in the different planes. Heating the silicon in a nitrogen-containing ambient to form a thin layer of nitride and then growing the oxide through the thin nitrided layer reduces the difference in oxide thickness to less than 1%.

Abstract: A system and method for isothermally distributing a temperature across a semiconductor device. A furnace assembly is provided, which includes a processing tube configured to removably receive a wafer carrier having a full compliment of semiconductor wafers. A heating assembly is provided which can include a resistive heating element positioned to heat air or other gases allowed to enter the process tube. The wafer carrier and heating assembly are vertically raised into a position within the process tube. Once the heating assembly forms a seal with the process tube, the process tube is exhausted and purged of air. Gas is then allowed to flow into the process tube and exchange heat with the heating element. The heated gas circulates through the process tube to convectively raise the temperature of the wafers.

Abstract: After forming a phosphor-doped amorphous silicon film and before forming a bottom silicon oxide film, a heat treatment is performed while exhausting a gas from the vicinity of the silicon substrate. The heat treatment is performed at a temperature equal to or higher than that for forming the bottom silicon oxide film and at a pressure equal to or lower than that for forming the bottom silicon oxide film. Alternatively, after forming the phosphor-doped amorphous silicon film and before forming the bottom silicon oxide film, a TEOS oxide film and a phosphor-doped amorphous silicon film deposited on the back surface of the silicon substrate are removed. Further alternatively, these films deposited on the back surface of the silicon substrate are covered with a film which prevents gas desorption under the film formation condition for the bottom silicon oxide film.

Abstract: An EEPROM device and process for fabricating the device having a retrograde program junction region includes providing a semiconductor substrate having a principal surface and forming a program junction region in the semiconductor substrate. The program junction region is characterized by a doping concentration profile in which a maximum doping concentration is displaced away from the principal surface. The doping concentration profile can be obtained by forming a first portion of a tunnel dielectric layer on the principal surface, then introducing doping atoms into the program junction region, followed by forming a second portion of a tunnel dielectric layer. In another embodiment, the doping concentration profile in the program junction region is formed by two consecutive doping processes, in which either the same doping species is introduced at different energies, or a second doping process is carried out with a dopant having a different conductivity type than the first dopant.

Abstract: A method of fabricating a transistor includes providing a semiconductor substrate having a surface and forming a nitride layer outwardly of the surface of the substrate. The nitride layer is oxidized to form a nitrided silicon oxide layer comprising an oxide layer beneath the nitride layer. A high-K layer is deposited outwardly of the nitride layer, and a conductive layer is formed outwardly of the high-K layer. The conductive layer, the high-K layer, and the nitrided silicon oxide layer are etched and patterned to form a gate stack. Sidewall spacers are formed outwardly of the semiconductor substrate adjacent to the gate stack, and source/drain regions are formed in the semiconductor substrate adjacent to the sidewall spacers.

Abstract: The invention provides a method of manufacturing a thin-film transistor whose semiconductor surface is protected. The surface of semiconductor formed on a substrate is exposed to ozone-containing water to form a surface-oxidized layer on the surface. A mask formed for etching or ion implantation is removed with the layer formed at least on an exposed portion of the surface.

Abstract: A method used during the formation of a semiconductor device comprises the steps of forming a polycrystalline silicon layer over a semiconductor substrate assembly and forming a silicon nitride layer over the polycrystalline silicon layer. A silicon dioxide layer is formed over the silicon nitride layer and the silicon dioxide and silicon nitride layers are patterned using a patterned mask having a width, thereby forming sidewalls in the two layers. The nitride and oxide layers are subjected to an oxygen plasma which treats the sidewalls and leaves a portion of the silicon nitride layer between the sidewalls untreated. The silicon dioxide and the untreated portion of the silicon nitride layer are removed thereby resulting in pillars of treated silicon nitride. Finally, the polycrystalline silicon is etched using the pillars as a mask. The patterned polycrystalline silicon layer thereby comprises features having widths narrower than the width of the original mask.

Abstract: A method for fabricating an insulator on a semiconductor substrate such that the insulator has a low dielectric constant. A first interconnect and a second interconnect are configured on a semiconductor substrate. A conductive silicon is formed between the first interconnect and the second interconnect. The conductive silicon is anodically etched in a hydrofluoric-acid-containing electrolyte to convert the conductive silicon into porous silicon. The porous silicon is subsequently oxidized to form porous silicon oxide. With a dielectric constant of between 1.1 and 4, the porous silicon oxide has a lower dielectric constant than customary silicon oxide with 4.

Abstract: A micro electron gun that is capable of extracting electrons from a semiconductor utilizing a quantum size effect and that can be mounted individually for each of pixels is disclosed, as well as a picture display apparatus using such electron guns which is high in quantum efficiency, of high brightness and thin, as well as methods of manufacture thereof. Conduction electrons from a n-type semiconductor substrate (2) are accelerated under an electric field through a layer or layers (4) of quantum size effect micro particles (3) formed on surfaces of the n-type semiconductor substrate (2) and passed therethrough without undergoing phonon scattering, so that they when arriving at an electrode (5) may possess an amount of energy not less than the work function of the electrode (5) and are thus allowed to spring out into a vacuum.

Abstract: A process for forming and/or modifying dielectric films on semiconductor substrates is disclosed. According to the present invention, a semiconductor wafer is exposed to a process gas containing a reactive component. The temperature to which the semiconductor wafer is heated and the partial pressure of the reactive component are selected so that, sometime during the process, diffusion of the reactive components occurs through the dielectric film to the film/semiconductor substrate interface. Further, diffusion also occurs of semiconductor atoms through the dielectric film to an exterior surface of the film. The process of the present invention has been found well suited to forming and/or modifying very thin dielectric films, such as films having a thickness of less than 8 nm.

Abstract: The oxynitride or oxide layer is formed on a semiconductor substrate by subjecting the substrate to UV radiation while exposed to a gaseous atmosphere of O2 and one or more of N2, N2O, H2 and NH3. Thereafter, a silicon nitride layer is formed according to known 4-step gate stack dielectric processing techniques. Alternatively, a 3-step gate stack process is used, namely following UV-oxidation, a further UV-radiation in NH3 may be applied, followed by a rapid thermal anneal process in an inert ambient. By using UV-oxidation as the first step in either a 4-step or 3-step gate stack process, very thin composite dielectric films with equivalent oxide thickness (EOT) below 16 Å and as low as 14.2 Å can be obtained with significant improvement in leakage current density.

Abstract: To provide a method of improving the characteristics and reliability of thin film transistors (TFT) which have been formed with a highest process temperature of not more than 700° C. Crystalline silicon films are thermally oxidized and TFT gate insulating films, for example, are formed with the oxide so obtained. At this time, the thermal oxidation is carried out at a temperature of 500-700° C. in such a way that no thermal damage is done to the substrate, for example, and a reactive gas which contains thermally excited or decomposed oxygen or nitrogen oxide (NOX, where 0.5≦×≦2.5) is used for the oxidizing gas. The oxidation reaction may be promoted by heating in an atmosphere of oxides of nitrogen at a high pressure of 2-10 atmospheres. Deterioration due to the implantation of hot electrons, for example, can be prevented and element reliability can be increased by using the thermal oxide films obtained in this way as gate insulating films.

Abstract: Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively.