Abstract: A process for forming sub-lithographic features in an integrated circuit is disclosed herein. A process for enhancing the etch trimmability and the etch stability of features patterned on a photoresist layer is also disclosed herein. The process includes curing a photoresist layer after patterning and development but before an etch process is performed thereon. By controlling the formation of the cured portions of the features patterned on the photoresist layer, the features can be trimmed to sub-lithographic critical dimensions without pattern deformation or occurrence of other failure mechanisms.

Abstract: A siloxan polymer insulation film has a dielectric constant of 3.3 or lower and has —SiR2O— repeating structural units. The siloxan polymer has dielectric constant, high thermal stability and high humidity-resistance on a semiconductor substrate. The siloxan polymer is formed by directly vaporizing a silicon-containing hydrocarbon compound expressed by the general formula Si&agr;O&bgr;CxHy (&agr;, &bgr;, x, and y are integers) and then introducing the vaporized compound to the reaction chamber of the plasma CVD apparatus. The residence time of the source gas is lengthened by reducing the total flow of the reaction gas, in such a way as to form a siloxan polymer film having a micropore porous structure with low dielectric constant.

Abstract: A pad oxide layer and a silicon nitride (SiN) layer are sequentially formed on a silicon substrate. An etching process is then performed to form a trench in the silicon substrate. A sub-atmospheric chemical vapor deposition (SACVD) process is performed to selectively form a first dielectric layer on exposed portions of the silicon substrate within the trench to fill portions of the trench thereafter. Finally, a high density plasma chemical vapor deposition (HDPCVD) process is performed to form a second dielectric layer to fill the remaining space of the trench and cover the silicon substrate.

Abstract: A method for forming for use within an integrated circuit a gap filling sandwich composite dielectric layer construction, and an integrated circuit having formed therein the gap filling sandwich composite dielectric layer construction. To practice the method, there is first provided a substrate having formed thereover a patterned layer. There is then formed upon the patterned layer a first conformal dielectric layer through a first plasma enhanced chemical vapor deposition (PECVD) method employing a first radio frequency power optimized primarily to limit plasma induced damage to the substrate and the patterned layer. The first radio frequency power is also optimized secondarily to limit moisture permeation through the first conformal dielectric layer. There is then formed upon the first conformal dielectric layer a gap filling dielectric layer.

Abstract: A method for manufacturing a semiconductor device, in which a substrate is disposed in a chamber and a fluorine-containing silicon oxide film is formed on the substrate using a plasma CVD process. The fluorine-containing silicon oxide film is formed such that the release of fluorine from this silicon oxide layer is suppressed. According to this semiconductor device manufacturing method, a stable semiconductor device can be provided such that the device includes a fluorine-containing silicon oxide film (FSG film) at which the release of fluorine is suppressed, and thus peeling does not occur.

Abstract: The disclosed is a method and apparatus capable of certainly performing a plasma process such as isotropic plasma etching on the whole surface of a particle. A particle (2) is passed through a passage (3) in which inductive coupled plasma is generated and a plasma process is performed on the particle (2). In such a manner, the plasma process on the particle (2) can be performed on the whole surface of the particle (2) in a non-contact manner.

Abstract: Methods for depositing a low-k dielectric film on the surfaces of semiconductors and integrated surfaces are disclosed. A substituted organosilane compound precursor is applied to the surface by chemical vapor deposition where it will react with the surface and form a film which will have a dielectric constant, K, less than 2.5.

Abstract: A method for forming a nitrided gate oxide over a silicon substrate in a semiconductor device fabrication process including providing a silicon semiconductor substrate; thermally growing a gate oxide layer including silicon dioxide over the silicon substrate; plasma treating the gate oxide layer including a plasma supplied with a plasma source gas including at least one of helium, hydrogen, deuterium, and oxygen; plasma nitriding the gate oxide layer according to a plasma treatment including a plasma supplied with a plasma source gas including nitrogen; and, thermally annealing the silicon semiconductor substrate including the gate oxide layer according to at least one annealing treatment.

Abstract: A substrate support utilized in high-density plasma chemical vapor deposition (HDP-CVD) processing functions as a radio frequency (RF) electrode (e.g., a bias RF cathode). An upper surface of the substrate support has a central upper surface portion and a peripheral upper surface portion, with the peripheral upper surface portion recessed relative to the central upper surface portion. The upper surface of the support extends beyond an outer edge of the substrate when the substrate is positioned on the substrate support. This extension in the support upper surface may enhance process performance by reducing electric field edge effects, as well as by improving directional distribution of ions traveling to the substrate.

Abstract: The present invention discloses a film forming method for forming an insulating film having a low dielectric constant. This method comprises the steps of adding at least one diluting gas of an inert gas and a nitrogen gas (N2) to a major deposition gas component consisting of siloxane and N2O, converting the resultant deposition gas into plasma, causing reaction in the plasma, and forming an insulating film 25,27, or 28 on a substrate targeted for film formation.

Abstract: A semiconductor device and a method for manufacturing the same, wherein a gate electrode structure is formed on a surface of a semiconductor substrate. Next, a gate poly oxide (GPOX) layer is deposited on a surface of the gate electrode structure and on the semiconductor substrate. Then, the surface of the semiconductor substrate is cleaned to remove any residue and the GPOX layer remaining on the semiconductor substrate. Next, an etch stopper is formed on the surface of the gate electrode structure and on the semiconductor substrate. Last, a high-density plasma (HDP) oxide layer is deposited on the etch stopper. The semiconductor device and method for manufacturing the same are capable of preventing bubble defects.

Abstract: There is provided the film forming method of forming the insulating film 204 containing silicon on the substrate 103 by plasmanizing the compound having the siloxane bonds and the oxidizing gas to react with each other.

Abstract: A method for forming an ultra thin gate dielectric for an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes forming an initial nitride layer upon a substrate by rapidly heating the substrate in the presence of an ammonia (NH3) gas, and then re-oxidizing the initial nitride layer by rapidly heating the initial nitride layer in the presence of a nitric oxide (NO) gas, thereby forming an oxynitride layer. The oxynitride layer has a nitrogen concentration therein of at about 1.0×1015 atoms/cm2 to about 6.0×1015 atoms/cm2, and has a thickness which may be controlled within a sub 10 Å range.

Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.

Abstract: A semiconductor device producing method carries out an etching process during a time between a start and an end of a plasma etching, and carries out a plasma etching with respect to a specific metal as a pre-processing prior to the etching process. The etching process is selected from a group consisting of an etching process which includes no exposing of a specific metal which affects variation of an etching rate, an etching process which includes no positioning of the specific metal exposed from an etching mask, an etching process which includes exposing of the specific metal located at a surface other than an etching target surface of a semiconductor substrate, and an etching process which includes exposing the specific metal having a thickness smaller than a thickness of other etching targets regardless of an existence of the etching mask.

Abstract: The invention includes reactive gaseous deposition precursor feed apparatus and chemical vapor deposition methods. In one implementation, a reactive gaseous deposition precursor feed apparatus includes a gas passageway having an inlet and an outlet. A variable volume accumulator reservoir is joined in fluid communication with the gas passageway. In one implementation, a chemical vapor deposition method includes positioning a semiconductor substrate within a deposition chamber. A first deposition precursor is fed to an inlet of a variable volume accumulator reservoir. With the first deposition precursor therein, volume of the variable volume accumulator reservoir is decreased effective to expel first deposition precursor therefrom into the chamber under conditions effective to deposit a layer on the substrate.

Abstract: A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.

Abstract: An embodiment of the present invention provides methods for forming a carbon-containing layer having a low dielectric constant and good gap-fill capabilities. A method includes depositing a carbon-containing layer on a substrate and transforming the carbon-containing layer to remove at least some of the carbon. The transforming step may include annealing the carbon-containing layer in a furnace containing a hydrogen atmosphere, for example. The carbon-containing layer may be a carbon-doped silicon oxide material, where the transforming step changes the carbon-doped silicon oxide. Additionally, the method may include subjecting the annealed layer to a hydrogen and/or low oxygen plasma treatment to further remove carbon from the layer. Additionally, a step of adding a capping layer to the annealed, plasma treated material is provided.

Abstract: The method for manufacturing a silicon oxide film is characterized in that the method includes the steps of forming the silicon oxide film by a vapor deposition method or the like and of irradiating infrared light onto this silicon oxide film. Thus, according to the present invention, a silicon oxide film of relatively low quality formed at relatively low temperature can be improved to be a silicon oxide film of high quality. When the present invention is applied to a thin-film semiconductor device, a semiconductor device of high operational reliability and high performance can be manufactured.

Abstract: A method of film layer deposition is described. A film layer is deposited using a cyclical deposition process. The cyclical deposition process consists essentially of a continuous flow of one or more process gases and the alternate pulsing of a precursor and energy to form a film on a substrate structure.

Abstract: Gate length is 110 nm±15 nm or shorter (130 nm or shorter in a design rule) or an aspect ratio of an area between adjacent gate electrode structures thereof (ratio of the height of the gate electrode structure to the distance between the gate electrode structures) is 6 or higher. A PSG (HDP-PSG: Phospho Silicate Glass) film containing a conductive impurity is formed as an interlayer insulating film for burying the gate electrode structures at film-formation temperature of 650° C. or lower by a high-density plasma CVD (HDP-CVD) method.

Abstract: A method of manufacturing an interlayer insulating film that can form an insulating layer having excellent planarization property without using an etch-back process is offered. A method of manufacturing a semiconductor device having a step of forming an interlayer insulating film on an object comprises a step of supplying octa-methylcyclotetrasiloxane as a source gas into a vacuum processing chamber of a vacuum ultraviolet CVD apparatus in which an object on which an interlayer insulating film is to be formed is arranged; and a step of irradiating vacuum ultraviolet light from a vacuum ultraviolet light source arranged on an upper part of the vacuum processing chamber onto the object placed in the vacuum processing chamber to grow an interlayer insulating film.

Abstract: A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The dielectric constant of a dielectric layer deposited by reaction of an organosilicon compound having three or more methyl groups is significantly reduced by further depositing an amorphous hydrogenated silicon carbide layer by reaction of an alkylsilane in a plasma of a relatively inert gas.

Abstract: A method of manufacturing an interlayer dielectric film by vacuum ultraviolet CVD including the steps of placing a wafer in a vacuum chamber having a window; causing a first gas that contains silicon atoms to flow through the vacuum chamber; exposing the wafer to light emitted from a Xe2 excimer lamp through the window; and maintaining an atmosphere in the chamber at a first temperature which is less than 350° C. to form an insulating film on the wafer which substantially fills stepped portions of the wafer to provide step coverage and which has a substantially flat top surface.

Abstract: A process for selectively depositing a silicon oxide layer onto silicon substrates of different conductivity types is described. The silicon oxide layer is formed by the ozone decomposition of TEOS at relatively low temperatures and relatively high pressures. Compared to the deposition rate on exposed regions on non-doped silicon, the silicon oxide deposits at a faster rate on exposed regions of P-type silicon and at a slower rate on exposed regions of N-type silicon.

Abstract: A process is disclosed for forming an integrated circuit structure characterized by formation of a combined dielectric layer and antireflective coating layer. The process comprises forming a layer of dielectric material over an integrated circuit structure, and treating the surface of the layer of dielectric material to form an antireflective coating (ARC) surface therein. When a layer of photoresist is then formed over the ARC surface, and the layer of photoresist is exposed to a pattern of radiation, the ARC surface improves the accuracy of the replication, in the photoresist layer, of the pattern of radiation. Preferably, the surface of the dielectric layer is treated with a plasma comprising ions of elements and/or compounds to form the ARC surface.

Abstract: Disclosed are compositions and methods for improving compatibility of imaging layers with dielectric layers. Also disclosed are methods of reducing or eliminating poisoning of photoresists during electronic device manufacture.

Abstract: A capacitively coupled plasma reactor composed of: a reactor chamber enclosing a plasma region; upper and lower main plasma generating electrodes for generating a processing plasma in a central portion of the plasma region by transmitting electrical power from a power source to the central portion while a gas is present in the plasma region; and a magnetic mirror including at least one set of magnets for maintaining a boundary layer plasma in a boundary portion of the plasma region around the processing plasma.

Abstract: A non-linear optical silica thin film (22) whose main material is SiO2—GeO2 is formed by irradiating positive or negative polar particles and polarization orientation is carried out in the silica thin film. For example, by repeating, while forming the silica thin film (22), forming the thin film in a state of irradiating positive particles, forming the thin film in a neutral state, such as irradiation of neutral particles or non-irradiation of particles, forming the thin film in a state of irradiating negative particles, and forming the thin film in a neutral state, a plurality of regions (22-1, 22-2, and 22-3) in different states of polarization orientation are formed in a direction of film thickness of the silica thin film (22). Distribution of charges arises in the silica thin film (22) being formed by irradiation of polar particles and polarization orientation is automatically carried out in the silica thin film (22).

Abstract: A method for ionization film formation to form a deposited film by ionizing vaporized particles with an ionization mechanism of the hot-cathode system and injecting the ionized particles into a substrate is provided. The method includes the step of introducing He gas inside the ionization mechanism.

Abstract: An insulation film is formed on a semiconductor substrate by a method including the steps of: (i) introducing a source gas comprising a compound composed of at least Si, C, and H into a chamber; (ii) introducing in pulses an oxidizing gas into the chamber, wherein the source gas and the oxidizing gas form a reaction gas; and (iii) forming an insulation film on a semiconductor substrate by plasma treatment of the reaction gas. The plasma treatment may be plasma CVD processing.

Abstract: A method for forming for use within an integrated circuit a gap filling sandwich composite dielectric layer construction, and an integrated circuit having formed therein the gap filling sandwich composite dielectric layer construction. To practice the method, there is first provided a substrate having formed thereover a patterned layer. There is then formed upon the patterned layer a first conformal dielectric layer through a first plasma enhanced chemical vapor deposition (PECVD) method employing a first radio frequency power optimized primarily to limit plasma induced damage to the substrate and the patterned layer. The first radio frequency power is also optimized secondarily to limit moisture permeation through the first conformal dielectric layer. There is then formed upon the first conformal dielectric layer a gap filling dielectric layer.

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen as a process gas in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract: A method of forming a silicon oxide layer over a substrate disposed in a high density plasma substrate processing chamber. The silicon oxide layer is formed by flowing a process gas including a silicon-containing source, an oxygen-containing source, an inert gas and a hydrogen-containing source into the substrate processing chamber and forming a high density plasma (i.e., a plasma having an ion density of at least 1×1011 ions/cm3) from the process gas to deposit said silicon oxide layer over said substrate. In one embodiment, the hydrogen-containing source in the process gas is selected from the group of H2, H2O, NH3, CH4 and C2H6.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.

Abstract: There is provided a deposition technique wherein the amounts of eliminated F and H are small in the deposition of an insulating film, such as an SiOF film or an SiCHO film, which contains silicon, oxygen and other components and which has a lower dielectric constant than the dielectric constant of a silicon oxide film.

Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.

Abstract: A method of forming an oxide film and a method of manufacturing an electronic device utilizing the oxide film is disclosed. A silicon oxide film is formed on a substrate by sputtering. Therefore, the film formation is carried out at a low temperature. The sputtering atmosphere comprises an oxidizing gas and an inert gas such as argon. In order to prevent fixed electric charges from being generated in the film and to obtain an oxide film of good properties, the proportion of argon is adjusted to 20% or less. Alternatively, a gas including halogen elements such as fluorine is added to the above sputtering atmosphere at a proportion less than 20%. Hereupon, alkali ions and dangling bonds of silicon in the oxide film are neutralized by the halogen elements, whereby a fine oxide film is obtained.

Abstract: A plasma processing chamber having a chamber liner and a liner support, the liner support including a flexible wall configured to surround an external surface of the chamber liner, the flexible wall being spaced apart from the wall of the chamber liner. The apparatus can include a heater thermally connected to the liner support so as to thermally conduct heat from the liner support to the chamber liner. The liner support can be made from flexible aluminum material and the chamber liner comprises a ceramic material. The flexible wall can include slots which divide the liner support into a plurality of fingers which enable the flexible wall to absorb thermal stresses.

Abstract: A semiconductor device having a reduced resistance-capacitance time constant is formed by treating a dielectric layer to reduce its dielectric constant. Embodiments include exposing a deposited dielectric layer to ionic radiation, as with Helium ion implantation, to form voids within the layer, thereby reducing its dielectric constant.

Abstract: The present invention provides a method for fabricating a semiconductor component having a substrate (1) and a dielectric layer (70) provided on or in the substrate (1), the dielectric layer (7) being deposited in alternating self-limiting monolayer form, in the form of at least two different precursors, by means of an ALD process. There is provision for conditioning of the surface of the substrate (1) prior to the deposition of a first monolayer of a first precursor with respect to a reactive ligand of the first precursor.

Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.

Abstract: A method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps on a semiconductor substrate are used to fill the gaps in a void-free manner. Differential heating characteristics of a substrate in a high-density plasma chemical vapor deposition (HDP-CVD) system helps to prevent the gaps from being pinched off before they are filled. The power distribution between coils forming the plasma varies the angular dependence of the sputter etch component of the plasma, and thus may be used to modify the gap profile, independently or in conjunction with differential heating. A heat source may be applied to the backside of a substrate during the concurrent deposition/etch process to further enhance the profile modification characteristics of differential heating.

Abstract: The present method of forming a silicon oxide layer comprises providing two frequency excitation plasma CVD device which comprises a high frequency electrode, a susceptor electrode, and two matching box for impedance matching between the electrodes and a power supply, wherein one side electrode constituting a tuning condenser of a matching box toward the high frequency electrode is the high frequency electrode; placing a substrate on the susceptor electrode; applying high frequency electric power on the high frequency electrode and the susceptor electrode respectively; and forming a silicon oxide layer on the substrate by generating plasma with using a reaction gas of which main reaction gas is a mixing gas of monosilane and nitrous oxide.

Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.

Abstract: The present invention provides a plasma processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo energy for maintaining activation of the active species during transfer from the remote plasma activation region to the processing chamber. The source of photo energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist plasma processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for annealing.

Abstract: This invention relates to a method of depositing dielectric on a semiconductor substrate to form part of a capacitor. The method includes reactive sputtering a metal oxide layer from a target of metal onto the substrate wherein the support is biased to induce a DC voltage across the depositing dielectric as it forms. The voltage may be in the range of 200-300V.

Abstract: A capacitor and a capacitor dielectric material are fabricated by adjusting the amount of an ionic conductive species, such as hydrogen, contained in the capacitor dielectric material to obtain predetermined electrical or functional characteristics. Forming the capacitor dielectric material from silicon, nitrogen and hydrogen allows a stoichiometric ratio control of silicon to nitrogen to limit the amount of hydrogen. Forming the capacitor by dielectric material plasma enhanced chemical vapor deposition (PECVD) allows hydrogen bonds to be broken by ionic bombardment, so that stoichiometric control is achieved by controlling the power of the PECVD. Applying a predetermined number of thermal cycles of temperature elevation and temperature reduction also breaks the hydrogen bonds to control the amount of the hydrogen in the formed capacitor dielectric material.

Abstract: Carbon-doped silicon oxide films (SiCxOy) produced by CVD of an organosilane gas containing at least one silicon carbon bond, are rapidly densified by exposure to ultraviolet radiation. UV radiation exposure disrupts undesirable chemical bonds (such as Si—OH) present in the carbon-doped silicon oxide following deposition, replacing these bonds with more desirable chemical bonds characteristic of an ordered silicon oxide lattice. As a result of radiation exposure and the chemical bond replacement, gases such as water vapor are evolved and removed, producing a densified and stable carbon-doped silicon oxide film. Densification utilizing ultraviolet radiation is particularly useful because softness and fragility of freshly-deposited (SiCxOy) films may preclude insertion and removal of coated substrates from conventional batch loaded thermal annealing chambers.

Abstract: Improved dielectric layers are formed by surface treating the dielectric layer with a silane plasma prior to forming a subsequent layer thereon. Embodiments include forming a trench in a low k dielectric layer and modifying the side surfaces of the trench by subjecting the dielectric to a silane plasma produced in a PECVD chamber. A conductive feature is formed by depositing a conformal barrier layer on the low k dielectric including the treated side surfaces of the dielectric and depositing a conductive layer within the trench.