Using Electromagnetic Or Wave Energy (e.g., Photo-induced Deposition, Plasma, Etc.) Patents (Class 438/788)
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Patent number: 7674721Abstract: A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.Type: GrantFiled: May 2, 2007Date of Patent: March 9, 2010Assignee: NEC Electronics CorporationInventor: Tatsuya Usami
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Patent number: 7670964Abstract: Embodiments of a gas cluster ion beam apparatus and methods for forming a gas cluster ion beam using a low-pressure process source are generally described herein. In one embodiment, the low-pressure process source is mixed with a high-pressure diluent source in a static pump to form a mixed source, from which a gas cluster jet is generated and ionized to form the gas cluster ion beam. Other embodiments may be described and claimed.Type: GrantFiled: March 22, 2007Date of Patent: March 2, 2010Assignee: Tokyo Electron LimitedInventor: Scott Lane
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Publication number: 20100048033Abstract: An oxide film-forming apparatus, comprising: a process chamber for disposing an electronic device substrate at a predetermined position; water vapor supply means for supplying water vapor into the process chamber; and plasma exciting means for activating the water vapor with plasma, whereby the surface of the electronic device substrate can be irradiated with the plasma based on the water vapor.Type: ApplicationFiled: November 4, 2009Publication date: February 25, 2010Inventors: Junichi Kitagawa, Shinji Ide, Shigenori Ozaki
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Patent number: 7666755Abstract: A method of forming a device isolation film of a semiconductor device is provided. The method of forming a device isolation film of a semiconductor device according to an embodiment includes forming the device isolation film by ion-implanting insulation materials inside of a trench formed on a semiconductor substrate.Type: GrantFiled: August 21, 2007Date of Patent: February 23, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Jin Ha Park
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Publication number: 20100041245Abstract: An HDP-CVD process is described, including a deposition step conducted in an HDP-CVD chamber and a pre-heating step that is performed outside of the HDP-CVD chamber before the deposition step and pre-heats a wafer to a temperature higher than room temperature and required in the HDP-CVD process deposition step.Type: ApplicationFiled: August 18, 2008Publication date: February 18, 2010Applicant: MACRONIX INTERNATIONAL CO., LTD.Inventors: Tuung Luoh, Chin-Ta Su, Ta-Hung Yang, Kuang-Chao Chen, Shing-Ann Luo
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Patent number: 7662728Abstract: A method of forming a low-K dielectric film, comprises the steps of placing a substrate carrying thereon a low-K dielectric film on a stage, heating the low-K dielectric film on the stage, processing the low-K dielectric film by plasma of a processing gas containing a hydrogen gas, the plasma being excited while supplying the processing gas over the low-K dielectric film, wherein the plasma is excited within 90 seconds after placing the substrate upon the stage.Type: GrantFiled: May 11, 2006Date of Patent: February 16, 2010Assignee: Tokyo Electron LimitedInventors: Yusaku Kashiwagi, Yasuhiro Oshima, Yoshihisa Kagawa, Gishi Chung
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Patent number: 7662712Abstract: A method for fabricating a semiconductor device includes providing a semiconductor substrate comprising a patterned metal conductor layer. To provide UV blocking, an overlying separation layer is formed over the substrate, and a UV blocking layer of silicon enriched oxide is formed over the separation layer. The UV blocking layer has a silicon atomic concentration sufficient for ultraviolet blocking. A gap-filling, hydrogen-blocking layer may be formed over the semiconductor substrate, and any the UV blocking layer, to prevent hydrogen from passing therethrough.Type: GrantFiled: February 10, 2006Date of Patent: February 16, 2010Assignee: Macronix International Co., Ltd.Inventors: Lee Jen Chen, Shing Ann Luo, Chin Ta Su
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Patent number: 7659206Abstract: A method of treating a substrate comprises depositing silicon oxycarbide on the substrate and removing the silicon oxycarbide from the substrate. The silicon oxycarbide on the substrate is decarbonized by exposure to an energized oxygen-containing gas that heats the substrate and converts the layer of silicon oxycarbide into a layer of silicon oxide. The silicon oxide is removed by exposure to a plasma of fluorine-containing process gas. Alternatively, the remaining silicon oxide can be removed by a fluorine-containing acidic bath. In yet another version, a plasma of a fluorine-containing gas and an oxygen-containing gas is energized to remove the silicon oxycarbide from the substrate.Type: GrantFiled: February 21, 2006Date of Patent: February 9, 2010Assignee: Applied Materials, Inc.Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Venkata Balagani
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Patent number: 7651956Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.Type: GrantFiled: December 6, 2000Date of Patent: January 26, 2010Assignee: Micron Technology, Inc.Inventors: Garry Anthony Mercaldi, Don Carl Powell
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Patent number: 7648921Abstract: A method of forming a dielectric layer is provided. A first dielectric layer is formed on a substrate having metal layers formed thereon. The first dielectric layer includes overhangs in the spaces between two neighboring metal layers and voids under the overhangs. The first dielectric layer is partially removed to cut off the overhangs and expose the voids and therefore openings are formed. A second dielectric layer is formed on the dielectric layer to fill up the opening.Type: GrantFiled: September 22, 2006Date of Patent: January 19, 2010Assignee: MACRONIX International Co., Ltd.Inventors: Hsu-Sheng Yu, Shing-Ann Lo, Ta-Hung Yang
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Patent number: 7642152Abstract: A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.Type: GrantFiled: September 7, 2005Date of Patent: January 5, 2010Assignee: United Microelectronics Corp.Inventors: Chuan-Kai Wang, Yi-Hsing Chen, Chia-Jui Liu, Juan-Yi Chen, Ming-Yi Lin
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Patent number: 7632761Abstract: A method for producing a thin film titanium dioxide is disclosed. The disclosed method for producing the thin film titanium dioxide includes performing a magnetron reactive sputtering process to vaporize at least portions of a titanium source in a sputtering chamber that is supplied with gaseous oxygen. The vaporized titanium reacts with the oxygen to form anatase titanium dioxide, which is deposited on a substrate within the sputtering chamber.Type: GrantFiled: June 1, 2007Date of Patent: December 15, 2009Assignee: Wayne State UniversityInventors: Ibrahim Abdullah Al-Homoudi, Golam Newaz, Gregory W. Auner
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Patent number: 7632757Abstract: A silicon oxynitride film is formed on a target substrate by CVD, in a process field configured to be selectively supplied with a first process gas containing a chlorosilane family gas, a second process gas containing an oxidizing gas, and a third process gas containing a nitriding gas. This method alternately includes first to sixth steps. The first, third, and fifth steps perform supply of the first, second, and third process gases, respectively, while stopping supply of the other two process gases. Each of the second, fourth, and sixth steps stops supply of the first to third process gases. The third and fifth steps include an excitation period of supplying the second and third process gases, respectively, to the process field while exciting the respective process gases by an exciting mechanism.Type: GrantFiled: July 3, 2006Date of Patent: December 15, 2009Assignee: Tokyo Electron LimitedInventor: Hiroyuki Matsuura
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Patent number: 7622162Abstract: Using UV radiation, methods to modify shallow trench isolation (STI) film tensile stress to generate channel strain without adversely impacting the efficiency of the transistor fabrication process are disclosed. Methods involve a two phase process: a deposition phase, wherein silanol groups are formed in the silicon dioxide film, and a bond reconstruction phase, wherein UV radiation removes silanol bonds and induce tensile stress in the silicon dioxide film.Type: GrantFiled: June 7, 2007Date of Patent: November 24, 2009Assignee: Novellus Systems, Inc.Inventors: Bart van Schravendijk, Seon-Mee Cho
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Patent number: 7622400Abstract: Methods of forming a dielectric layer having a low dielectric constant and high mechanical strength are provided. The methods involve depositing a sub-layer of the dielectric material on a substrate, followed by treating the sub-layer with a plasma. The process of depositing and plasma treating the sub-layers is repeated until a desired thickness has been reached.Type: GrantFiled: May 18, 2004Date of Patent: November 24, 2009Assignee: Novellus Systems, Inc.Inventors: Keith Fox, Easwar Srinivasan, David Mordo, Qingguo Wu
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Patent number: 7622402Abstract: The surface of an insulating film disposed on an electronic device substrate is irradiated with plasma based on a process gas comprising at least an oxygen atom-containing gas, to thereby form an underlying film at the interface between the insulating film and the electronic device substrate. A good underlying film is provided at the interface between the insulating film and the electronic device substrate, so that the thus formed underlying film can improve the property of the insulating film.Type: GrantFiled: March 31, 2003Date of Patent: November 24, 2009Assignee: Tokyo Electron LimitedInventors: Takuya Sugawara, Yoshihide Tada, Genji Nakamura, Shigenori Ozaki, Toshio Nakanishi, Masaru Sasaki, Seiji Matsuyama, Kazuhide Hasebe, Shigeru Nakajima, Tomonori Fujiwara
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Patent number: 7622369Abstract: A method of forming device isolation regions on a trench-formed silicon substrate and removing residual carbon therefrom includes providing a flowable, insulative material constituted by silicon, carbon, nitrogen, hydrogen, oxygen or any combination of two or more thereof; forming a thin insulative layer, by using the flowable, insulative material, in a trench located on a semiconductor substrate wherein the flowable, insulative material forms a conformal coating in a silicon and nitrogen rich condition whereas in a carbon rich condition, the flowable, insulative material vertically grows from the bottom of the trenches; and removing the residual carbon deposits from the flowable, insulative material by multi-step curing, such as O2 thermal annealing, ozone UV curing followed by N2 thermal annealing.Type: GrantFiled: May 30, 2008Date of Patent: November 24, 2009Assignee: ASM Japan K.K.Inventors: Woo Jin Lee, Atsuki Fukazawa, Nobuo Matsuki
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Patent number: 7618833Abstract: A method for pre-treating an epitaxial layer performed before evaluation of the epitaxial layer by making the epitaxial layer contact with a metal electrode by a capacitance-voltage measurement, the method comprising; applying carbon-bearing compound to a surface of the epitaxial layer; subsequently irradiating ultraviolet light to the surface of the epitaxial layer; and thereby forming an oxide film on the surface of the epitaxial layer.Type: GrantFiled: November 10, 2006Date of Patent: November 17, 2009Assignee: Sumco CorporationInventors: Shinjirou Uchida, Sumio Miyazaki
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Patent number: 7601619Abstract: A method and an apparatus for plasma processing which can accurately monitor an ion current applied to the surface of a sample. Predetermined gas is exhausted via an exhaust port by a turbo-molecular pump while introducing the gas within the vacuum chamber from a gas supply device, and the pressure within the vacuum chamber is kept at a predetermined value by a pressure regulating valve. A high-frequency power supply for a plasma source supplies a high-frequency power to a coil provided near a dielectric window to generate inductively coupled plasma within the vacuum chamber. A high-frequency power supply for the sample electrode for supplying the high-frequency power to the sample electrode is provided. A matching circuit for the sample electrode and a high-frequency sensor are provided between the sample electrode high-frequency power supply and the sample electrode. An ion current applied to the surface of a sample can be accurately monitored buy using the high-frequency sensor and an arithmetic device.Type: GrantFiled: April 4, 2006Date of Patent: October 13, 2009Assignee: Panasonic CorporationInventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno, Cheng-Guo Jin, Ichiro Nakayama
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Patent number: 7598184Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.Type: GrantFiled: October 24, 2006Date of Patent: October 6, 2009Assignee: IMECInventors: Denis Shamiryan, Vasile Paraschiv, Marc Demand
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Publication number: 20090239368Abstract: An oxide layer is selectively formed on a layer including silicon by a plasma process using hydrogen gas and a gas including oxygen. The hydrogen gas is controlled to have a flow rate less than about 50 percent of an overall flow rate by adding helium gas to the plasma process.Type: ApplicationFiled: March 23, 2009Publication date: September 24, 2009Inventors: Jae Hwa Park, Gil-Heyun Choi, Hee-Sook Park, Jong-Min Baek
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Patent number: 7592222Abstract: The present invention relates to a method of fabricating a flash memory device. According to a method of fabricating a flash memory device in accordance with an aspect of the present invention, a semiconductor substrate over which a tunnel insulating layer and a first conductive layer are formed is provided. A first oxide layer is formed on the first conductive layer using a plasma oxidization process in a state where a back bias voltage is applied. A nitride layer is formed on the first oxide layer. A second oxide layer is formed on the nitride layer. A second conductive layer is formed on the second oxide layer.Type: GrantFiled: June 26, 2008Date of Patent: September 22, 2009Assignee: Hynix Semiconductor Inc.Inventors: Eun Shil Park, Kwon Hong, Jae Hong Kim, Jae Hyoung Koo
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Patent number: 7589031Abstract: A method of PECVD deposition of silicon-containing films has been discovered and further developed. The method is particularly useful when the films are deposited on substrates having surface areas which are larger than 25,000 cm2. The method prevents the deposition of partially reacted silicon-containing species which form a powdery material or haze (contaminant compound) on the substrate surface. The contaminant compounds are avoided by assuring that the power applied to form a plasma in the PECVD process is maintained, at least at a minimal level, until reactive silicon-containing precursor gases present above the surface of the substrate have been reacted or evacuated from the plasma processing area.Type: GrantFiled: December 1, 2006Date of Patent: September 15, 2009Assignee: Applied Materials, Inc.Inventors: Suhail Anwar, Chung-Hee Park, Beom Soo Park, Han Byoul Kim, Soo Young Choi, John M. White
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Patent number: 7582575Abstract: A method for forming an insulation film on a semiconductor substrate by plasma reaction includes: vaporizing a silicon-containing hydrocarbon having a Si—O bond compound to provide a source gas; introducing the source gas and a carrier gas without an oxidizing gas into a reaction space for plasma CVD processing; and forming an insulation film constituted by Si, C, O, and H on a substrate by plasma reaction using a combination of low-frequency RF power and high-frequency RF power in the reaction space. The plasma reaction is activated while controlling the flow of the reaction gas to lengthen a residence time, Rt, of the reaction gas in the reaction space.Type: GrantFiled: December 5, 2005Date of Patent: September 1, 2009Assignee: ASM Japan K.K.Inventors: Atsuki Fukazawa, Kenichi Kagami
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Patent number: 7579286Abstract: A fabrication method of a semiconductor device is disclosed by which damage to another film or exfoliation of a film is prevented and an insulating film having a dielectric constant of 2.5 or less can be formed while a film strength is maintained without deteriorating a wiring line characteristic. According to an embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas having a ring structure of Si—O bonds, such that it maintains the ring structure of the Si—O bonds. According to another embodiment, an insulating film is formed on a substrate by a plasma process, which uses film-forming gas which contains silane-containing gas and oxygen gas or film-forming gas which contains Si—O bond-containing gas, such that it has a ring structure of the Si—O bonds.Type: GrantFiled: June 29, 2005Date of Patent: August 25, 2009Assignee: Sony CorporationInventor: Kiyotaka Tabuchi
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Publication number: 20090203191Abstract: A semiconductor substrate and a base substrate made from an insulator are prepared; an oxide film containing a chlorine atom is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form an embrittled region at a predetermined depth from a surface of the semiconductor substrate; plasma treatment of the oxide film is performed by applying a bias voltage; a surface of the semiconductor substrate and a surface of the base substrate are disposed opposite to each other to bond a surface of the oxide film and the surface of the base substrate to each other; and heat treatment is performed to cause separation along the embrittled region after bonding the surface of the oxide film and the surface of the base substrate to each other, thereby forming a semiconductor film over the base substrate with the oxide film interposed therebetween.Type: ApplicationFiled: January 12, 2009Publication date: August 13, 2009Inventors: Hideto OHNUMA, Shunpei YAMAZAKI
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Patent number: 7572647Abstract: A coil is provided for use in a semiconductor processing system to generate a plasma with a magnetic field in a chamber. The coil comprises a first coil segment, a second coil segment and an internal balance capacitor. The first coils segment has a first end and a second end. The first end of the coil segment is adapted to connect to a power source. The second coil segment has a first and second end. The second end of the first coil segment is adapted to connect to an external balance capacitor. The internal balance capacitor is connected in series between the second end of the first coil segment and the first end of the second coil segment. The internal balance capacitor and the coil segments are adapted to provide a voltage peak along the first coil segment substantially aligned with a virtual ground along the second coil segment.Type: GrantFiled: February 2, 2007Date of Patent: August 11, 2009Assignee: Applied Materials, Inc.Inventors: Robert Chen, Canfeng Lai, Xinglong Chen, Weiyi Luo, Zhong Qiang Hua, Siqing Lu, Muhammad Rasheed, Qiwei Liang, Dmitry Lubomirsky, Ellie Y. Yieh
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Patent number: 7569497Abstract: In a method for forming an insulating film, a film containing an organic curable material and provided on a substrate for an electronic device is irradiated with an energy plasma produced by a microwave irradiation through a planar antenna member having a plurality of slits to thereby cure the film containing the organic curable material and form the insulating film having a dielectric constant of 3 or less.Type: GrantFiled: January 25, 2005Date of Patent: August 4, 2009Assignee: Tokyo Electron LimitedInventors: Toshiaki Hongoh, Satohiko Hoshino
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Patent number: 7566482Abstract: A method in which a SOI substrate structure is fabricated by oxidation of graded porous Si is provided. The graded porous Si is formed by first implanting a dopant (p- or n-type) into a Si-containing substrate, activating the dopant using an activation anneal step and then anodizing the implanted and activated dopant region in a HF-containing solution. The graded porous Si has a relatively coarse top layer and a fine porous layer that is buried beneath the top layer. Upon a subsequent oxidation step, the fine buried porous layer is converted into a buried oxide, while the coarse top layer coalesces into a solid Si-containing over-layer by surface migration of Si atoms.Type: GrantFiled: September 30, 2003Date of Patent: July 28, 2009Assignee: International Business Machines CorporationInventors: Kwang Su Choe, Keith E. Fogel, Devendra K. Sadana
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Publication number: 20090181548Abstract: A vertical plasma processing apparatus for a semiconductor process includes a process container having a process field configured to accommodate a plurality of target substrates at intervals in a vertical direction, and a marginal space out of the process field. In processing the target substrates, a control section simultaneously performs supply of a process gas to the process field from a process gas supply circuit and supply of a blocking gas to the marginal space from a blocking gas supply circuit to inhibit the process gas from flowing into the marginal space.Type: ApplicationFiled: March 25, 2009Publication date: July 16, 2009Inventors: Toshiki Takahashi, Kohei Fukushima, Koichi Orito, Jun Sato
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Publication number: 20090170346Abstract: A method for preventing oxidation in a high-k dielectric/metal gate stack in the manufacture of an integrated circuit device is disclosed. In a detailed embodiment, a PMOS region stack has nitrided hafnium silicide, tungsten, tantalum nitride and polysilicon layers. An NMOS region stack has nitrided hafnium silicide, tungsten silicide, tantalum nitride and polysilicon layers. A thin polysilicon layer deposited over the stacks is converted to an oxide using a low temperature ultraviolet ozone oxidation process or a plasma nitridation using decoupled plasma nitridation or NH3 annealing. The oxide provides a coating over the top and sides of the stacks to protect metal and interfaces from oxidation.Type: ApplicationFiled: March 9, 2009Publication date: July 2, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Ajith Varghese, James J. Chambers
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Publication number: 20090156017Abstract: A method of forming a dielectric film, includes: introducing a siloxane gas essentially constituted by Si, O, C, and H and a silazane gas essentially constituted by Si, N, H, and optionally C into a reaction chamber where a substrate is placed; depositing a siloxane-based film including Si—N bonds on the substrate by plasma reaction; and annealing the siloxane-based film on the substrate in an annealing chamber to remove Si—N bonds from the film.Type: ApplicationFiled: December 13, 2007Publication date: June 18, 2009Applicant: ASM JAPAN K.K.Inventors: Atsuki FUKAZAWA, Woo Jin LEE, Nobuo MATSUKI
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Patent number: 7544625Abstract: A method is provided for forming a silicon oxide (SiOx) thin-film with embedded nanocrystalline silicon (Si). The method deposits SiOx, where x is in the range of 1 to 2, overlying a substrate, using a high-density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, the SiOx thin-film is embedded with nanocrystalline Si. The HD PECVD process may use an inductively coupled plasma (ICP) source, a substrate temperature of less than about 400° C., and an oxygen source gas with a silicon precursor. In one aspect, a hydrogen source gas and an inert gas are used, where the ratio of oxygen source gas to inert gas is in the range of about 0.02 to 5. The SiOx thin-film with embedded nanocrystalline Si typically has a refractive index in the range of about 1.6 to 2.2, with an extinction coefficient in the range of 0 to 0.5.Type: GrantFiled: May 4, 2006Date of Patent: June 9, 2009Assignee: Sharp Laboratories of America, Inc.Inventors: Pooran Chandra Joshi, Tingkai Li, Yoshi Ono, Apostolos T. Voutsas, John W. Hartzell
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Publication number: 20090117751Abstract: A method for fabricating a radical oxide layer includes providing a substrate, forming an oxide layer over the substrate through a radical oxidation process, and performing a thermal treatment on the oxide layer by using oxygen (O2).Type: ApplicationFiled: June 27, 2008Publication date: May 7, 2009Applicant: Hynix Semiconductor Inc.Inventors: Yong-Soo KIM, Hong-Seon Yang, Heung-Jae Cho
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Publication number: 20090104789Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.Type: ApplicationFiled: October 22, 2007Publication date: April 23, 2009Applicant: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Jeffrey C. Munro, Linlin Wang, Srinivas D. Nemani, Yi Zheng, Zheng Yuan, Dimitry Lubomirsky, Ellie Y. Yieh
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Publication number: 20090104792Abstract: Disclosed is a producing method of a semiconductor device, including: loading at least one substrate formed on a surface thereof with a tungsten film into a processing chamber; and forming a silicon oxide film on the surface of the substrate which includes the tungsten film by alternately repeating following steps a plurality of times: supplying the processing chamber with a first reaction material including a silicon atom while heating the substrate at 400° C.; and supplying the processing chamber with hydrogen and water which is a second reaction material while heating the substrate at 400° C. at a ratio of the water with respect to the hydrogen of 2×10?1 or lower.Type: ApplicationFiled: January 17, 2007Publication date: April 23, 2009Applicant: Hitachi Kokusai Electric Inc.Inventors: Hironobu Miya, Masayuki Asai, Norikazu Mizuno
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Publication number: 20090104790Abstract: A method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate. The silicon oxide or silicon-nitrogen containing layer is ultra-violet (UV) cured within an oxygen-containing environment.Type: ApplicationFiled: October 22, 2007Publication date: April 23, 2009Applicant: Applied Materials, Inc.Inventor: Jingmei Liang
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Publication number: 20090104755Abstract: A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.Type: ApplicationFiled: October 22, 2007Publication date: April 23, 2009Applicant: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Ellie Yieh
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Publication number: 20090104791Abstract: A method of depositing a silicon oxide layer over a substrate includes providing a substrate to a deposition chamber. A first silicon-containing precursor, a second silicon-containing precursor and a NH3 plasma are reacted to form a silicon oxide layer. The first silicon-containing precursor includes at least one of Si—H bond and Si—Si bond. The second silicon-containing precursor includes at least one Si—N bond. The deposited silicon oxide layer is annealed.Type: ApplicationFiled: October 22, 2007Publication date: April 23, 2009Applicant: Applied Materials, Inc. A Delaware corporationInventors: Srinivas D. Nemani, Abhijit Basu Mallick, Ellie Y. Yieh
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Publication number: 20090093134Abstract: Low dielectric constant materials are cured in a process chamber during semiconductor processing. The low dielectric constant materials are cured by irradiation with UV light. The atmosphere in the process chamber has a CO2 concentration of about 1-16% by volume during the irradiation. The CO2 limits the formation of —Si—H and —Si—OH groups in the low dielectric constant material, thereby reducing the occurrence of moisture absorption and oxidation in the low dielectric constant material.Type: ApplicationFiled: October 5, 2007Publication date: April 9, 2009Applicant: ASM Japan K.KInventors: Kiyohiro Matsushita, Kenichi Kagami
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Patent number: 7514375Abstract: During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate. In some embodiments, pulsed HF bias is applied to the substrate during etching operations. The pulsed bias typically has a pulse frequency in a range of about from 500 Hz to 20 kHz and a duty cycle in a range of about from 0.1 to 0.95.Type: GrantFiled: August 8, 2006Date of Patent: April 7, 2009Assignee: Novellus Systems, Inc.Inventors: Sunil Shanker, Chi-I Lang
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Patent number: 7514377Abstract: To provide a generator capable of generating plasma and ozone with high efficiency and easy to handle, with a simple structure. An electrode part 10 is formed of electrodes 11 and 12 without dielectric material interposed therebetween. An arc-extinguishing capacitor 13 as a charge storage part for storing charge is connected in series to the electrode part 10. An AC power source 15 generating plasma by causing self-arc-extinguishing discharge between the electrodes 11 and 12 by applying AC voltage to charge and discharge the arc-extinguishing capacitor 13, is connected to both ends of a circuit in which the electrode part 10 and the arc-extinguishing capacitor 13 are connected in series. The arc-extinguishing capacitor 13 and one electrode 12 of the electrode part 10 connected thereto are unitized, for making the electrode part multi-polarized.Type: GrantFiled: December 26, 2003Date of Patent: April 7, 2009Assignees: Hitachi Kokusai Electric Inc., Adtec Plasma Technology Co., Ltd.Inventors: Noriyoshi Sato, Takeshi Taniguchi, Hiroshi Mase, Shuitsu Fujii, Tamiya Fujiwara
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Publication number: 20090085171Abstract: An oxide film formation method comprises steps of: generating a plasma from a gas mixture containing an inert gas and an oxidizing gas whose mixing ratio to the inert gas is higher than 0, and is 0.007 or lower; and forming an oxide film on a surface of a silicon substrate by using the plasma.Type: ApplicationFiled: September 25, 2008Publication date: April 2, 2009Applicant: CANON KABUSHIKI KAISHAInventor: Nobuyuki Endo
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Publication number: 20090088002Abstract: A method for fabricating a nitrogen-containing dielectric layer and semiconductor device including the dielectric layer in which a silicon oxide layer is formed on a substrate, such that an interface region resides adjacent to substrate and a surface region resides opposite the interface region. Nitrogen is introduced into the silicon oxide layer by applying a nitrogen plasma. After applying nitrogen plasma, the silicon oxide layer is annealed. The processes of introducing nitrogen into the silicon oxide layer and annealing the silicon oxide layer are repeated to create a bi-modal nitrogen concentration profile in the silicon oxide layer. In the silicon oxide layer, the peak nitrogen concentrations are situated away from the interface region and at least one of the peak nitrogen concentrations is situated in proximity to the surface region. A method for fabricating a semiconductor device is incorporating the nitrogen-containing silicon oxide layers also disclosed.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Inventors: Jinping Liu, Ben Ong, Zhengquan Zhang, Jae Gon Lee, Lydia Wong, Bin Yang, K. H. See, Meisheng Zhou, Liang Choo Hsia
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Patent number: 7510984Abstract: A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing a semiconductor device comprising the steps of: forming a silicon nitride film by the method as claimed in claim 1 on a substrate having the semiconductor layer, a gate insulation film selectively provided on a principal surface of the semiconductor layer, and a gate electrode provided on the gate insulation film; and removing the silicon nitride film on the semiconductor layer and the gate electrode and leaving a sidewall comprising the silicon nitride film on a side surface of the gate insulation film and the gate electrode by etching the silicon nitride film in a direction generally normal to the principal surface of the semiconductor layer.Type: GrantFiled: February 15, 2005Date of Patent: March 31, 2009Assignee: Ulvac, Inc.Inventors: Tsuyoshi Saito, Hiromi Itoh, Makiko Kitazoe
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Patent number: 7507675Abstract: A method for patterning a polished silicon surface is disclosed, the method including steps leading to an organic monolayer on at least a part of the silicon surface, the monolayer being functionalized in specific desired locations. The method can be used to produce a device comprising one or more FET structures, the gate of the FET being formed by the functionalized organic monolayer. The functionalized monolayer preferably contains oligosaccharides or oligopeptides which are capable of interacting with biological substance, such that the device acts as a bio-sensor.Type: GrantFiled: June 24, 2004Date of Patent: March 24, 2009Assignees: ASML Netherlands B.V., Wageningen UniversityInventors: Johannes Teunis Zuilhof, Klaus Simon, Ernst Jan Robert Sudholter, Qiao-Yu Sun
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Publication number: 20090068853Abstract: Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched back. This includes flowing a halogen precursor through a first conduit from a halogen-precursor source to the substrate processing chamber, forming a high-density plasma from the halogen precursor, and terminating flowing the halogen precursor after the portion has been etched back. Thereafter, a halogen scavenger is flowed to the substrate processing chamber to react with residual halogen in the substrate processing chamber. Thereafter, a second portion of the silicon oxide film is deposited over the first portion of the silicon oxide film and within the gap using a high-density plasma process.Type: ApplicationFiled: September 4, 2008Publication date: March 12, 2009Applicant: Applied Materials, Inc.Inventors: Anchuan Wang, Young S. Lee, Manoj Vellaikal, Jason Thomas Bloking, Jin Ho Jeon, Hemant P. Mungekar
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Patent number: 7501304Abstract: The present invention provides a method of cleaning a cover glass having a spacer which is to be incorporated in a solid image pickup device, comprising: a dry cleaning step performed after dry etching; a wipe-off cleaning step performed after the dry cleaning step; a primary wet cleaning step performed after the wipe-off cleaning step; and a secondary wet cleaning step performed after the primary wet cleaning step, wherein the cover glass having a spacer is fabricated by a manufacturing process including the steps of: bonding a spacer substrate to a glass substrate with an adhesive; applying a photoresist to the spacer substrate; exposing and developing the photoresist by use of a photomask and forming an etching mask corresponding to the spacer on the spacer substrate; and forming a spacer on the glass substrate by the dry etching the spacer substrate.Type: GrantFiled: September 20, 2006Date of Patent: March 10, 2009Assignee: FUJIFILM CorporationInventors: Meiki Ooseki, Kiyofumi Yamamoto, Masamichi Hara
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Patent number: 7501353Abstract: Disclosed is a method for the formation of features in a damascene process. According to the method, vias are formed in a dielectric layer and then covered by a layer of high molecular weight polymer. The high molecular weight polymer covers the vias but does not enter the vias. A trench is then etched through the high molecular weight polymer and the dielectric layer. Any remaining high molecular weight polymer is then removed.Type: GrantFiled: December 22, 2006Date of Patent: March 10, 2009Assignee: International Business Machines CorporationInventors: Wai-Kin Li, Wu-Song Huang
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Patent number: 7498271Abstract: The present invention, in one embodiment, provides a method of forming a gate structure including providing a substrate including a semiconducting device region, a high-k dielectric material present atop the semiconducting device region, and a metal gate conductor atop the high-k dielectric material, applying a photoresist layer atop the metal gate conductor; patterning the photoresist layer to provide an etch mask overlying a portion of the metal gate conductor corresponding to a gate stack; etching the metal gate conductor and the high-k dielectric material selective to the etch mask; and removing the etch mask with a substantially oxygen free nitrogen based plasma.Type: GrantFiled: June 24, 2008Date of Patent: March 3, 2009Assignee: International Business Machines CorporationInventors: Ricardo A. Donaton, Rashmi Jha, Siddarth A. Krishnan, Xi Li, Renee T. Mo, Naim Moumen, Wesley C. Natzle, Ravikumar Ramachandran, Richard S. Wise