Abstract: “A process for fabricating active and passive, polymer-based components for use in integrated optics. As a result of this process, active and passive optoelectronic components of a high quality having a high level of integration and high packing density are fabricated. A patternable polymer resist layer of a high quality is deposited onto an optoelectronic component. An etching mask is used in conjunction with a high-grade anisotropic deep etching to produce a pattern, which is filled with monomers through gas-phase or liquid-phase diffusion. The optical properties of the optical component can be selectively changed as a function of the type of monomers used for the diffusion, as well as of the temperature and application time. The process makes it possible to increase the packing density of future integrated monomode optics and simultaneously produce large quantities in a cost-effective manner.

Abstract: The average film thickness of an amorphous silicon film formed on a substrate is measured. Then, the amorphous silicon film is irradiated with a laser beam to form a polysilicon film, and the grain size distribution of the polysilicon film is measured. An optimum value of energy density of laser beam irradiation is calculated on the basis of grain size values measured at two points A and B of the polysilicon film. Then, the average film thickness of an amorphous silicon film formed on a subsequent substrate is measured. A value of energy density of laser beam irradiation for the subsequent amorphous silicon film is calculated on the basis of the two average film thicknesses. Accordingly, a uniform polysilicon film of large grain sizes is formed on the whole surface of a large-size substrate to provide polysilicon TFTs in a large area.

Abstract: The invention relates to a method for enabling repair of a defect in a substrate, particularly the invention provides a method and apparatus for enabling repair of a pattern shape in a semiconductor device, which has not been able to be practiced because of lack of a suitable method, and further provides a method for manufacturing the semiconductor device using those. A method for repairing the pattern shape of a substrate having an imperfect pattern is used, which includes (a) a step for inspecting the substrate and thus detecting the imperfect pattern, and (b) a step for repairing the pattern shape by performing etching or deposition to the detected imperfect-pattern using radiation rays. Moreover, apparatus for repairing a pattern shape of a via-hole in a wafer having an imperfect via-hole is used, which has a defect inspection section for detecting the imperfect via-hole, and an etching section for etching the imperfect via-hole using a fast atom beam.

Abstract: A process which addresses the problem of transient defects comprises first processing one or more test chips on a substrate to reveal one or more potential transient defects during subsequent processing of all of the chips on the substrate; identifying the exact locations of such potential transient defects on one or more chips of a silicon substrate; forming a file containing the coordinates of each potential transient defect on the chip; converting the file into a CAD image layer capable of displaying such potential transient defects; and displaying such potential transient defects superimposed over a CAD image of the actual circuit to permit visual inspection of the compound CAD image and to permit optional action to be taken in view of such potential transient defects.

Abstract: The present invention relates to a method of run-to-run control of a manufacturing process. A plurality of runs of the manufacturing process is performed. In each of the runs, a value of a process input is applied to the manufacturing process. A measured value of a process output of the respective run is determined. A process input quantity is calculated based on the measured value, the applied process input, a target value of the process output and at least one value of a sensitivity parameter. The sensitivity parameter describes a variation of the process output caused by a variation of the process input. The process input applied in a subsequent one of the plurality of runs is based on the process input quantity. The sensitivity parameter is modified between at least one pair of the runs of the manufacturing process.

Abstract: A method for manufacturing a microstructure, which includes at least one fine feature on an existing feature, using an NSOM laser micromachining system. A microstructure device preform is provided. A portion of its top surface is profiled with the NSOM to produce a topographical image. This profiled portion is selected to include the existing feature. An image coordinate system is defined for the profiled portion of top surface based on the topographical image. Coordinates of a reference point and the orientation of the existing feature in the image coordinate system are determined using the topographical image. The probe tip of the NSOM is aligned over a portion of the existing feature using the determined coordinates of the reference point and the orientation of the existing feature. The top surface of the microstructure device preform is machined with the micro-machining laser to form the fine feature(s) on the existing feature.

Abstract: There is provided by this invention a wafer probe for measuring plasma and surface characteristics in plasma processing environment that utilizes integrated sensors on a wafer substrate. A microprocessor mounted on the substrate receives input signals from the integrated sensors to process, store, and transmit the data. A wireless communication transceiver receives the data from the microprocessor and transmits information outside of the plasma processing system to a computer that collects the data during plasma processing. The integrated sensors may be dual floating Langmuir probes, temperature measuring devices, resonant beam gas sensors, or hall magnetic sensors. There is also provided a self-contained power source that utilizes the plasma for power that is comprised of a topographically dependent charging device or a charging structure that utilizes stacked capacitors.

Abstract: Provided is a fabrication alignment technique for a light guide screen. A plurality of light guide layers are provided. Each light guide layer includes a plurality of aligned light guides, each light guide having an input end, a midsection and an output end. The light guide layers are physically stacked. The input ends and the output ends are aligned. Vertical misalignment is detected with an optical detection device. In response to the detection of vertical misalignment, at least one light guide layer is horizontally adjusted.

Abstract: A method and an apparatus for organizing production data is provided. The method comprises performing at least one process run of semiconductor devices, and recording at least one manufacturing tag associated with the process run of semiconductor devices. The method further comprises performing metrology upon at least one process run of the semiconductor device for acquiring metrology data and for performing a metrology data stackification process upon the metrology data using the manufacturing tag for organizing and stacking the metrology data. The method further comprises modifying at least one control parameter is modified based upon the stacked metrology data.

Abstract: A method for process optimization to extend the utility of the HDP CVD gap fill technique modifies the characteristics of the HDP process (deposition and sputter components) in a dynamic mode in the course of filling a trench with dielectric material. As a result, the amount of dielectric deposited on the sidewall of the trench relative to that deposited at its bottom can be reduced and optimally minimized, thus improving the gap fill capability of the process. The dynamic modification of process characteristics provides enhanced process performance, since the optimization of these characteristics depends upon structure geometry, which is constantly changing during a gap fill operation. During the course of the gap fill operation, either at one or more discrete points or continuously, the evolution of the feature geometry is determined, either by direct measurement or in accordance with a growth model.

Abstract: A processing apparatus for processing a microelectronic workpiece includes a metrology unit and a control, signal-connected to the metrology unit. The control can modify a process recipe or a process sequence of the processing apparatus based on a feed forward or a feed back signal from the metrology unit. A seed layer deposition tool, a process layer electrochemical deposition tool, and a chemical mechanical polishing tool, arranged for sequential processing of a workpiece, can be controlled as an integrated system using one or more metrology units. A metrology unit can be located at each tool to measure workpiece parameters. Each of the metrology units can be used as a feed forward control and/or a feed back control at each of the tools.

Abstract: A method of manufacturing a light emitting semiconductor package on a semiconductor wafer 252 which includes a plurality of light emitting devices 254 residing on or in a surface of the semiconductor wafer, the method comprising the steps of: forming at least one first hollow cap 256, each first hollow cap 256 formed to provide: a central portion 260 and first perimeter walls extending from the perimeter edge of the central portion with the free edges of the first perimeter walls adapted to be bonded to the surface of the semiconductor wafer 252 to provide a first cavity; at least one region 258 of the central portion 260 which is substantially transparent or translucent to electromagnetic radiation; aligning the at least one first cap with a corresponding at least one light emitting device using a tool having the same coefficient of thermal expansion as the wafer; bonding the at least one first hollow cap 256 to the semiconductor wafer 252, the central portion overlying at least one of the plurality of light

Abstract: A method of calculating a quantity of light by measuring, by using an adhering force measuring unit (71), the adhering force of an ultraviolet light-curable tape (11 or 21) relying upon the quantity of ultraviolet light with which the ultraviolet light-curable tape is irradiated from an ultraviolet light irradiation unit (61), and calculating, by using a calculation unit, the quantity of ultraviolet light corresponding to a predetermined adhering force, from the measured adhering force of the ultraviolet light-curable tape, and a device therefor. The predetermined adhering force may have been stored in advance in the storage unit or the predetermined adhering force may be determined in advance relying upon at least either one of the kind of the ultraviolet light-curable tape or the elapsed time of the ultraviolet light-curable tape.

Abstract: Systems and/or methods are disclosed for measuring and/or controlling an amount of impurity that is dissolved within an immersion medium employed with immersion lithography. The impurity can be photoresist from a photoresist layer coated upon a substrate surface. A known grating structure is built upon the substrate. A real time immersion medium monitoring component facilitates measuring and/or controlling the amount of impurities dissolved within the immersion medium by utilizing light scattered from the known grating structure.

Abstract: A method of producing a crystalline substrate based device includes forming a microstructure on a crystalline substrate. At least one packaging layer is sealed over the microstructure by an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer.

Abstract: The invention describes a method and apparatus for deploying micromachined actuators in a plane which is orthogonal to the original fabrication plane of the devices. Using batch-processing, photolithographic procedures known in the micromachined electro-mechanical system (MEMS) art, a plurality of devices is constructed on a suitable substrate. The devices are then separated one from another by sawing and dicing the original fabrication wafer. The devices are rotated into an orthogonal orientation and affixed to a second wafer. The second wafer also contains circuitry for addressing and manipulating each of the devices independently of the others. With this method and apparatus, arrays of actuators are constructed whose plane of actuation is perpendicular to the plane of the array. This invention is useful for constructing N×M fiber optic switches, which direct light from N input fibers into M output fibers.

Abstract: A property of a layer is measured by: (1) focusing a heating beam on a region (also called “heated region”) of a conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of an optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer. Change in measurement across regions indicates a corresponding change in resistance of the layer.

Abstract: A method of determining temperatures at localized regions of a substrate during processing of the substrate in a photolithography process includes the following steps: independently illuminating a photoresist layer including a photoresist pattern at a plurality of locations on the substrate with a light source, so that light is diffracted off the plurality of locations of the photoresist pattern; measuring the diffracted light from the plurality of locations to determine measured diffracted values associated with respective locations from the plurality of locations; and comparing the measured diffracted values against a library to determine a pre-illumination process temperature of the photoresist layer at the plurality of locations.

Abstract: Techniques for identifying, locating, detecting, and reviewing voltage contrast defects are described. A system for implementing the present invention includes a charged particle beam defect review system with one or more installed electron flood guns. In order to review a semiconductor specimen, an entire semiconductor wafer or a sub-region of a wafer is flooded with electrons from the flood gun(s) so that the wafer surface is charged to a certain voltage level. Flooding the specimen greatly enhances the effect of voltage contrast review techniques and therefore manifests voltage contrast defects that would not appear otherwise. The inventive techniques can also be applied so that a review system can be used to inspect at least a portion of a semiconductor wafer. Techniques for controlling the amount of negative charge applied to the specimen are also described.

Abstract: The present invention provides for a method and an apparatus for performing field-to-field compensation during semiconductor manufacturing. At least one semiconductor device is processed. Metrology data is collected from the processed semiconductor device. A field-to-field metrology analysis is performed based upon the metrology data. Residual-error analysis is performed based upon the field-to-field analysis.

Abstract: A method for monitoring polishing process parameters for an integrated circuit structure on a substrate. A first metrology site is constructed on the substrate. The first metrology site represents a design extreme of a high density integrated circuit structure. The first metrology site is formed by placing a relatively small horizontal surface area trench within a relatively large surface area field of a polish stop material. A second metrology site is also constructed on the substrate. The second metrology site represents a design extreme of a low density integrated circuit structure. The second metrology site is formed by placing a relatively large horizontal surface area trench within a relatively small surface area field of a polish stop material. The substrate is covered with a layer of an insulating material, thereby at least filling the trenches.

Abstract: The invention relates to a method and apparatus for detecting defects in a semiconductor or silicon structure at room temperature, and in an efficient time, using photoluminescence. The invention employs the use of a high intensity beam of light preferably having a spot size between 0.1 mm–0.5 microns and a peak or average power density of 104–109 w/cm2 with a view to generating a high concentration of charge carriers, which charge characters detect defects in a semiconductor by interacting with same. These defects are visible by producing a photoluminescence image of the semiconductor. Several wavelengths may be selected to identify defects at a selective depth as well as confocal optics may be used.

Abstract: A system and method for providing power to a light-powered transponder. In order to create a sufficient voltage differential, two different photovoltaic elements are used. The photovoltaic elements generate voltages of different polarities. Because the photovoltaic elements are used independently to generate voltages with different polarities, the present system can achieve a desired voltage differential despite the inherent difficulties presented by the use of a standard CMOS process.

Abstract: A method for aligning existing layers formed prior to a new layer and the new layer in forming the new layer on a wafer 4, wherein a microscope 6 as a first measurement condition and a microscope 7 as a second measurement condition are used, and marks 4a and 4b formed in each of said existing layers are measured by switching the first and second conditions, and said existing layers and said new-layer are aligned based on measurement of mark position of each of said existing layers, and the microscope 7 has a plurality of measurement conditions as optical characteristics, and the measurement conditions are switched.

Abstract: A method of forming an integrated microelectronic device and a micro channel is provided. The method offers an inexpensive way of integrating devices that are usually incompatible during fabrication, a microchannel and a microelectronic structure such as an electro-optic light source, a detector or a MEMs device into a single integrated structure.

Abstract: In an annealing process in which laser light is irradiated to a semiconductor thin film, a refractive index of the semiconductor thin film after laser light irradiation is measured and conditions for the next laser light irradiation are adjusted based on the measured refractive index value. For example, laser light irradiation conditions are adjusted so that semiconductor thin films always have the same refractive index. As a result, the annealing can be performed under the same conditions at every laser light irradiation even if the laser light irradiation conditions vary unavoidably.

Abstract: A multi-layer immersion medium monitoring system for a lithographic process monitors characteristics of an immersion medium of a semiconductor manufacturing process. The multi-layer immersion medium includes at least a first liquid of a first density (or viscosity) and a second liquid of a lower density (or viscosity), both of which are interspersed between a final optical component and a semiconductor layer. The higher density layer is provided to reduce turbulence in the immersion medium during the lithographic processes. A scatterometry system monitors optical characteristics of the multi-layer immersion medium to effectuate control of a lithographic process.

Abstract: A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising visually imaging a portion of the image on the lower layer and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.

Abstract: A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising: visually imaging a portion of the image on the lower layer; and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.

Abstract: Bright and dark field imaging operations in an optical inspection system occur along substantially the same optical path using the same light source by producing either a circular or an annular laser beam. Multiple beam splitting is achieved through the use of a diffractive optical element having uniform diffraction efficiency. A confocal arrangement for bright field and dark field imaging can be applied with multiple beam scanning for suppressing the signal from under-layers. A scan direction not perpendicular to the direction of movement of a target provides for improved die-to-die comparisons.

Abstract: A method of inspecting a plurality of wafers in an optical inspection tool. The method includes the steps of generating a reference wafer and polishing the reference wafer in a chemical mechanical polishing process following a metal deposition process such that the reference wafer is representative of a fully polished wafer. The optical inspection tool scans the reference wafer and a gray level map is generated. A number of further wafers are metalized, polished, scanned and gray level maps generated. The method includes the step of comparing a gray level map of the scanned reference wafer to a number of gray level maps of the scanned wafers. A determination (314) is then made as to whether the wafer exhibits an acceptable polishing quality based on the comparison.

Abstract: A semiconductor device includes a first insulation layer including a first conductor pattern, a second insulation layer formed on the first insulation layer and including a second conductor pattern, and a third conductor pattern formed on the second insulation layer, wherein there is formed a first alignment mark part in the first insulation layer by a part of the first conductor pattern, the third conductor pattern is formed with a second alignment mark part corresponding to the first alignment mark part, the first and second alignment marks forming a mark pair for detecting alignment of the first conductor pattern and the third conductor pattern, the second conductor pattern being formed in the second insulation layer so as to avoid the first alignment mark part.

Abstract: A method for checking a wire bonding recipe is provided. Generally, coordinate data of a master recipe is stored. Coordinate data of a slave recipe is stored. The coordinate data of the slave recipe is compared with coordinate data of the master recipe. An error signal is provided if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe. A computer readable medium containing program instructions for checking a wire bonding recipe is also provided. The program contains computer readable code for storing coordinate data of a master recipe, computer readable code for storing coordinate data of a slave recipe, computer readable code for comparing the coordinate data of the slave recipe with coordinate data of the master recipe, and computer readable code for providing an error signal if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe.

Abstract: A rapid thermal annealing (“RTA”) process providing for an RTA equipment is disclosed. The RTA equipment has a pyrometer providing for measuring an operation parameter, e.g., a temperature of the RTA process. The RTA process comprises steps of proceeding a first RTA step to a wafer in the RTA equipment, then comparing a measured value of the operation parameter with a reference range of value of the operation parameter, thereafter proceeding a second RTA step to the wafer in the RTA equipment when the measured value of the operation parameter is in between the reference range of value of the operation parameter. When the measured value of the operation parameter is out of the reference range of value of the operation parameter, the RTA equipment is turned off, and the wafer is unloaded from the RTA equipment and loaded into another RTA equipment to complete the RTA process.

Abstract: The present invention is generally directed to various methods of controlling optical properties of a capping insulating layer on memory devices, and system for performing same. The method includes forming a first capping layer that includes at least one process layer above a memory cell formed above a first semiconducting substrate, measuring at least one optical characteristic of the first capping layer and determining at least one parameter of a deposition process to form a second capping layer that includes at least one process layer above a memory cell formed above a second semiconducting substrate based upon the measured optical characteristic of the first capping layer.

Abstract: A method for detecting a passivation pinhole includes forming an oxide vertical cavity surface-emitting laser (VCSEL) having an oxidation cavity, forming a passivation layer over a surface of the oxidation cavity, exposing the oxide VCSEL to an etchant vapor, and inspecting the oxide VCSEL for a defect caused by the etchant vapor.

Abstract: Methods of etching a semiconductor structure using ion milling with a variable-position endpoint detector to unlayer multiple interconnect layers, including low-k dielectric films. The ion milling process is controlled for each material type to maintain a planar surface with minimal damage to the exposed materials. In so doing, an ion beam mills a first layer and detects an endpoint thereof using an optical detector positioned within the ion beam adjacent the first layer to expose a second layer of low-k dielectric film. Once the low-k dielectric film is exposed, a portion of the low-k dielectric film may be removed to provide spaces therein, which are backfilled with a material and polished to remove the backfill material and a layer of the multiple interconnect metal layers. Still further, the exposed low-k dielectric film may then be removed, and the exposed metal vias polished.

Abstract: A method and apparatus is provided for determining workpiece drift from its nominal or intended position. The apparatus includes two proportionate sensors, each of which gives an output reading that depends upon how much of the sensor beam is blocked by an edge of the workpiece. A computer can calculate positional drift based upon these readings. Also disclosed is a method for aligning proportionate sensors to be parallel to one another.

Abstract: A transfer robot (5) for thin substrate capable of efficiently detecting the stored state of thin substrates and an inspection method for thin substrate capable of accurately detecting the stored state of thin substrates; the robot (5), comprising an inspection camera (1) for detecting the stored state of the thin substrates (3) in a storage cassette (2), wherein the plurality of thin substrates (3) stored in the storage cassette (2) are carried out from the storage cassette (2) by the robot.

Abstract: A chemical mechanical polishing apparatus has a polishing pad, a carrier to hold a substrate against a first side of the polishing surface, and a motor coupled to at least one of the polishing pad and carrier head for generating relative motion therebetween. An eddy current monitoring system is positioned to generate an alternating magnetic field in proximity to the substrate, an optical monitoring system generates a light beam and detects reflections of the light beam from the substrate, and a controller receives signals from the eddy current monitoring system and the optical monitoring system.

Abstract: A method of fabricating final spacers having a target width comprises the following steps. Initial spacers, each having an initial width that is less than the target width, are formed over the opposing side walls of a gate electrode portion. The difference between the initial spacer width and the target width is determined. A second spacer layer having a thickness equal to the determined difference between the initial width of the initial spacers and the target width is formed upon the initial spacers and the structure. The second spacer layer is etched to leave second spacer layer portions extending from the initial spacers to form the final spacers.

Abstract: A photonic digital-to-analog converter employing a plurality of heterojunction thyristor devices that are configured to convert a digital word encoded by a parallel digital optical signal (e.g., a plurality of synchronous optical bits) to an output analog electrical signal whose magnitude corresponds to the digital word. Each heterojunction thyristor device is configured to convert an optical bit in the digital word to a corresponding digital electrical signal. The voltage levels (e.g., magnitudes) of the ON state of the digital electrical signals produced by the heterojunction thyristor devices may be supplied by voltage divider networks coupled between the cathode terminal of the devices and ground potential or voltage reference sources coupled to the input terminals of the heterojunction thyristor devices. In this manner, electrical signals whose magnitude corresponds to contribution of each optical bit in the digital word are produced.

Abstract: To reduce a stop time of transportation of wafers which occurs when one stepper handles many kinds of products, before exposure of semiconductor wafers of a first cassette port 7a is completed, a process recipe for semiconductor wafers of a second cassette port 7b is obtained from a host computer 2, the progress of the exposure of the semiconductor wafers of the first cassette port 7a is detected via a sequencer 5, it is determined, based on the obtained process recipe, whether or not the semiconductor wafers of the second cassette port 7b can be transported to an exposure stage following the last semiconductor wafer of the first cassette port 7a, and a stepper 1 is caused to perform exposure in accordance with the determination result and the progress detection result.

Abstract: A laser beam machining method and a laser beam machining device capable of cutting a work without producing a fusing and a cracking out of a predetermined cutting line on the surface of the work, wherein a pulse laser beam is radiated on the predetermined cut line on the surface of the work under the conditions causing a multiple photon absorption and with a condensed point aligned to the inside of the work, and a modified area is formed inside the work along the predetermined determined cut line by moving the condensed point along the predetermined cut line, whereby the work can be cut with a rather small force by cracking the work along the predetermined cut line starting from the modified area and, because the pulse laser beam radiated is not almost absorbed onto the surface of the work, the surface is not fused even if the modified area is formed.

Abstract: A method of manufacturing an organic light-emitting device having reduced ambient-light reflection is disclosed. The method comprises the following steps. First, a metal reflective layer is formed on a provided substrate. Then a transparent anode, an organic layer, a translucent electron-injecting cathode, a buffer layer and a transparent electrode are sequentially deposited on the metal reflective layer. In order to reduce the affect of the ambient-light reflection, adjusting the thickness of the aforementioned layers that the reflected lights generate destructive optical interference and improve the visually perceived contrast of the emitted light.

Abstract: A microelectromechanical system (MEMS) device is created by forming mechanical structures supported by a substrate having a bond ring area laterally spaced from the mechanical structures and having a sacrificial layer surrounding the mechanical structures. A bond ring material is formed on top of the sacrificial layer and the bond ring area. Some of the bond ring material is then removed to create a bond ring.

Abstract: Concerning a plurality of wafers which compose one lot, amounts of misalignment between alignment marks of these wafers and alignment patterns transferred on photoresists are measured in advance, and then, a mutual relation between a thickness of an interlayer dielectric film and a value of Wafer Scaling is calculated. When exposure is actually executed, first, an interlayer dielectric film is formed on the alignment marks in a lot and planarized. After that, the thickness of the interlayer dielectric film after planarization is measured. The value of the Wafer Scaling is estimated from an average value of the thicknesses of the interlayer dielectric films in the lot and the above-mentioned mutual relation. Then, photoresists are coated on the interlayer dielectric films in the lot, and the photoresists are exposed while the correction is executed so as to compensate the value of the Wafer Scaling.

Abstract: A process which addresses the problem of transient defects comprises first processing one or more test chips on a substrate to reveal one or more potential transient defects during subsequent processing of all of the chips on the substrate; identifying the exact locations of such potential transient defects on one or more chips of a silicon substrate; forming a file containing the coordinates of each potential transient defect on the chip; converting the file into a CAD image layer capable of displaying such potential transient defects; and displaying such potential transient defects superimposed over a CAD image of the actual circuit to permit visual inspection of the compound CAD image and to permit optional action to be taken in view of such potential transient defects.

Abstract: The amount of usefully captured light in an optical system may be increased by concentrating light in a region where it can be collected by the optical system. A light emitting device may include a substrate and a plurality of semiconductor layers. In some embodiments, a reflective material overlies a portion of the substrate and has an opening through which light exits the device. In some embodiments, reflective material overlies a portion of a surface of the semiconductor layers and has an opening through which light exits the device. In some embodiments, a light emitting device includes a transparent member with a first surface and an exit surface. At least one light emitting diode is disposed on the first surface. The transparent member is shaped such that light emitted from the light emitting diode is directed toward the exit surface.

Abstract: A method and apparatus for measuring a potential difference for plasma processing with a plasma processing apparatus that processes a sample by introducing a gas into a vacuum chamber and generates plasma. A light-emitting portion is formed on a measurement-use sample of the sample to be processed and a current flows into the light-emitting portion according to a potential difference that has been generated across the light-emitting portion. An intensity of light emitted from the light-emitting portion according to a predetermined light intensity is measured and a potential difference on the measurement-use sample according to a predetermined light intensity is measured.