Optical Characteristic Sensed Patents (Class 438/7)
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Publication number: 20090148964Abstract: A method for determining conditions for forming a dielectric SiOCH film, includes: (i) forming a dielectric SiOCH film on a substrate under conditions; (ii) evaluating the conditions using a ratio of Si—CH3 bonding strength to Si—O bonding strength of the film as formed in step (i); (iii) if the ratio is 2.50 % or higher, confirming the conditions, and if the ratio is less than 2.50 %, changing the conditions by changing at least one of the susceptor temperature, the distance between upper and lower electrodes, the RF power, and the curing time; and (iv) repeating steps (i) to (iii) until the ratio is 2.50 % or higher.Type: ApplicationFiled: December 7, 2007Publication date: June 11, 2009Applicant: ASM JAPAN K.K.Inventors: Naoto Tsuji, Kiyohiro Matsushita, Manabu Kato, Noboru Takamure
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Patent number: 7544619Abstract: An insulating film is formed on a main surface of a substrate. A conductive film is formed on the insulating film. A lower layer resist film, an intermediate layer, an anti-reflection film and an upper layer resist film are formed on the conductive film. A focal point at a time of exposure is detected by detecting a height of the upper layer resist film. In detecting the focal point at the time of exposure, a focal point detection light is radiated on the upper layer resist film. After detecting the focal point, the upper layer resist film is exposed and developed thereby to form a resist pattern. With the resist pattern as a mask, the intermediate layer and the anti-reflection film are patterned, and the lower layer resist film is developed. With these patterns as a mask, the conductive film is etched thereby to form a gate electrode.Type: GrantFiled: September 26, 2006Date of Patent: June 9, 2009Assignee: Renesas Technology Corp.Inventor: Takeo Ishibashi
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Patent number: 7541201Abstract: Disclosed are overlay targets having flexible symmetry characteristics and metrology techniques for measuring the overlay error between two or more successive layers of such targets. In one embodiment, a target includes structures for measuring overlay error (or a shift) in both the x and y direction, wherein the x structures have a different center of symmetry (COS) than the y structures. In another embodiment, one of the x and y structures is invariant with a 180° rotation and the other one of the x and y structures has a mirror symmetry. In one aspect, the x and y structures together are variant with a 180° rotation. In yet another example, a target for measuring overlay in the x and/or y direction includes structures on a first layer having a 180 symmetry and structures on a second layer having mirror symmetry.Type: GrantFiled: September 14, 2005Date of Patent: June 2, 2009Assignee: KLA-Tencor Technologies CorporationInventor: Mark Ghinovker
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Patent number: 7541230Abstract: Laser beams emitted by a plurality of laser sources are divided into a plurality of sub-beams, which are irradiated onto selected portions of an amorphous semiconductor on a substrate to crystallize the amorphous semiconductor. A difference in diverging angles between the laser beams is corrected by a beam expander. The apparatus includes a sub-beam selective irradiating system including a sub-beam dividing assembly and a sub-beam focussing assembly. Also, the apparatus includes laser sources, a focussing optical system, and a combining optical system. A stage for supporting a substrate includes a plurality of first stage members, a second stage member disposed above the first stage members, and a third stage member 38C, rotatably disposed above the second stage to support an amorphous semiconductor.Type: GrantFiled: July 10, 2006Date of Patent: June 2, 2009Assignee: Sharp Kabushiki KaishaInventors: Nobuo Sasaki, Koichi Ohki
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Patent number: 7537941Abstract: Embodiments of the invention provide a method, structure, service, etc. for variable overlap of dummy shapes for improved rapid thermal anneal uniformity. A method of providing uniform temperatures across a limited region of a wafer during a rapid thermal anneal process comprises determining a first reflectivity in a first portion of the limited region by measuring a density of first structures in the first portion. Next, the method determines a second reflectivity in a second portion of the limited region by measuring a density of second structures in the second portion. Specifically, the first structures comprise diffusion fill shapes and polysilicon conductor fill shapes (non-active dummy structures); and, the second structures comprise active circuit structures.Type: GrantFiled: June 7, 2006Date of Patent: May 26, 2009Assignee: International Business Machines CorporationInventors: Brent A. Anderson, Howard S. Landis, Edward J. Nowak
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Publication number: 20090117672Abstract: A method of fabricating a light emitting device having a specific target color, CIE xy, of emitted light is described. The device comprises a light emitting diode that is operable to emit light of a first wavelength range and at least one phosphor material which converts at least a part of the light into light of a second wavelength range wherein light emitted by the device comprises the combined light of the first and second wavelength ranges. The method comprises: depositing a pre-selected quantity of the at least one phosphor material on a light emitting surface of the light emitting diode; operating the light emitting diode; measuring the color of light emitted by the device; comparing the measured color with the specific target color; and depositing and/or removing phosphor material to attain the desired target color.Type: ApplicationFiled: October 1, 2007Publication date: May 7, 2009Applicant: Intematix CorporationInventors: James Caruso, Charles O. Edwards
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Publication number: 20090104719Abstract: A method of in-situ monitoring of a plasma doping process includes generating a plasma comprising dopant ions in a chamber proximate to a platen supporting a substrate. A platen is biased with a bias voltage waveform having a negative potential that attracts ions in the plasma to the substrate for plasma doping. A dose of ions attracted to the substrate is measured. At least one sensor measurement is performed to determine the condition of the plasma chamber. In addition, at least one plasma process parameter is modified in response to the measured dose and in response to the at least one sensor measurement.Type: ApplicationFiled: October 23, 2007Publication date: April 23, 2009Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Atul Gupta, Timothy Miller, Harold M. Persing, Daniel Distaso, Vikram Singh
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Publication number: 20090104720Abstract: Provided are a photoresist coating apparatus and a method of coating photoresist using the same. The apparatus includes a photoresist supply line through which photoresist is supplied. A fluid control valve is connected to the photoresist supply line to control the flow of the photoresist. A nozzle assembly is connected to the photoresist supply line at a rear end of the fluid control valve. The nozzle assembly includes a nozzle located above the center of a semiconductor wafer loaded in a photoresist coating unit to spray the photoresist. A camera is located outside the photoresist coating unit to monitor the shape or spraying amount of the nozzle located at the tip of the nozzle assembly. A controller converts data monitored by the camera into an electric signal and processes the electric signal.Type: ApplicationFiled: March 30, 2007Publication date: April 23, 2009Applicant: Nanofa Co., LtdInventors: Young-Joon Seo, Young-Jong Kwon
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Publication number: 20090098665Abstract: Exemplary embodiments provide methods for implementing an ultra-high temperature (UHT) anneal on silicon germanium (SiGe) semiconductor materials by co-implanting carbon into the SiGe material prior to the UHT anneal. Specifically, the carbon implantation can be employed to increase the melting point of the SiGe material such that an ultra high temperature can be used for the subsequent anneal process. Wafer warpage can then be reduced during the UHT anneal process and potential lithographic mis-alignment for subsequent processes can be reduced. Exemplary embodiments further provide an inline control method, wherein the wafer warpage can be measured to determine the litho-mis-alignment and thus to control the fabrication process. In various embodiments, the disclosed methods can be employed for the fabrication of source/drain extension regions and/or source/drain regions of transistor devices, and/or for the fabrication of base regions of bipolar transistors.Type: ApplicationFiled: October 15, 2007Publication date: April 16, 2009Inventors: Haowen BU, Scott Gregory Bushman, Periannan Chidambaram
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Patent number: 7517705Abstract: The invention relates to a phosphorus-containing polymer for coating dielectric materials, to processes for its preparation and to its use, as well as to an optical signal transducer having a coating of the polymer and to its use.Type: GrantFiled: August 21, 2006Date of Patent: April 14, 2009Assignee: Bayer AktiengesellschaftInventors: Ingmar Dorn, Burkhard Kohler
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Publication number: 20090093071Abstract: A thermal treatment apparatus having a first light source emitting a first light having light diffusion property, a reflectance measuring unit irradiating a treatment target with the light from plural directions by the first light source and determining a light reflectance of the treatment target, a light irradiation controller adjusting an intensity of a second light of a second light source on the basis of the light reflectance, the second light has diffusion property, and a thermal treatment unit irradiating the treatment target with the second light having adjusted the intensity of the second light by the light irradiation controller.Type: ApplicationFiled: October 6, 2008Publication date: April 9, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Tomohiro KUBO
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Patent number: 7514940Abstract: A system and method are disclosed for determining the effective channel width (Weff) and the effective channel length (Leff) of metal oxide semiconductor devices. One advantageous embodiment of the method provides a plurality of metal oxide semiconductor field effect transistor capacitors in which each capacitor has a same value of drawn channel length but a different value of drawn channel width. A value of Fowler-Nordheim tunneling current is measured from each capacitor. Channel width offset is the difference between the drawn channel width and the effective channel width. A value of channel width offset is obtained from the measured values of the Fowler-Nordheim tunneling currents and used to determine the value of effective channel width. A similar method is used to determine the value of the effective channel length.Type: GrantFiled: December 13, 2006Date of Patent: April 7, 2009Assignee: National Semiconductor CorporationInventor: Jiankang Bu
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Patent number: 7514277Abstract: An etching method capable of controlling the film thickness of a hard mask layer uniformly is provided. A plasma etching is performed on a native oxide film by using an etching gas containing, for example, CF4 and Ar while a thickness of a silicon nitride film is being monitored and the etching is finished when the thickness of the silicon nitride film reaches a predetermined value. Then, a plasma etching is performed on a silicon substrate by employing an etching gas containing, for example, Cl2, HBr and Ar and using the silicon nitride film as a mask while a depth of a trench is being monitored and the etching is finished when the depth of the trench reaches a specified value.Type: GrantFiled: September 14, 2005Date of Patent: April 7, 2009Assignee: Tokyo Electron LimitedInventors: Susumu Saito, Akitaka Shimizu
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Publication number: 20090087928Abstract: A method of monitoring copper contamination. The method includes method, comprising: (a) ion-implanting an N-type dopant into a region of single-crystal silicon substrate, the region abutting a top surface of the substrate; (c) activating the N-type dopant by annealing the substrate at a temperature of 500° C. or higher in an inert atmosphere; (c) submerging, for a present duration of time, the substrate into an aqueous solution, the aqueous solution to be monitored for copper contamination; and (d) determining an amount of copper adsorbed from the aqueous solution by the region of the substrate.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Inventors: Jay Sanford Burnham, Joseph Kerry Vaughn Comeau, Leslie Peter Crane, James Randall Elliott, Scott Alan Estes, James Spiros Nakos, Eric Jeffrey White
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Publication number: 20090081813Abstract: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction mirror arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.Type: ApplicationFiled: September 26, 2007Publication date: March 26, 2009Inventors: Axel Aguado Granados, Benjamin Aaron Fox, Nathaniel James Gibbs, Andrew Benson Maki, Trevor Joseph Timpane
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Publication number: 20090081814Abstract: An integrated manufacturing system comprising: providing a substrate; forming a gate over the substrate; measuring a gate length of the gate; forming a first spacer adjacent the gate; measuring a spacer critical dimension of the spacer; and adjusting a dose of an implant based on the gate length and the spacer critical dimension for a source/drain region.Type: ApplicationFiled: September 26, 2007Publication date: March 26, 2009Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.Inventors: Ming Lei, Ricky Seet, Young Tai Kim, Lieyong Yang, Chee Kong Leong, Sean Lian
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Publication number: 20090075402Abstract: A method, system or the like which may, for example, be exploited as part of known methods, systems and/or apparatii which manipulate (i.e. tune, modify, change, create, etc.) the impedance of (integrated) semiconductor components or devices by exploiting a focused heating source. The method, system or the like exploits in situ optical measurements for the modification of the energy output of a focused heating source, such as for example of a (pulsed) laser heat source. The energy input to the focused heating source may be manipulated as a function of an optical measurement so as to obtain a desired or necessary energy output (e.g. target energy output) from the focused heating source.Type: ApplicationFiled: September 18, 2007Publication date: March 19, 2009Inventors: Michel Meunier, Stephane Laforte
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Publication number: 20090072144Abstract: Exemplary embodiments provide an infrared (IR) retinal system and method for making and using the IR retinal system. The IR retinal system can include adaptive sensor elements, whose properties including, e.g., spectral response, signal-to-noise ratio, polarization, or amplitude can be tailored at pixel level by changing the applied bias voltage across the detector. “Color” imagery can be obtained from the IR retinal system by using a single focal plane array. The IR sensor elements can be spectrally, spatially and temporally adaptive using quantum-confined transitions in nanoscale quantum dots. The IR sensor elements can be used as building blocks of an infrared retina, similar to cones of human retina, and can be designed to work in the long-wave infrared portion of the electromagnetic spectrum ranging from about 8 ?m to about 12 ?m as well as the mid-wave portion ranging from about 3 ?m to about 5 ?m.Type: ApplicationFiled: August 1, 2008Publication date: March 19, 2009Inventors: Sanjay Krishna, Majeed M. Hayat, J. Scott Tyo, Woo-Yong Jang
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Publication number: 20090075403Abstract: The present invention relates to monitoring chemicals in a process chamber using a spectrometer having a plasma generator, based on patterns over time of chemical consumption. The relevant patterns may include a change in consumption, reaching a consumption plateau, absence of consumption, or presence of consumption. In some embodiments, advancing to a next step in forming structures on the workpiece depends on the pattern of consumption meeting a process criteria. In other embodiments, a processing time standard is established, based on analysis of the relevant patterns. Yet other embodiments relate to controlling work on a workpiece, based on analysis of the relevant patterns. The invention may be either a process or a device including logic and resources to carry out a process.Type: ApplicationFiled: November 24, 2008Publication date: March 19, 2009Applicant: Lightwind CorporationInventors: Gary B. Powell, Herbert E. Litvak
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Patent number: 7498106Abstract: A method for controlling etch processes during fabrication of semiconductor devices comprises tests and measurements performed on non-product and product substrates to define an N-parameter CD control graph that is used to calculate a process time for trimming a patterned mask to a pre-determined width. An apparatus for performing such a method.Type: GrantFiled: October 31, 2005Date of Patent: March 3, 2009Assignee: Applied Materials, Inc.Inventors: David S L Mui, Wei Liu, Hiroki Sasano
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Publication number: 20090053834Abstract: One embodiment of the present invention relates to a method of forming an integrated circuit, comprising forming an STI structure in a semiconductor body, the STI structure having a divot characteristic, performing scatterometry on the STI structure and obtaining signature spectra associated therewith, and continuing fabrication of the integrated circuit when the obtained signature spectra satisfies a predetermined performance specification.Type: ApplicationFiled: August 23, 2007Publication date: February 26, 2009Inventor: Vladimir Alexeevich Ukraintsev
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Patent number: 7493713Abstract: An image sensor and related method of fabrication are disclosed. The image sensor comprises a plurality of photoelectric conversion regions disposed in a predetermined field of a semiconductor substrate, color filters arranged on the photoelectric conversion regions, and a reflection protection structure disposed between the photoelectric conversion regions and the color filters. The reflection protection structure comprises portions having different thicknesses in relation to the color filters.Type: GrantFiled: January 19, 2006Date of Patent: February 24, 2009Assignee: Samsung Electronics Co., Ltd.Inventor: Young-Hoon Park
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Publication number: 20090033362Abstract: In one aspect, a method of forming a structure on a substrate is disclosed. For example, the method includes forming a first mask layer and a second mask layer, modifying a material property in regions of the first and second mask layers, and forming the structure based on the modified regions.Type: ApplicationFiled: July 31, 2007Publication date: February 5, 2009Inventors: Dirk Manger, Stephan Wege, Rolf Weis, Christoph Noelscher
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Publication number: 20090035878Abstract: There are provided a plasma doping method and apparatus which is excellent in a repeatability and a controllability of an implanting depth of an impurity to be introduced into a sample or a depth of an amorphous layer. A plasma doping method of generating a plasma in a vacuum chamber and colliding an ion in the plasma with a surface of a sample to modify a surface of a crystal sample to be amorphous, includes the steps of carrying out a plasma irradiation over a dummy sample to perform an amorphizing treatment together with a predetermined number of samples, irradiating a light on a surface of the dummy sample subjected to the plasma irradiation, thereby measuring an optical characteristic of the surface of the dummy sample, and controlling a condition for treating the sample in such a manner that the optical characteristic obtained at the measuring step has a desirable value.Type: ApplicationFiled: March 30, 2006Publication date: February 5, 2009Inventors: Yuichiro Sasaki, Tomohiro Okumura, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno
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Publication number: 20090035879Abstract: An object is to provide a laser dicing apparatus and a laser dicing method capable of speedily performing high-quality dicing without causing any working defect even in a case where wafers varying in thickness are supplied. The laser dicing apparatus is provided with a measuring device which measures thickness of a wafer W, a recording device which stores a database in which modified region forming conditions associated with different thicknesses of the wafer W are described, and a control device which controls the laser dicing apparatus by automatically selecting, from the database, on the basis of the thickness of the wafer measured by the measuring device, the modified region forming conditions corresponding to the measured thickness of the wafer W. The optimum modified region forming conditions are thereby automatically set, so that even in a case where wafers W differing in thickness are supplied, high-quality dicing can be speedily performed without causing a working defect.Type: ApplicationFiled: September 26, 2006Publication date: February 5, 2009Applicant: TOKYO SEIMITSU CO., LTD.Inventor: Yasuyuki Sakaya
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Publication number: 20090035880Abstract: There is disclosed a manufacturing method for exposure mask, which comprises acquiring a first information showing surface shape of surface of each of a plurality of mask substrates, and a second information showing the flatness of the surface of each of mask substrates before and after chucked on a mask stage of an exposure apparatus, forming a corresponding relation of each mask substrate, the first information and the second information, selecting the second information showing a desired flatness among the second information of the corresponding relation, and preparing another mask substrate having the same surface shape as the surface shape indicated by the first information in the corresponding relation with the selected second information, and forming a desired pattern on the above-mentioned another mask substrate.Type: ApplicationFiled: September 19, 2008Publication date: February 5, 2009Inventor: Masamitsu Itoh
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Patent number: 7482177Abstract: A method for manufacturing an optical device includes the steps of: forming a first multilayer film, including forming a first mirror above a substrate, forming an active layer above the first mirror, forming a second mirror above the active layer, forming a semiconductor layer on the second mirror, and forming a sacrificial layer on the semiconductor layer; conducting a first examination step of conducting a reflectance examination on the first multilayer film; forming a second multilayer film by removing the sacrificial layer from the first multilayer film; conducting a second examination step of conducting a reflection coefficient examination on the second multilayer film; and patterning the second multilayer film to form a surface-emitting laser section having the first mirror, the active layer and the second mirror, and a diode section having the semiconductor layer, wherein the sacrificial layer is formed to have an optical film thickness of an odd multiple of ?/4, where ? is a design wavelength of lighType: GrantFiled: June 27, 2007Date of Patent: January 27, 2009Assignee: Seiko Epson CorporationInventor: Yasutaka Imai
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Publication number: 20090020773Abstract: A method of manufacturing a semiconductor light emitting device. The method includes: mounting a semiconductor light emitting element on a flat substrate; covering the semiconductor light emitting element on the flat substrate by a cover layer in a domed shape to form a light emitting device, the cover layer including at least a phosphor layer and a coating resin layer that are laminated in order, so as to fill around the semiconductor light emitting element; measuring an emission condition of the light emitting device; and forming a convex lens unit on the outermost of the coating resin layer using a liquid droplet discharging apparatus to adjust an emission distribution of the light emitting device based on the measured emission condition.Type: ApplicationFiled: May 16, 2008Publication date: January 22, 2009Inventors: Yuko NOMURA, Kenichi Mori, Isao Takasu, Keiji Sugi, Isao Amemiya, Miho Yoda
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Publication number: 20090023229Abstract: A method for managing UV irradiation for curing a semiconductor substrate, includes: passing UV light through a transmission glass window provided in a chamber for curing a semiconductor substrate placed in the chamber; monitoring an illuminance upstream of the transmission glass window and an illuminance downstream of the transmission glass window; determining a timing and/or duration of cleaning of the transmission glass window, a timing of replacing the transmission glass window, a timing of replacing a UV lamp, and/or an output of the UV light based on the monitored illuminances.Type: ApplicationFiled: July 19, 2007Publication date: January 22, 2009Applicant: ASM JAPAN K.K.Inventors: Kiyohiro MATSUSHITA, Kenichi KAGAMI
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Publication number: 20090011524Abstract: In one disclosed embodiment, the present method for determining resist suitability for semiconductor wafer fabrication comprises forming a layer of resist over a semiconductor wafer, exposing the layer of resist to patterned radiation, and determining resist suitability by using a scatterometry process prior to developing a lithographic pattern on the layer of resist. In one embodiment, the semiconductor wafer is heated in a post exposure bake process after scatterometry is performed. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source in a lithographic process. In other embodiments, patterned radiation is provided by an electron beam, or ion beam, for example. In one embodiment, the present method determines out-gassing of a layer of resist during exposure to patterned radiation.Type: ApplicationFiled: July 6, 2007Publication date: January 8, 2009Inventors: Thomas Wallow, Bruno M. LaFontaine
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Publication number: 20090011525Abstract: An arithmetic processing part in a controller detects a position of a defect such as a chip or a crack that occurs at an outer periphery of a semiconductor wafer, and then a memory in the controller stores position information of the defect. The controller reads the position information of the defect through a network in each process. On the basis of this position information, the controller determines a direction of joining a dicing tape to the semiconductor wafer or a direction of separating a protective tape from a front face of the semiconductor wafer.Type: ApplicationFiled: July 1, 2008Publication date: January 8, 2009Inventors: Masayuki Yamamoto, Satoshi Ikeda
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Publication number: 20090004763Abstract: The present invention discloses a laser crystallization method and crystallization apparatus using a high-accuracy substrate height control mechanism. There is provided a laser crystallization method includes obtaining a first pulse laser beam having an inverse-peak-pattern light intensity distribution formed by a phase shifter, and irradiating a thin film disposed on a substrate with the first pulse laser beam, thereby melting and crystallizing the thin film, the method includes selecting a desired one of reflected light components of a second laser beam by using a polarizing element disposed on an optical path of the second laser beam when illuminating, with the second laser beam, an first pulse laser beam irradiation position of the thin film, correcting a height of the substrate to a predetermined height by detecting the selected reflected light component, and irradiating the first pulse laser beam to the thin film having the corrected height.Type: ApplicationFiled: June 25, 2008Publication date: January 1, 2009Inventors: Takashi Ono, Masakiyo Matsumura, Kazurumi Azuma, Tomoya Kato
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Publication number: 20080318345Abstract: An approach that determines an ion implantation processing characteristic in a plasma ion implantation of a substrate is described. In one embodiment, there is a light source configured to direct radiation onto the substrate. A detector is configured to measure radiation reflected from the substrate. A processor is configured to correlate the measured radiation reflected from the substrate to an ion implantation processing characteristic.Type: ApplicationFiled: June 22, 2007Publication date: December 25, 2008Inventors: Harold M. Persing, Vikram Singh, Edwin Arevalo
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Publication number: 20080318346Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.Type: ApplicationFiled: June 11, 2008Publication date: December 25, 2008Inventors: Hiroshi Maki, Tsuyoshi Yokomori, Tatsuyuki Okubo
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Publication number: 20080311686Abstract: A method of making a semiconductor thin film bonded to a handle substrate includes implanting a semiconductor substrate with a light ion species while cooling the semiconductor substrate, bonding the implanted semiconductor substrate to the handle substrate to form a bonded structure, and annealing the bonded structure, such that the semiconductor thin film is transferred from the semiconductor substrate to the handle substrate.Type: ApplicationFiled: August 2, 2006Publication date: December 18, 2008Inventors: Anna Fontcuberta i Morral, Sean M. Olson
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Publication number: 20080305561Abstract: Methods of manufacturing semiconductor devices and structures thereof are disclosed. A preferred embodiment comprises a method of forming a material layer. The method includes providing a semiconductor wafer, forming a first portion of a material layer over the semiconductor wafer at a first pressure, and forming a second portion of the material layer over the first portion of the material layer at a second pressure, the second pressure being less than the first pressure.Type: ApplicationFiled: June 7, 2007Publication date: December 11, 2008Inventor: Shrinivas Govindarajan
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Publication number: 20080305562Abstract: A fixturing system and microscope/video camera setup enables an operator to manipulate a photodiode into position optically using known good targets for the X and Y location and using microscope focus/defocus/refocus for locating the active area of the avalanche photodiode exactly at the focal point of the lens.Type: ApplicationFiled: June 11, 2007Publication date: December 11, 2008Inventor: David J. Savoia
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Publication number: 20080293166Abstract: A solution to an interference effect problem associated with laser processing of target structures entails adjusting laser pulse energy or other laser beam parameter, such as laser pulse temporal shape, based on light reflection information of the target structure and passivation layers stacked across a wafer surface or among multiple wafers in a group of wafers. Laser beam reflection measurements on a target link measurement structure and in a neighboring passivation layer area unoccupied by a link enable calculation of the laser pulse energy adjustment for a more consistent processing result without causing damage to the wafer. For thin film trimming on a wafer, similar reflection measurement information of the laser beam incident on the thin film structure and the passivation layer structure with no thin film present can also deliver the needed information for laser parameter selection to ensure better processing quality.Type: ApplicationFiled: May 25, 2007Publication date: November 27, 2008Applicant: Electro Scientific Industries, Inc.Inventors: Yunlong Sun, Steve Harris
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Patent number: 7457736Abstract: An automated metrology recipe set up process is described for a manufacturing process, in which patterns to be formed on a device are defined using a design database. The design database is processed to produce a simulated image of a feature for use in a metrology tool for a measurement of the feature. The simulated image is supplied to the metrology tool, where it is used as a basis for alignment of the tool for the measurement. Other recipe data is combined with the simulated image to provide a fully automated metrology set up process.Type: GrantFiled: November 21, 2002Date of Patent: November 25, 2008Assignee: Synopsys, Inc.Inventor: Fang-Cheng Chang
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Publication number: 20080286885Abstract: Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one lot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.Type: ApplicationFiled: April 22, 2008Publication date: November 20, 2008Inventors: Pavel Izikson, John Robinson, Mike Adel, Amir Widmann, Dongsub Choi, Anat Marchelli
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Patent number: 7449348Abstract: The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for retrograde feature profiles on an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature profile via employing a scatterometry system to detect retrograde feature profiles, and mitigating the retrograde profiles via a spacer etchback procedure.Type: GrantFiled: June 2, 2004Date of Patent: November 11, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Srikanteswara Dakshina-Murthy, Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan
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Patent number: 7446868Abstract: The invention relates to a method and apparatus for detecting defects in a semiconductor or silicon structure at room temperature, and in an efficient time, using photoluminescence. The invention employs the use of a high intensity beam of light preferably having a spot size between 0.1 mm 0.5 microns and a peak or average power density of 104-109 w/cm2 with a view to generating a high concentration of charge carriers, which charge characters detect defects in a semiconductor by interacting with same. These defects are visible by producing a photoluminescence image of the semiconductor. Several wavelengths may be selected to identify defects at a selective depth as well as confocal optics may be used.Type: GrantFiled: September 26, 2006Date of Patent: November 4, 2008Assignee: Nanometrics IncorporatedInventors: Victor Higgs, Ian Mayes, Freddie Yun Heng Chin, Michael Sweeney
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Publication number: 20080265244Abstract: A method is provided for fabricating a multilayer electronic device on a flexible substrate including at least a first and a second patterned layer, wherein the first patterned layer is defined with a linewidth that is smaller than the linewidth of the second patterned layer, and the second patterned layer is defined by a patterning technique which is capable of correcting for local distortions of the pattern of said first layer on top of the flexible substrate and wherein the first patterned layer is laid-out in such a way that the geometric overlap between a portion of the second layer and a portion of the first layer is insensitive against small variations of the position of the second patterned layer.Type: ApplicationFiled: December 2, 2005Publication date: October 30, 2008Inventors: Henning Sirringhaus, Seamus Burns
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Publication number: 20080261334Abstract: A method of processing semiconductor waters comprises forming a pattern of recesses in an exposed surface of each water in a lot, prior to an epitaxy step. At least one recessed test structure is included in the pattern of recesses. At least one dimension of the recessed test structure is determined prior to the epitaxy step, then a corresponding dimension of an epitaxial structure grown above the recessed test structure in the epitaxy step is measured. A deviation between the dimension of the recessed test structure and the dimension of the epitaxial structure is determined and, from the deviation, the process temperature at which the epitaxy step was performed is determined. In case the deviation exceeds a predetermined limit, the temperature in the process chamber is adjusted for a subsequent lot of waters to be processed.Type: ApplicationFiled: April 22, 2008Publication date: October 23, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Gernot Biese, Ulrich Clement
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Publication number: 20080254554Abstract: A method for producing an optical coupling element of the present invention includes the steps of: determining the mounting position of a light-emitting element and a light-receiving element on the front surface of the header portion of each lead frame based on the current amplification factor of the light-receiving element to be mounted; determining the bending angle of each header portion and a distance between the two elements after being bent by calculation such that a predetermined current transfer ratio and an internal insulation distance required by the optical coupling element to be produced are obtained; detecting the determined mounting position by detecting intersections of V-shaped grooves in a grid pattern formed on the front surface of each header portion; mounting each element onto the detected position of the front surface of each header portion while detecting the concave-convex shape; and bending each header portion after mounting each element at the bending angle determined by calculation.Type: ApplicationFiled: April 9, 2008Publication date: October 16, 2008Inventor: Takeshi KITAMURA
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Publication number: 20080254553Abstract: Methods and systems for in situ process control, monitoring, optimization and fabrication of devices and components on semiconductor and related material substrates includes a light illumination system and electrical probe circuitry. The light illumination system may include a light source and detectors to measure optical properties of the in situ substrate while the electrical probe circuitry causes one or more process steps due to applied levels of voltage or current signals. The electrical probe circuitry may measure changes in electrical properties of the substrate due to the light illumination, the applied voltages and/or currents or other processes. The in situ process may be controlled on the basis of the optical and electrical measurements.Type: ApplicationFiled: April 11, 2007Publication date: October 16, 2008Inventors: Woo Sik Yoo, Kitaek Kang
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Publication number: 20080241972Abstract: A method of manufacturing a semiconductor device includes measuring a first width of a first mask pattern formed in a photomask and a second width of a second mask pattern formed in the photomask, and deciding a temperature of heat treatment of a thickening material over a resist film based on measured results.Type: ApplicationFiled: March 31, 2008Publication date: October 2, 2008Applicant: FUJITSU LIMITEDInventor: Tomohiko YAMAMOTO
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Publication number: 20080233661Abstract: Methods and systems for lithographically exposing a substrate based on a curvature profile of the substrate.Type: ApplicationFiled: March 14, 2007Publication date: September 25, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsiao-Tzu Lu, Hung Chang Hsieh, Kuei Shun Chen, Hsueh-Hung Fu, Ching-Hua Hsieh, Shau-Lin Shue
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Patent number: 7427518Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: measuring light emission intensity of at least one type of wavelength contained in light emitted from a plasma, when one of nitriding, oxidation, and impurity doping is to be performed on a surface of a semiconductor substrate in a processing vessel by using the plasma; calculating, for each semiconductor substrate, an exposure time during which the semiconductor substrate is exposed to the plasma, on the basis of the measured light emission intensity; and exposing each semiconductor substrate to the plasma on the basis of the calculated exposure time, thereby performing one of the nitriding, oxidation, and impurity doping.Type: GrantFiled: October 28, 2005Date of Patent: September 23, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Katsuyuki Sekine, Seiji Inumiya, Motoyuki Sato, Akio Kaneko, Kazuhiro Eguchi
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Patent number: 7427764Abstract: A laser crystallization apparatus which capable of correcting both shift in imaging position caused by thermal lens effect of the imaging optical system and shift due to flatness of the substrate comprises an crystallization optical system which irradiates laser light to a thin film disposed on the substrate to melt and crystallize an irradiated region of the thin film, the apparatus includes a measurement light source which is disposed outside a light path of the laser light, and which emits measurement light being illuminated the irradiated region of the thin film, and a substrate height correction system which illuminates the thin film with the measurement light through an imaging optical system in the crystallization optical system, and which detects the reflected measurement light from the thin film.Type: GrantFiled: April 13, 2005Date of Patent: September 23, 2008Assignee: Advanced LCD Technologies DEvelopmet Center Co., Ltd.Inventor: Yoshio Takami