Heterojunction Patents (Class 438/94)
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Publication number: 20030020144Abstract: Integrated communications apparatus and methods are used to receive, transmit, and operate on communications signals. A composite semiconductor structure may be formed for providing an integrated communications device that may include transceiver circuitry, data converter circuitry, and processor circuitry. The data converter circuitry may include an analog-to-digital and/or digital-to-analog data converter that is implemented at least partly using compound semiconductors (e.g., using compound semiconductor transistors for implementing comparators and/or switches in the data converter). The processor circuitry may include some circuitry that is formed from non-compound semiconductors, which is better suited than compound semiconductors to perform digital signal processing operations. The transceiver circuitry may include compound and/or non-compound semiconductor circuitry depending on the signal frequency and whether the signal is optical or electrical.Type: ApplicationFiled: July 24, 2001Publication date: January 30, 2003Applicant: MOTOROLA, INC.Inventors: Keith Warble, Steven F. Gillig, Barry W. Herold
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Patent number: 6509203Abstract: In a semiconductor imaging device, the distance between the edge of a substrate and an edge-most charge collection contact is made as small as possible, preferably less than 500 &mgr;m and/or less than ⅓ of the substrate thickness. Additionally or alternatively, a passivation layer is placed between the edge-most portion of the contact and the substrate surface and/or a field shaping conductor adjacent to the surface. A field shaping region may also be arranged outside the edge of the substrate and may encircle each detector device, or it may encircle an arrangement of several devices. In such an arrangement, the spacing between adjacent detectors should be less than 500 &mgr;m. A shield may also be used to shield the edge of each detector, or the edge region of the arrangement of several detectors, from incident radiation. Such arrangements can reduce the effect of edge image deterioration caused by strong field non-uniformities at the detector edges.Type: GrantFiled: October 14, 1997Date of Patent: January 21, 2003Assignee: Simage, OyInventors: Konstantinos Evangelos Spartiotis, Miltiadis Evangelos Sarakinos, Tom Gunnar Schulman
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Patent number: 6492239Abstract: An avalanche photodiode fabricating method with a simplified fabrication process and an improved reproducibility is disclosed.Type: GrantFiled: April 20, 2001Date of Patent: December 10, 2002Assignee: Samsung Electronic Co, LTDInventors: Seung-Kee Yang, Dong-Soo Bang
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Patent number: 6482672Abstract: A method for growing InxGa1−xAs epitaxial layer on a lattice mismatched InP substrate calls for depositing by organo-metallic vapor phase epitaxy, or other epitaxial layer growth technique, a plurality of discreet layers of InAsyP1−y over an InP substrate. These layers provide a buffer. Each succeeding buffer layer has a distinct composition which produces less than a critical amount of lattice mismatch relative to the preceding layer. An InxGa1−xAs epitaxial layer is grown over the buffer wherein 0.53≦x≦0.76. A resulting InGaAs structure comprises an InP substrate with at least one InAsP buffer layer sandwiched between the substrate and the InGaAs epitaxial layer. The buffer layer has a critical lattice mismatch of less than 1.3% relative to the substrate. Additional buffer layers will likewise have a lattice mismatch of no more than 1.3% relative to the preceding layer.Type: GrantFiled: November 5, 1998Date of Patent: November 19, 2002Assignee: Essential Research, Inc.Inventors: Richard W. Hoffman, David M. Wilt
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Patent number: 6465803Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III—V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.Type: GrantFiled: June 20, 2000Date of Patent: October 15, 2002Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Aaron R. Hawkins
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Publication number: 20020137251Abstract: There is disclosed an improved method of manufacturing of an optical device (40), particularly semiconductor optoelectronic devices such as laser diodes, optical modulators, optical amplifiers, optical switches, and optical detectors. The invention provides a method of manufacturing optical device (40), a device body portion (15) from which the device (40) is to be made including a Quantum Well (QW) structure (30), the method including the step of: processing the device body portion (15) so as to create extended defects at least in a portion (53) of the device portion (5). Each extended defect is a structural defect comprising a plurality of adjacent “point” defects.Type: ApplicationFiled: February 20, 2001Publication date: September 26, 2002Inventors: John Haig Marsh, Craig James Hamilton, Stewart Duncan McDougall, Olek Peter Kowalski
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Publication number: 20020125492Abstract: A light emitting device employing gallium nitride type compound semiconductor which generates no crystal defect, dislocation and can be separated easily to chips by cleavage and a method for producing the same are provided. As a substrate on which gallium nitride type compound semiconductor, layers are stacked, a gallium nitride type compound semiconductor substrate, a single-crystal silicon, a group II-VI compound semiconductor substrate, or a group III-V compound semiconductur substrate is employed.Type: ApplicationFiled: April 23, 2002Publication date: September 12, 2002Applicant: Rohm Co., Ltd.Inventor: Yukio Shakuda
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Publication number: 20020127766Abstract: A process for manufacturing a semiconductor wafer comprises first etching the wafer to reduce damage on the front and back surfaces. An epitaxial layer is grown on the etched front surface of the semiconductor wafer to improve the surface roughness of the front surface. Finally, the front surface of the wafer is final polished to further improve the surface roughness of the front surface.Type: ApplicationFiled: December 21, 2001Publication date: September 12, 2002Applicant: MEMC Electronic Materials, Inc.Inventors: Michael J. Ries, Gregory M. Wilson, Robert W. Standley, Larry W. Shive, Jon A. Rossi
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Patent number: 6417077Abstract: Semiconductor devices that include mismatched lattice crystal interfaces are produced by edge growth heteroepitaxy from a crystal with a small surface area to decrease crystal mismatch strain, achieving a crystal with reduced displacement faults. Mismatched crystal lattices are also deposited on a deformable thin membrane of semiconductor material to reduce strain in growing crystal and to reduce displacement faults to achieve a monolithic crystal structure.Type: GrantFiled: February 7, 2000Date of Patent: July 9, 2002Assignee: Motorola, Inc.Inventor: John J. Stankus
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Patent number: 6414340Abstract: The field effect device consisting of a substrate, a conducting backplane formed in the substrate, a source and a drain disposed above the conductive backplane, a gate insultatively disposed above the substrate between the source and drain, and a backgate contact electrically coupled to the conducting backplane.Type: GrantFiled: November 4, 1999Date of Patent: July 2, 2002Assignee: Raytheon CompanyInventor: Berinder Brar
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Patent number: 6395577Abstract: A light absorbing layer composed of intentionally undoped n-type InGaAs and a window layer composed of intentionally undoped n-type InP are formed sequentially on a first principal surface of a semiconductor substrate composed of n-type InP. A cathode is provided on a p-type diffused region forming an island pattern in the window layer, while an anode is provided on a second principal surface of the semiconductor substrate. A side edge portion of the second principal surface of the semiconductor substrate is formed with a gradient portion having an exposed surface with a (112) plane orientation and forming an angle of 35.3° with respect to the second principal surface. The gradient portion is formed to have a mirrored surface by using an etching solution containing hydrochloric acid and nitric acid at a volume ratio of approximately 5:1 to 3:1.Type: GrantFiled: March 23, 1999Date of Patent: May 28, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Kenichi Matsuda
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Patent number: 6395573Abstract: Provided with a laser diode and its fabricating method including the steps of: sequentially forming a first conductivity type clad layer, an active layer, a second conductivity type first clad layer, an etch stop layer, a second conductivity type second clad layer, a second conductivity type InGaP layer, and a second conductivity type GaAs layer, on a first conductivity type substrate; forming an insulating layer on the second conductivity type GaAs layer and patterning it, exposing a defined region of the second conductivity type GaAs layer; performing a reactive ion etching using the patterned insulating layer as a mask, etching the second conductivity type GaAs layer, the second conductivity type InGaP layer, and the second conductivity type second clad layer to a specified depth and remaining part of the second conductivity type second clad layer; forming a photoresist on the whole surface including the insulating layer and patterning it, exposing the residual second conductivity type second clad layer; pType: GrantFiled: July 26, 2000Date of Patent: May 28, 2002Assignee: LG Electronics Inc.Inventors: Jun Ho Jang, Kang Hyun Sung
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Publication number: 20020052061Abstract: A structure and method of fabricating an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 &mgr;m), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).Type: ApplicationFiled: August 1, 2001Publication date: May 2, 2002Inventor: Eugene A. Fitzgerald
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Patent number: 6380601Abstract: A multilayer semiconductor structure includes a germanium substrate having a first surface. The germanium substrate has two regions, a bulk p-type germanium region, and a phosphorus-doped n-type germanium region adjacent to the first surface. A layer of a phosphide material overlies and contacts the first surface of the germanium substrate. A layer of gallium arsenide overlies and contacts the layer of the phosphide material, and electrical contacts may be added to form a solar cell. Additional photovoltaic junctions may be added to form multijunction solar cells. The solar cells may be assembled together to form solar panels.Type: GrantFiled: March 29, 1999Date of Patent: April 30, 2002Assignee: Hughes Electronics CorporationInventors: James H. Ermer, Li Cai, Moran Haddad, Bruce T. Cavicchi, Nasser H. Karam
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Patent number: 6376155Abstract: In a semiconductor device fabricating process, a chemical amplification resist layer is formed on an insulating film formed on a semiconductor substrate, and the chemical amplification resist layer is patterned to form an opening. The insulating film formed on the semiconductor substrate is wet-etched using the patterned chemical amplification resist layer as a mask. Before the wet-etching is carried out, a surface treatment is conducted for the patterned chemical amplification resist layer to form an insoluble layer at a surface of the patterned chemical amplification resist layer, thereby to elevate a wet-etching-resistance of the patterned chemical amplification resist layer. Thus, deformation of a resist pattern formed of the patterned chemical amplification resist layer is prevented in the wet etching process, so that an opening pattern of a desired shape is formed in the insulating film.Type: GrantFiled: May 25, 1999Date of Patent: April 23, 2002Assignee: NEC CorporationInventor: Katsuyuki Ito
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Patent number: 6372981Abstract: A group-IV semiconductor substrate has an inclined front surface, the inclination being toward a direction differing from the <010>crystal lattice direction. The substrate is cleansed by heating in the presence of a gas including a compound of the group-IV substrate element. A source gas of a group-III element is then supplied, forming an atomic film of the group-III element on the substrate surface. Starting at the same time, or shortly afterward, a source gas of a group-V element is supplied, and a III-V compound semiconductor hetero-epitaxial layer is grown. Chemical bonding of the group-III element to the group-IV substrate surface produces a crystal alignment of the hetero-epitaxial layer that leads to improved conversion efficiency when the semiconductor substrate is used in the fabrication of solar cells with compound semiconductor base and emitter layers.Type: GrantFiled: August 8, 2000Date of Patent: April 16, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Takashi Ueda, Chouho Yamagishi, Osamu Goto
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Publication number: 20020020850Abstract: A buffer layer with a composition of AlaGabIncN (a+b+c=1, a, b, c≧0) and a multilayered thin films with a composition of AlxGayInzN (x+y+z=1, x, y, z≧0) are formed in turn on a substrate. The Al component of the Al component-minimum portion of the buffer layer is set to be larger than that of at least the thickest layer of the multilayered thin films. The Al component of the buffer layer is decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.Type: ApplicationFiled: May 14, 2001Publication date: February 21, 2002Applicant: NGK Insulators, Ltd.Inventors: Tomohiko Shibata, Keiichiro Asai, Teruyo Nagai, Mitsuhiro Tanaka
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Patent number: 6346431Abstract: Quantum dot infrared detection device and method for fabricating the same, which is a new concept of detection device in which quantum dots in the quantum dot part having a stack of alternative quantum dots and separating layers are doped with impurities, so that the quantum dot part itself absorbs infrared ray and serves as a channel for transferring electrons generated by the infrared ray absorption, for enhancing device performance and a device uniformity, and simplifying a device structure and a device fabrication process.Type: GrantFiled: July 10, 2000Date of Patent: February 12, 2002Assignee: LG Electronics Inc.Inventors: Tae Kyung Yoo, Jae Eung Oh
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Publication number: 20010055833Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: ApplicationFiled: May 18, 2001Publication date: December 27, 2001Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw).Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 6326649Abstract: A PIN photodiode comprising a p region containing a p type dopant, an n region containing an n type dopant, an i region positioned intermediate the p region and the n region, and a relatively thick, undoped buffer region positioned between the n region and the i region which substantially decreases the capacitance of the PIN photodiode such that the photodiode bandwidth is maximized. Typically, the buffer region is formed as a layer of indium phosphide that is at least approximately 0.5 &mgr;m in thickness.Type: GrantFiled: January 13, 1999Date of Patent: December 4, 2001Assignee: Agere Systems, Inc.Inventors: Chia C. Chang, Robert Eugene Frahm, Keon M. Lee, Orval George Lorimor, Dennis Ronald Zolnowski
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Patent number: 6326639Abstract: The present invention relates to a semiconductor hetereostructure radiation detector for wavelengths in the infrared spectral range. The semiconductor heterostructure radiation detector is provided with an active layer composed of a multiplicity of periodically recurring single-layer systems each provided with a potential well structure having at least one quantum well with subbands (quantum well), the so-called excitation zone, which is connected on one side to a tunnel barrier zone, whose potential adjacent to the excitation zone is higher than the band-edge energy of a drift zone adjoining on the other side of the potential-well structure.Type: GrantFiled: September 17, 1999Date of Patent: December 4, 2001Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V.Inventors: Harald Schneider, Martin Walter
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Patent number: 6319747Abstract: Process and separating means for the production of a thin film solar module (10) comprising a plurality of solar cells (11) arranged side-by-side on a common substrate (12), which are produced by employing a plurality of layer deposition steps and layer separating steps during the course of cell production and which are electrically interconnected with one another, wherein after the application of a first contact layer (14) on substrate (12) and the cell-wise separation thereof a pn double layer (16) is applied on a contact layer and, thereafter, is mechanically separated in that a scraping cutting tool serving as separating means scrapes, by a relative movement to the coated substrate, a cell structure into said pn double layer, wherein said cutting tool slides, preferably without being raised or rotated, with a plane sliding surface of a flattened tip on said first contact layer (14) which has a higher hardness than said pn double layer (16).Type: GrantFiled: March 9, 2000Date of Patent: November 20, 2001Assignee: ANTEC Solar GmbHInventors: Alexandra Todisco, Dieter Bonnet, Peter Dinges
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Patent number: 6307148Abstract: An indium layer and a copper layer, and whenever necessary, a gallium layer or a gallium-alloy layer, are laminated on an electrode film formed on one of the surfaces of a substrate to form a metallic film. The metallic film is then subjected to sulfurization treatment or selenization treatment to form a p-type semiconductor layer made of “CuInS2 or CuInSe2” or “Cu(In, Ga)S2 or Cu(In, Ga)Se2”. This p-type semiconductor layer is subjected to KCN treatment, for removing impurities such as copper sulfide, copper selenide, etc., by a KCN solution, and an n-type semiconductor layer is formed on this p-type semiconductor layer to form a solar cell. In this instance, the indium layer is formed under heating, or is heat-treated by heat-treatment while the surface of the indium layer is exposed.Type: GrantFiled: March 27, 2000Date of Patent: October 23, 2001Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenji Takeuchi, Yoshio Onuma, Sumihiro Ichikawa
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Publication number: 20010031425Abstract: In a semiconductor device fabricating process, a chemical amplification resist layer is formed on an insulating film formed on a semiconductor substrate, and the chemical amplification resist layer is patterned to form an opening. The insulating film formed on the semiconductor substrate is wet-etched using the patterned chemical amplification resist layer as a mask. Before the wet-etching is carried out, a surface treatment is conducted for the patterned chemical amplification resist layer to form an insoluble layer at a surface of the patterned chemical amplification resist layer, thereby to elevate a wet-etching-resistance of the patterned chemical amplification resist layer. Thus, deformation of a resist pattern formed of the patterned chemical amplification resist layer is prevented in the wet etching process, so that an opening pattern of a desired shape is formed in the insulating film.Type: ApplicationFiled: May 25, 1999Publication date: October 18, 2001Inventor: KATSUYUKI ITO
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Patent number: 6300650Abstract: A multilayer mirror includes a multilayer reflection structure formed of an alternate repetition of a first epitaxial layer of a first refractive index and a second epitaxial layer of a second refractive index larger than the first refractive index, wherein the second epitaxial layer includes a group III-V mixed crystal containing N as a group V element.Type: GrantFiled: March 5, 1999Date of Patent: October 9, 2001Assignee: Ricoh Company, Ltd.Inventor: Shunichi Sato
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Patent number: 6300558Abstract: A solar cell comprises at least a germanium (Ge) substrate, buffer layers formed on the germanium substrate, a first InxGa1-xAs layer of first conductivity type formed on the buffer layers, and a second InxGa1-xAs layer of second conductivity type formed on the first InxGa1-xAs layer to form pn junction. Because the composition x of In contained in the first InxGa1-xAs layer and the second InxGa1-xAs layer is in a range of 0.005≦x≦0.015, the inexpensive and high conversion efficiency solar cell can be achieved.Type: GrantFiled: April 20, 2000Date of Patent: October 9, 2001Assignee: Japan Energy CorporationInventors: Tatsuya Takamoto, Hiroshi Kurita, Takaaki Agui, Eiji Ikeda
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Patent number: 6288415Abstract: An optoelectronic semiconductor device in the form of an LED comprises a silicon p-n junction having a photoactive region containing beta-iron disilicide (&bgr;-FeSi2). The LED produces electroluminescence at a wavelength of about 1.5 &mgr;m.Type: GrantFiled: September 24, 1999Date of Patent: September 11, 2001Assignee: University of SurreyInventors: Daniel Leong, Milton Anthony Harry, Kevin Homewood, Karen Joy Reeson Kirkby
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Patent number: 6271546Abstract: A compound semiconductor multilayer structure includes a plurality of core layers absorbing light and exhibiting a photoelectric transfer; and a plurality of cladding layers, adjacent two of which sandwich each of the core layers so that the core layers are separated from each other by the cladding layers.Type: GrantFiled: June 15, 1999Date of Patent: August 7, 2001Assignee: NEC CorporationInventor: Atsuhiko Kusakabe
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Patent number: 6242275Abstract: A method for manufacturing quantum wires is provided in which a stacked structure having AlAs layers and GaAs layers alternatively is formed, V-grooves are formed beside the GaAs layers and the quantum wires are formed using the V-grooves.Type: GrantFiled: August 21, 1998Date of Patent: June 5, 2001Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Bock Kim, Jeong Rae Ro, El Hang Lee
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Patent number: 6239354Abstract: A monolithically interconnected photovoltaic module having cells which are electrically connected which comprises a substrate, a plurality of cells formed over the substrate, each cell including a primary absorber layer having a light receiving surface and a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, and a cell isolation diode layer having a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, the diode layer intervening the substrate and the absorber layer wherein the absorber and diode interfacial regions of a same conductivity type orientation, the diode layer having a reverse-breakdown voltage sufficient to prevent inter-cell shunting, and each cell electrically isolated from adjacent cells with a vertical trench trough the pn-junction of the diode layer, interconnects disposed in the trenches contacting the absorber regions of adjaType: GrantFiled: October 8, 1999Date of Patent: May 29, 2001Assignee: Midwest Research InstituteInventor: Mark W. Wanlass
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Patent number: 6238947Abstract: A structure consisting of a substrate and a gallium nitride based compound semiconductor formed on the substrate, includes: a light-emitting layer forming portion consisting at least of a semiconductor layer of a first conductivity type (an n-type cladding layer) and a semiconductor layer of a second conductivity type (a p-type cladding layer); a current blocking layer of the first conductivity type, which is formed within a semiconductor layer of the second conductivity type and in close proximity to the light-emitting layer forming portion, and a portion of which is removed in a region where a current flows; and electrodes connected to the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type, respectively.Type: GrantFiled: December 17, 1999Date of Patent: May 29, 2001Assignee: Rohm Co., Ltd.Inventor: Yukio Shakuda
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Patent number: 6239449Abstract: A photodetector capable of normal incidence detection over a broad range of long wavelength light signals to efficiently convert infrared light into electrical signals. It is capable of converting long wavelength light signals into electrical signals with direct normal incidence sensitivity without the assistance of light coupling devices or schemes. In the apparatus, stored charged carriers are ejected by photons from quantum dots, then flow over the other barrier and quantum dot layers with the help of an electric field produced with a voltage applied to the device, producing a detectable photovoltage and photocurrent. The photodetector has multiple layers of materials including at least one quantum dot layer between an emitter layer and a collector layer, with a barrier layer between the quantum dot layer and the emitter layer, and another barrier layer between the quantum dot layer and the collector.Type: GrantFiled: April 14, 1999Date of Patent: May 29, 2001Assignee: National Research Council of CanadaInventors: Simon Fafard, Hui Chun Liu
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Patent number: 6229152Abstract: The use of highly compressively strained In1−xGaxAs quantum wells having a high In content for the detection of light to a wavelength of &lgr;≈2.1 &mgr;m is disclosed. Crystal quality is maintained through strain compensation using tensile strained barriers of InGaAs, InGaP, or InGaAsP. High efficiencies have been achieved in detectors fabricated using this technique. The theoretical cutoff wavelength limit for diodes fabricated using this technique is calculated to be &lgr;˜2.1 &mgr;m. Lattice mismatched layers may be used to transition between compressively strained layers and tensile strained layers to prevent the crystal from breaking up. Multiple quantum wells are formed with multiple periods of strained InGaAs, transition layers and tensile strained layers. These detectors have application in semiconductor, amplifiers, detectors, optical switches, images, etc.Type: GrantFiled: February 18, 1999Date of Patent: May 8, 2001Assignee: The Trustees of Princeton UniversityInventors: John C. Dries, Stephen R. Forrest, Milind Gokhale
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Patent number: 6218684Abstract: A half-transmittance photodiode usable as a photodetector in receivers for “ping-pong transmission” is improved in temperature characteristic, so that a half-transmittance photodiode usable at low temperatures is available. A p-n junction is formed in a buffer layer, not in an absorption layer.Type: GrantFiled: December 7, 1998Date of Patent: April 17, 2001Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshiki Kuhara, Yasuhiro Iguchi, Tadashi Saito, Hitoshi Terauchi
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Patent number: 6191437Abstract: An n-type layer (3) and a p-type layer (5) which are made of a gallium nitride based compound semiconductor are provided on a substrate (1) so that a light emitting layer forming portion (10) for forming a light emitting layer is provided. A gallium nitride based compound semiconductor layer containing oxygen is used for at least one layer of the light emitting layer forming portion (10). In the case where a buffer layer (2) made of the gallium nitride based compound semiconductor or aluminum nitride is provided between the substrate (1) and the light emitting layer forming portion (10), the buffer layer (2) and/or at least one layer of the light emitting layer forming portion (10) may contain oxygen. By such a structure, crystal defects of the semiconductor layer of the light emitting layer forming portion (10) can be decreased and a luminance can highly be enhanced. Thus, it is possible to obtain a blue color type semiconductor light emitting device having a high luminance.Type: GrantFiled: September 21, 1999Date of Patent: February 20, 2001Assignee: Rohm Co., Ltd.Inventors: Masayuki Sonobe, Shunji Nakata, Tsuyoshi Tsutsui, Norikazu Itoh
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Patent number: 6184538Abstract: Quantum-well sensing arrays for detecting radiation with two or more wavelengths. Each pixel includes at least two different quantum-well sensing stacks that are biased at a common voltage.Type: GrantFiled: October 16, 1998Date of Patent: February 6, 2001Assignee: California Institute of TechnologyInventors: Sumith V. Bandara, Sarath D. Gunapala, John K. Liu
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Patent number: 6180967Abstract: A dual-band planar infrared detector with space-time coherence, with a stack of semiconductor layers (16, 18, 20, 21) forming first and second photodiodes. The detector has a planar structure in which each layer has a part showing on a surface (22) substantially perpendicular to the stack.Type: GrantFiled: December 29, 1998Date of Patent: January 30, 2001Assignee: Commissariat a l'Energie AtomiqueInventors: Jean-Paul Zanatta, Pierre Ferret, Philippe Duvaut
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Patent number: 6150677Abstract: A semiconductor layer consisting of Ga.sub.1-x In.sub.x N.sub.y As.sub.1-y and/or GaN.sub.y As.sub.1-y and formed by incorporating nitrogen into a group III-V mixed crystal semiconductor is provided on a GaAs substrate. The hydrogen concentration in the semiconductor is kept at 5.times.10.sup.18 atoms/cm.sup.3 or below.Type: GrantFiled: February 18, 1999Date of Patent: November 21, 2000Assignee: Sumitomo Electric Industries, Ltd.Inventors: So Tanaka, Akihiro Moto, Tatsuya Tanabe, Nobuyuki Ikoma
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Patent number: 6150667Abstract: Disclosed is an electroabsorption-type optical modulator, which includes a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in order on the semiconductor substrate. The absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing the intensity of an electric field applied to the semiconductor optical absorption layer. The semiconductor optical absorption layer has a first region with an absorption-edge wave length shorter than that of a second region of the semiconductor optical absorption layer.Type: GrantFiled: May 21, 1997Date of Patent: November 21, 2000Assignee: NEC CorporationInventors: Masashige Ishizaka, Hiroyuki Yamazaki
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Patent number: 6130441Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III-V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.Type: GrantFiled: March 19, 1999Date of Patent: October 10, 2000Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Aaron R. Hawkins
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Patent number: 6107652Abstract: A metal-semiconductor-metal photodetector including an absorbent layer, a barrier layer of greater forbidden band energy on which there are deposited Schottky electrodes and a transition layer of graded composition, the photodetector including a doping plane situated in the vicinity of the join between the absorbent layer and the transition layer of graded composition.Type: GrantFiled: January 16, 1998Date of Patent: August 22, 2000Assignee: France TelecomInventors: Andre Scavennec, Abdelkader Temmar
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Patent number: 6074892Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III-V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.Type: GrantFiled: February 18, 1997Date of Patent: June 13, 2000Assignee: Ciena CorporationInventors: John E. Bowers, Aaron R. Hawkins
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Patent number: 6064078Abstract: A single layer of atoms of a selected valence is deposited between a substrate and a group III-V nitride film to improve the quality of the nitride film and of subsequently deposited nitride films on the substrate. The interlayer provides local charge neutrality at the interface, thereby promoting two-dimensional growth of the nitride film and reduced dislocation densities. When the substrate is sapphire, the interlayer should include atoms of group II elements and possibly group III elements. The structure can include a group III-V nitride buffer layer on the interlayer to further enhance the quality of the group III-V nitride films. The structures can be used in blue light emitting optoelectronic devices.Type: GrantFiled: May 22, 1998Date of Patent: May 16, 2000Assignee: Xerox CorporationInventors: John E. Northrup, Linda T. Romano, Ross D. Bringans
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Patent number: 5985687Abstract: Optically flat cleaved facet mirrors are fabricated in GaN epitaxial films grown on sapphire by wafer fusing a GaN film with a sapphire substrate to a cubic substrate such as an InP or GaAs substrate. The sapphire substrate may then partially or entirely removed by lapping, dry etching, or wet etching away a sacrificial layer disposed in the interface between the sapphire substrate and the GaN layer. Thereafter, the cubic InP or GaN substrate is cleaved to produce the cubic crystal facet parallel to the GaN layer in which active devices are fabricated for use in lasers, photodetectors, light emitting diodes and other optoelectronic devices.Type: GrantFiled: April 12, 1996Date of Patent: November 16, 1999Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, R. Kehl Sink, Steven P. Denbaars
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Patent number: 5953617Abstract: A method for manufacturing an optoelectronic integrated circuit including a photo diode for transforming light into electric signals, an HBT for amplifying said electric signals from said photo diode, a capacitor, and a resistor is disclosed. An HBT including an emitter, a base, and a collector on a predetermined location of a semiconductor substrate, and a photo diode including an N type metal, non doped layer, and a P type metal are formed. A lower electrode of a capacitor is formed on the semiconductor substrate located in a place separated by a predetermined space from said photo diode. A SiN film is deposited over the surface of the resulting structure of the semiconductor substrate. The above described SiN film is patterned to exist only on the surfaces of the HBT, photo diode, lower electrode, and semiconductor substrate separated from the lower electrode by a predetermined space. Furthermore, a resistor is formed on the SiN film existing on a predetermined surface of the semiconductor substrate.Type: GrantFiled: October 17, 1997Date of Patent: September 14, 1999Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Joon-Woo Lee
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Patent number: 5930656Abstract: A substrate for forming a compound semiconductor device is placed in a reaction chamber. An MOCVD method or a GS-MBE method is used to grow compound semiconductor layers on the substrate. The grown layers include, for example, a GaN buffer layer, an n-GaN layer, an InGaN active layer, a p-AlGaN layer, and a p.sup.+ -GaN contact layer. After the growth of the layers, the substrate is kept in the reaction chamber, and a passivation film of, for example, SiNx, SiO2, or SiON is formed on top of the grown layers according to a CVD or GS-MBE method. Since the top of the grown layers is not exposed to air outside the reaction chamber, no oxidization or contamination occurs on the top of the grown layers. The compound semiconductor device is manufactured through simpler processes compared with a prior art that needs separate apparatuses for growing and forming the layers and passivation film.Type: GrantFiled: October 17, 1997Date of Patent: July 27, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Chisato Furukawa, Masayuki Ishikawa, Hideto Sugawara, Kenji Isomoto
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Patent number: 5920798Abstract: A semiconductor layer for photoelectric transfer device for forming a p-n junction, which has large surface area and uniform film pressure, is formed in the atmosphere under normal pressure for several minutes. The semiconductor layer for forming a p-n junction is composed of a compound semiconductor of a Group II element(selected from the group consisting of Cd, Zn and Hg)-Group VI element(selected from the group consisting of S and Te). A semiconductor layer having a p or n conductive type is formed on a substrate by pyrolytically decomposing an organometallic compound containing a II-VI group atom bond. A semiconductor film is formed on the surface of a substrate by dispersing or dissolving an organometallic compound in a solvent to form a solution, applying ink on the surface of the substrate using a suitable printing method and subjecting to a heat treatment.Type: GrantFiled: May 28, 1997Date of Patent: July 6, 1999Assignee: Matsushita Battery Industrial Co., Ltd.Inventors: Hiroshi Higuchi, Akira Hanafusa, Kuniyoshi Omura, Mikio Murozono, Hideaki Oyama
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Patent number: 5910014Abstract: InGaAs photodiodes are produced on an epitaxial InP wafer having an InP substrate, epitaxially grown layers and an InGaAs light sensing layer. An insulating protection film of SixNy or SiOx with openings is selectively deposited on the epitaxial wafer. Compound semiconductor undercoats of a compound semiconductor with a narrower band gap than InP are grown on the InP window layers at the openings by utilizing the protection film as a mask. A p-type impurity from a solid source or a gas source is diffused through the undercoats and the epitaxial InP layer into the InGaAs sensing layer. Then, either p-electrodes are formed on the undercoats and the undercoats are etched by utilizing the p-electrodes as a mask, or the undercoats are shaped by selective etching in a form of p-electrodes and the p-electrodes are formed on the undercoats.Type: GrantFiled: January 23, 1996Date of Patent: June 8, 1999Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takashi Iwasaki, Nobuhisa Tanaka, Yasuhiro Iguchi, Naoyuki Yamabayashi
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Patent number: 5888843Abstract: A light-emitting diode having improved moisture resistance characteristics comprises a p-type gallium arsenide substrate and four epitaxial layers of Al.sub.x Ga.sub.1-x As (22, 23, 24 and 25). These epitaxial layers comprises an intervening layer (22) of p-type Al.sub.x Ga.sub.1-x As, a cladding layer (23) of p-type Al.sub.x2 Ga.sub.1-x2 As, an active layer (24) of Al.sub.x3 Ga.sub.1-x3 As, and a window layer (25) of Al.sub.x4 Ga.sub.1-x4 As so as to form a double-hetero structure, where x1, x2, x3 and x4 represent mixed crystal ratios of aluminum to arsenic of the layers, respectively, and meet the condition that:x2.gtoreq.x4>x1.gtoreq.x3 (0.ltoreq.x1, x2, x3, x4.ltoreq.1).Type: GrantFiled: December 13, 1996Date of Patent: March 30, 1999Assignee: Hitachi Cable, Ltd.Inventors: Tooru Kurihara, Toshiya Toyoshima, Seiji Mizuniwa, Masahiro Noguchi
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Patent number: 5885847Abstract: The invention relates to a method of fabricating a compound semiconductor device by forming a first and a second compound semiconductor devices having a plurality of different epitaxial layers on a common semiconductor substrate.Type: GrantFiled: April 11, 1997Date of Patent: March 23, 1999Assignee: Electronics And Telecommunications Research InstituteInventors: Hyung-Sup Yoon, Jin-Hee Lee, Byung-Sun Park, Chul-Sun Park, Kwang-Eui Pyun