Abstract: A multiple channel receiver (200) includes a communications receiver synthesizer (204) and at least one numerically controlled oscillator (NCO) (406) that produce local oscillator signals that are derived from a common reference oscillator (202). A DSP (212) and CPU (214) perform automatic frequency control (AFC) by adjustment of the reference oscillator (202) based upon a signal received by a receive channel using the local oscillator signal produced by the communications receiver synthesizer (204). The CPU (214) also provides a synchronous indication of adjustments to the reference oscillator (202) to control circuitry for the at least one NCO (406) so that the configuration of the NCO (406) can be altered so as to maintain a substantially constant frequency output during the adjustment of the reference oscillator (202).

Abstract: A wireless (radio) receiver receives RF signals carrying data synchronized with a first clock. The wireless receiver demodulates the RF signals to extract the data signals and the first clock signals. The wireless receiver uses the first clock signals as write signals to write the data signals in a first-in first-out memory device (FIFO). The data signals stored in the FIFO may be read out with read signals synchronized to a second clock. In one example, a host associated with the wireless receiver reads out data signals stored in the FIFO with read signals synchronized to the system clock of the host receiver. In another example, the wireless receiver includes a data processing circuit (e.g., including forward error correction, de-whitening, and cyclical redundancy check circuits) that reads out data signals stored in the FIFO with read signals synchronized to the system clock of the wireless receiver.

Abstract: The measuring of local oscillation leakage in radio frequency integrated circuits (RFICs) begins by concurrently enabling a transmitter portion and a receiver portion of a radio frequency integrated circuit. The processing then continues by providing a zero input to the transmitter portion such that information contained in the RF signals corresponds to local oscillation leakage produced by the transmitter portion. The processing continues by detecting the concurrent enablement of the transmitter and receiver portions. The processing continues by measuring, via the receiver portion, the received signal strength of the RF signals. The processing continues by processing the received signal strength over a predetermined period of time commencing upon the detection of the concurrent enablement to obtain a measure of the local oscillation leakage.

Abstract: Method for acquiring frequency of a desired channel having a carrier frequency FMAIN, for a dynamic receiver frequency FMOBILE, from a starting frequency FSTART, in the presence of high power adjacent interfering channels, wherein the starting frequency FSTART is shifted from FMAIN by not more than a predetermined frequency gap &Dgr;F, the method includes the steps of determining a first frequency boundary and a second frequency boundary, detecting channels within a filtering bandwidth, selecting a dominant channel from the detected channels, progressing the dynamic receiver frequency FMOBILE towards the carrier frequency of the dominant channel, detecting when the step of progressing has exceeded one of the first frequency boundary and the second frequency boundary, restarting the step of detecting channels, from the other of the one of the first frequency boundary and the second frequency boundary, and repeating from the step of detecting channels.

Abstract: An improved low-cost super-regenerative receiver includes sampling phase-locked loop. Phase sampling is controlled by the quench signal (264). In the preferred embodiment, logic state HIGH to logic state LOW transition of the quench signal (264) defines the timing for the event of sampling. While the quench signal (264) is in logic state HIGH, a quenched oscillator is being turned ON and the oscillation amplitude builds-up until a steady-state level is reached. When the oscillator is turned OFF, effective quality factor of an electronically tunable resonator (206) is reduced, by increasing losses in the circuit, thus to ensure aperiodic (non-oscillatory) decay. The resonator's charge—an energy stored on internal reactive components of the resonator (206), which existed at the instant of turning the oscillations OFF, is transferred during precisely defined period of time to the charge holding capacitor (404) of a charge transfer circuit (216).

Abstract: A frequency scalable, low self-generated noise frequency source generates coherent or mostly-coherent local oscillator signals and includes a common reference, a coherent set of high frequency references and specific local oscillators which may be non-coherent for each specific output frequency. Delay lines may be included in the paths to ensure time delay alignment. The use of these elements with this modular design allows the generation of multiple coherent local oscillators via replication of the modular design elements.

Abstract: The invention provides techniques for compensating for current leakage from a loop filter during off times of a PLL between on times of the PLL, e.g., when a cell phone is in paging mode. The leakage current is compensated by providing offsetting charge to ensure that the VCO tuning voltage when the PLL is turned from “off” to “on” is at or near the VCO tuning voltage when the PLL is locked (the VCO-lock voltage). Several techniques can be used compensate for the leakage current and several techniques can be used to determine how accurately the leakage current is being compensated for, and what, if any, adjustments to make in the offsetting charge to adequately compensate for the leakage current.

Abstract: Fast switching and fast settling is achieved in a phase locked loop (“PLL”) containing a bandwidth switched active loop filter (8) by feeding the phase error signal of the phase detector (1) of the PLL to the non-inverting input of the amplifier (7) within the loop filter and having the electronic switch (17) control the loop filter bandwidth through changing the resistance (9, 11) to ground at the inverting input of the amplifier between a high and low value associated respectively with broad bandwidth and narrow bandwidth to the loop filter. Switching is possible in as little as one microsecond, and is accompanied by fast settling of the loop with minimal generation of phase/frequency perturbation. The foregoing PLL is of particular benefit in fast switching frequency synthesizers, such as used in frequency hopping frequency synthesizers of frequency and time division multiplexing systems.

Abstract: A receiver method and apparatus is presented. Signals are received from a high-voltage environment to a low-voltage environment using low-voltage devices, such as low-voltage FETs. A reference stage (i.e., first stage) provides the reference point for an input signal that is received into a second stage. The reference stage works in conjunction with the second stage to control the output of the second stage. The reference stage and the second stage communicate through floating voltage signals. The output of the second stage is an inverted signal that floats. A third stage receives the inverted signals and corrects the signal to a baseline (i.e., adds gain to the signal). The signal is then clipped by a clipping stage (i.e., fourth stage). The clipping stage clips the high-voltage signal so that it will operate with the devices in the low-voltage environment. A fifth stage is then biased with a low voltage and the clipped signal is shifted downwards. Lastly, an inverter (i.e.

Abstract: A three port structure for the down conversion demodulation of a digitally modulated RF signal is proposed, wherein no RF switches are provided. The three port structure (1) has a first input (2) for the RF signal to be down converted and a second input (3) for a RF signal originating from a local oscillator (8). An output (4) of the three port structure (1) is supplied to a power sensor unit (5). The RF signal from the local oscillator (8) is modulated (7) before it is supplied to the three port structure (1).

Abstract: Method for acquiring frequency of a desired channel having a carrier frequency FMAIN, for a dynamic receiver frequency FMOBILE, from a starting frequency FSTART, in the presence of high power adjacent interfering channels, wherein the starting frequency FSTART is shifted from FMAIN by not more than a predetermined frequency gap &Dgr;F, the method includes the steps of determining a first frequency boundary and a second frequency boundary, detecting channels within a filtering bandwidth, selecting a dominant channel from the detected channels, progressing the dynamic receiver frequency FMOBILE towards the carrier frequency of the dominant channel, detecting when the step of progressing has exceeded one of the first frequency boundary and the second frequency boundary, restarting the step of detecting channels, from the other of the one of the first frequency boundary and the second frequency boundary, and repeating from the step of detecting channels.

Abstract: There is provided a voltage controlled oscillation (VCO) circuit which can adjust the oscillation frequency without trimming and a semiconductor integrated circuit for communication comprising the same VCO circuit, wherein as the VCO circuit forming the PLL circuit, an LC resonance type oscillation circuit is used in which a plurality of capacitance elements are connected in parallel via a selection means such as a switch and the oscillation frequency is varied by changing the circuit constant (LC) depending on the selecting condition of the selecting means, moreover a comparing circuit for comparing the control voltage supplied to the VCO circuit from the loop filter of PLL circuit with the reference voltage and a frequency adjustment circuit for generating the signal to control the selecting means based on the comparison result of the comparing circuit are also provided to determine the signal to control the selecting means through the sequential comparison.

Abstract: To address the problem of aging and drift of a local oscillator in a mobile telephone the frequency Fi of the local oscillator is shifted upwards so that base station logging-on FCH signals are measured perfectly whether said drift is upwards or downwards. It is shown that the actual drift resulting from the initial shift and drift with time can be measured during logging on. It is shown that conforming to the standard is facilitated without having to provide an oscillator whose frequency stability with time is guaranteed.

Abstract: Disclosed is an amplifier apparatus that corrects mismatching of the filter transmission characteristic due to a change in the temperature of the amplifier apparatus itself and thereby stably amplifies the high-frequency signal. The amplifier apparatus converts a signal to be processed into one having an intermediate frequency band to thereby execute amplification processing.

Abstract: A dual mode tuner/receiver is disclosed in which both analog and digital signals can be received and processed. A low pass filter allows all channels below a selected frequency enter the circuit. A precisely controlled dual conversion circuit creates an intermediate frequency (IF) signal. An automatic carrier detection circuit monitors the IF signal and determines whether the signal is of analog or digital format and intermediate frequency filters are adjusted based upon the type of signal detected. A coherent oscillator circuit generates in-phase and quadrature reference signals that are used by video and audio detectors for further processing of the IF signal. In-phase and quadrature outputs are provided for digital signals and composite video and audio outputs are provided for analog signals.

Abstract: A wireless communication system, which is provided with a PLL circuit having a plurality of oscillators and is capable of processing two or more transmit and receive signal different in frequency band from one another according to the switching between the oscillators, has a reset means which resets a voltage applied to each of filter capacitors lying within the PLL circuit to a predetermined voltage when the switching between the oscillators is performed.

Abstract: A communication device (100) and method therefore for compensating an oscillator (146). The communication device (100) includes a receiver (110) for receiving message information transmitted on a predetermined channel (105), an oscillator (146) having a frequency of operation set by a controller (116) for enabling reception of the message information on the predetermined channel (105), and a decoder (114) for decoding the message information received, and for deriving there from messages and channel quality information. The controller (116) is responsive to the messages derived, for storing the same, and further responsive to the channel quality information derived for generating a compensation signal when the value of the channel quality information exceeds a predetermined value. The compensation signal that is generated by the controller (116) effects shifting of the frequency of operation of the oscillator (146) to center reception of the communication device (100) on the predetermined channel (105).

Abstract: The present invention provides methods and apparatus for integrating the operation of a plurality of radio networks. The plurality of radio networks may utilize a common frequency spectrum. The radio center frequencies are adjusted so that frequency drift in relation to each radio network is reduced. Also, system information about the plurality of radio networks may be sent on a radio channel that is associated with one of the radio networks. An oscillator synchronizer synchronizes a first reference oscillator that is associated with a first radio network and a second reference oscillator that is associated with a second radio network in order to adjust radio center frequencies. With a variation of the embodiment, a reference oscillator of one of the radio network adjusts center frequencies for radios that are associated with the other radio network.

Abstract: A frequency tracking circuit and method comprising a master crystal oscillator circuit is used for frequency tracking between a handset and a base station comprising a calibration subsystem for taking a temperature measurement, a reference control circuit for determining a numerical value needed to align a handset frequency with a base station frequency, an adder for adding the numerical value to a previous numerical value determined by the reference control circuit, a latch for latching the output of the adder, and a low precision master crystal oscillator for clocking the frequency of the latch. The most significant bit from the latch is input into a phase/frequency detector for forcing a voltage controlled oscillator to track a desired frequency.

Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is smaller than that applied to an earlier preceding stage.

Abstract: A wireless (radio) receiver receives RF signals carrying data synchronized with a first clock. The wireless receiver demodulates the RF signals to extract the data signals and the first clock signals. The wireless receiver uses the first clock signals as write signals to write the data signals in a first-in first-out memory device (FIFO). The data signals stored in the FIFO may be read out with read signals synchronized to a second clock. In one example, a host associated with the wireless receiver reads out data signals stored in the FIFO with read signals synchronized to the system clock of the host receiver. In another example, the wireless receiver includes a data processing circuit (e.g., including forward error correction, de-whitening, and cyclical redundancy check circuits) that reads out data signals stored in the FIFO with read signals synchronized to the system clock of the wireless receiver.

Abstract: The invention is directed to a personal telecommunications device having both global positioning systems (GPS) and telecommunications provisions which share a common clock source. GPS provisions include a feedback loop for controlling an oscillator that generates a GPS system signal based upon the common clock signal. The feedback loop includes a frequency synthesizer for generating a feedback control signal, a phase comparator for generating a control signal in accordance with the feedback signal and the common clock signal, and a loop filter for processing and outputting the control signal to the oscillator to control the frequency of GPS system signals.

Abstract: A microprocessor system architecture is disclosed which allows for the selective execution of programmed ROM microcode or, alternatively, RAM microcode if there has been a correction or update made to the ROM microcode originally programmed into the system. Patched or updated RAM microcode is utilized or executed only to the extent of changes to the ROM microcode, otherwise the ROM microcode is executed in its normal fashion. When a patch is received, it is loaded into system RAM along with instructions or other appropriate signals to direct the execution of the patched or updated microcode from RAM instead of the existing ROM microcode. Various methods are presented for selecting the execution of the appropriate microcode depending upon whether there have been changes made to it.

Abstract: An AFC process is performed even when a mobile station is in a speech communication mode in which a data channel is being received by a finger receiver. In the speech communication mode, a frequency error measuring unit measures a frequency error of the data channel. An AFC circuit performs an AFC process for controlling the frequency of a TCXO, i.e., a reference oscillator, using the measured frequency error. No reception failure occurs even when the TCXO suffers frequency fluctuations in the speech communication mode.

Abstract: A method and apparatus for generating a self-correcting local oscillation includes processing that begins by generating a synthesized frequency from a reference frequency. The processing then continues by dividing the synthesized frequency by a divider value to produce a divided frequency. The processing continues by generating an auxiliary frequency and mixing the auxiliary frequency with the divided frequency to produce a corrected frequency. The processing then continues by mixing the corrected frequency with the synthesized frequency to produce a local oscillation.

Abstract: A frequency scalable, low self-generated noise frequency source generates coherent or mostly-coherent local oscillator signals and includes a common reference, a coherent set of high frequency references and specific local oscillators which may be non-coherent for each specific output frequency. Delay lines may be included in the paths to ensure time delay alignment. The use of these elements with this modular design allows the generation of multiple coherent local oscillators via replication of the modular design elements.

Abstract: A mixer circuit (21) includes first (31) and second (32) transconductance amplifiers, a switching circuit (34), and an oscillator processing stage (36). The transconductance amplifiers (31,32) generate differential current signals in response to modulated signals having different carrier frequencies. The oscillator processing stage (36) generates a local oscillator signal from a reference oscillator signal. The switching circuit (34) switches the differential current signals at the frequency of local oscillator signal to generate an intermediate frequency output signal.

Abstract: A translational-loop transmitter includes a local oscillator (LO) generator for generating first and second LO signals, a modulator for generating a modulated reference signal using the second LO signal, and an offset phase-locked-loop (PLL) for phase-locking an output signal to the reference signal, and for tuning the output signal in accordance with the first LO signal. The PLL includes an offset mixer in a feedback path of the PLL, and operates in accordance with a frequency plan that minimizes the effects of on- and off-channel spurs at the output of the offset mixer.

Abstract: An LO generation circuit generates an LO signal by doubling and quadrupling the frequency of a VCO signal. The frequency doubling and quadrupling provides high VCO-RF isolation as well as suppression of spurious noise signals in the LO output. The frequency doubler takes a quadrature signal input and utilizes mixer cores having double balanced transistor pairs to provide an output signal having doubled frequency but maintaining the phase balance of the input signal.

Abstract: An optoelectronic phase locked loop for clock recovery in high-speed optical time division multiplexed systems. The optoelectronic phase locked loop includes a balanced photodetector through which the polarity ambiguity in error signal is resolved and the cancellation of laser noise enabling clock recovery with low timing jitter. The optoelectronic phase locked loop also includes an electroabsorption modulator as a phase detector, a lowpass filter, a variable controlled oscillator, a power divider and an amplifer.

Abstract: A tunable element in the microwave frequency range is described that may include one or more tunable elements that are directly digitally controlled by a digital bus connecting a digital control circuit to each controlled element. In particular, each digital signal is filtered by a digital isolation technique so that the signal reaches the tunable elements with very low noise. The low noise digital signals are then converted to analog control voltages. The direct D/A conversion is accomplished by a special D/A converter which is manufactured as an integral part of a substrate. This D/A converter in accordance with the invention may consist of a resistor ladder or a directly digitally controlled capacitor. The direct digitally controlled capacitor may be a cantilevered type capacitor having multiple separate electrodes or sub-plates representing binary bits that may be used to control the capacitor.

Abstract: When a cellular phone terminal is powered on, it immediately receives a reference signal (non-modulated reference frequency signal for correcting a crystal oscillation circuit) for correcting the reception frequency of a radio signal transmitted from a base station at all times, and corrects the error of the reception frequency on the basis of the reference signal received. After the error of the reception frequency is corrected, the cellular phone terminal makes normal communications with the base station.

Abstract: An IrDA modulation/demodulation integrated circuit device designed for use in a portable telephone receives a clock used in a base-band integrated circuit device for processing a base-band signal, and converts the frequency of the received signal by using a PLL circuit 5 to produce a clock. This helps reduce the number of resonators incorporated in the portable telephone, and thereby reduce the cost thereof and the area of the circuit board provided therein.

Abstract: A buffer circuitry buffers a radio-frequency (RF) signal. The buffer circuitry includes a complementary pair of switches and a power source. The a complementary pair of switches has an input terminal and output terminal. The input terminal of the complementary pair of switches responds to the RF signal. The output terminal of the complementary pair of switches couples to an output of the buffer circuitry. The power source includes a capacitor coupled to a current source. The power source couples to the complementary pair of switches. The power source supplies power to the complementary pair of switches in a manner that the buffer circuitry supplies a substantially constant power level at its output.

Abstract: The invention relates to an arrangement for generating a decoder clock signal for decoding a data signal which is available together with a clock signal and a data word signal signalizing data words, both of which signals may each have different frequencies. The arrangement comprises a phase control circuit (1) which receives the clock signal and supplies the decoder clock signal from its output, and which comprises at least one adjustable divider (14) which is preferably arranged at the input of the phase control circuit (1) and whose division ratio is adjustable.

Abstract: A tuner comprises a first frequency changer with a mixer and local oscillator. The output of the frequency changer is connected to a first intermediate frequency filter, whose output is connected to a second frequency changer. The output of the frequency changer is connected to the usual second intermediate frequency filter and to an amplitude detector. A reference oscillator is connectable under control of a controller via a multiplexer to the input of the mixer. During an alignment mode of the tuner, the reference signal from the oscillator is supplied to the mixer and the local oscillators and are controlled by the controller to sweep across a frequency range encompassing all possible pass frequencies of the filter. The controller monitors the output of the detector so as to establish the frequency response of the filter. Frequency offsets are then stored in the synthesizers and so as to center each channel during a reception mode on the actual center frequency of the filter.

Abstract: A receiver uses an adaptive algorithm to tune a low-cost crystal oscillator according to a temperature compensation profile so as to produce a precision master reference frequency despite temperature, initial tolerance, and aging effects. An automatic frequency control system also tunes the crystal oscillator. The adaptive algorithm adjusts the temperature compensation profile for the crystal oscillator according to the adjustments made by the automatic frequency control should a received signal's quality factor exceed that associated with the temperature compensation profile.

Abstract: A quadrature demodulator applicable to digital communication and digital broadcast is provided, which simplifies the circuit configuration of a quadrature demodulator section and which reduces the labor or man-hours and the time required for adjusting the demodulation characteristic.

Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is larger than that applied to an earlier preceding stage.

Abstract: A method and apparatus for dynamic temperature compensation and pilot stage searcher selection in a mobile unit of a CDMA wireless communication link. Temperature values and measured pilot frequencies are stored in a Temperature Compensation Table and a Temperature Array. The dynamically updated frequency values maintained in the Temperature Compensation Table and Temperature Array are used to determine the searcher stage to be used in pilot signal acquisition. Both the Temperature Compensation Table and the Temperature Array (TA) are updated every 30 seconds after the mobile unit has acquired a pilot signal. The values in the Temperature Array correspond only to values measured during the current phone power on cycle. If the mobile unit loses acquisition with a pilot signal and must reacquire, the acquisition software examines the TA values to determine whether or not the current temperature is saved in the TA.

Abstract: A temperature compensated zero bias RF detector circuit includes a zero biased diode detector circuit feeding the positive input of a differential amplifier circuit. The negative input of the same differential amplifier circuit is a temperature compensation voltage. The temperature compensation voltage is produced by current flow from a bias source through a reference diode and through the resistor back to ground. The bias supply remains constant over temperature, whereas the temperature compensation voltage changes with temperature as the forward voltage across the reference diode changes with temperature. The differential amplifier outputs a temperature compensated detection voltage. The differential amplifier is followed by a voltage level shifter, which adjusts the output temperature compensated voltage to a suitable level for measuring equipment or for use by other processing circuits.

Abstract: A wireless mobile terminal for a wireless communication system comprises a wireless transceiver, a global positioning system (GPS) receiver, wherein the wireless transceiver and the GPS receiver share a frequency reference signal. The frequency reference signal can be multiplied by an integer multiple to create a first local oscillator for a signal conversion to an intermediate frequency for signal processing of the GPS signal. In addition, the frequency reference signal can also be divided into a lower frequency to create a second local oscillator for a conversion to a second intermediate frequency. The frequency reference signal can also be divided to create a frequency necessary for other signal processing, such as an analog-to-digital converter sampling signal at the GPS receiver. The frequency reference signal can be taken from different places within the frequency synthesis mechanism of the wireless transceiver.

Abstract: A voltage controlled oscillator is provided which oscillates in a stable manner at a high frequency and obtains a large variable range of frequency. The oscillator includes a transistor, and distributed-constant line connected to the base of the transistor. The distributed-constant line has substantially 1/4 wavelength at the oscillation frequency of the oscillator, and has one open end. An inductance element is provided comprising a capacitor having a self-resonance frequency which is lower than the oscillation frequency. This inductance element is connected to the collector of the transistor. A varactor diode is connected to the capacitor.

Abstract: A local oscillation circuit comprising a crystal oscillating circuit for generating an output voltage having a constant frequency, and an interface part for converting the output voltage from the crystal oscillating circuit into a current signal, the current signal being used as a local oscillation signal to be mixed with the receiving signal from an antenna, whereby a receiving circuit, which can be made as a single semiconductor chip consuming little current, can be realized.

Abstract: A transceiver configuration has an integrated circuit (IC) with an A/D and/or D/A converter, a VCO with a reference oscillator, which provides a sampling clock for the A/D and/or D/A converter, and a digital data processing circuit. The IC is connected to a radio-frequency section, the frequency converter stage of which is operated with a beat frequency derived from the controllable oscillator frequency foz. A capacitive resonant element of the reference oscillator is disposed outside of the IC.

Abstract: In an RF front end portion for processing a radio-frequency signal in a portable telephone, a low pass filter allowing passing of only a signal in a frequency band lower than a radio-frequency signal component band is arranged between a circuit processing a high power signal and a control circuit controlling operation of the radio-frequency signal processing circuit. The radio-frequency signal processing circuit is a transmission/reception multiplexing circuit transferring a transmission signal of the portable telephone to an antenna or receiving a reception signal from the antenna, and the control circuit is a transmission/reception control circuit determining an operation mode of the transmission/reception multiplexing switch. Alternatively, the radio-frequency signal processing circuit includes a power amplifier amplifying a signal to be transmitted, and a gate voltage control circuit generating gate bias voltage controlling a gain of the power amplifier.

Abstract: A communications system for determining the position and velocity of an object using a plurality of GPS signals transmitted by a plurality of GPS sources includes an interrogator remote from the object and responsive to the plurality of GPS signals. The interrogator transmitts an RF signal including GPS source information and at least one of frequency information and time and code phase information of at least one of the GPS signals. The system also includes a transponder positioned on the object and responsive to the RF signal and the plurality of GPS signals. The transponder tracks one of the plurality of GPS signals in response to the GPS source information and the frequency information and time and code phase information. The transponder generates a correlation snapshot and transmits the snapshot to the interrogator.

Abstract: Methods and systems are provided for frequency generation suitable for use in wireless devices capable of operating at multiple frequencies. Such systems may change the loop gain of an automatic frequency control loop based on the operating frequency of the wireless device. Furthermore, such a frequency dependent loop gain may be carried out by the selection of subroutines with differing loop gains associated with the subroutines. Furthermore, the loop gain may also be temperature compensated based on the temperature of the wireless device and/or the operating frequency of the device.

Abstract: A locator system which includes a GPS receiver for receiving GPS signals, a mobile subscriber unit for receiving the GPS error indicating signals; and circuitry, preferably a DSP, responsive to the GPS error indicating signals and the GPS signals to provide a corrected location indication. There is also provided a source of GPS error indicating signals remote from the mobile subscriber unit. The mobile subscriber unit includes a CDMA receiver. The GPS receiver, mobile subscriber unit and DSP are contained as a single unit.

Abstract: The invention is directed toward a simple and cost effective method of wirelessly transmitting digital information with an analog carrier signal. The method, referred to as Interrupt Modulation IM, will allow broadcasters to make the transition from an analog to a digital format while using existing analog equipment and conserving radio spectrum. Interrupt Modulation consists of allowing digital information to be transmitted to control a high speed analog special interrupter circuit which interrupts the circuit path of an unmodulated carrier signal such that the analog carrier is interrupted to directly correspond with the time length of the high segment of the digital pulse wave. Digital information is then transferred by the absence of the analog carrier signal. As modern high speed analog switches are capable of on/off operation at speeds of several megahertz, which is common in digital information computers, throughout rates of up to 100 megabits per second are obtainable.