Abstract: A parameter correction method includes: obtaining, from a variability-aware simulation, a simulation result value of a predetermined product performance for a reference candidate value set concerning statistics of predetermined product characteristics; calculating a likelihood by substituting the reference candidate value set, the obtained simulation result value, statistics of measurement values of the predetermined product characteristics and a measurement value of the predetermined product performance into a likelihood function that is defined from a probability density function for the statistics of the predetermined product characteristics and a probability density function for the predetermined product performance, and is a function to calculate a combined likelihood of the statistics of the predetermined product characteristics and the predetermined product performance; and searching for a reference candidate value set in case where the calculated likelihood becomes maximum, by carrying out the obtaini

Abstract: A solid imaging apparatus and method employing sub-pixel shifting in multiple exposures of the digitally light projected image of a cross-section of a three-dimensional object on a solidifiable liquid medium. The multiple exposures provide increased resolution, preserving image features in a three-dimensional object and smoothing out rough or uneven edges that would otherwise be occur using digital light projectors that are limited by the number of pixels in an image projected over the size of the image. Algorithms are used to select pixels to be illuminated within the boundary of each image projected in the cross-section being exposed.

Abstract: Embodiments of the invention include systems and methods for automatically predicting production yield for a circuit assembly according to attributes of its components and defect data mapped thereto. Embodiments receive a proposed design specification for a circuit assembly, including bill of materials (BOM) and schematic data, at a yield prediction environment. The yield prediction environment maps a set of attributes to each component in the BOM and maps a set of possible defects to each component according to its attributes. Defects may be further mapped to a manufacturing process assigned to populate each component in the circuit assembly. The defects are associated with predicted frequencies of occurrence, which can be used to roll up a yield prediction for the circuit assembly. Embodiments further allow “what-if” analyses to be performed so that different yield prediction results can be compared according to different form factor options and/or different manufacturing process options.

Abstract: In an electronic design automation technique for optical proximity correction, a mask is represented by a function with an exact analytical form over a mask region. Using the physics of optical projection, a solution based on a spatial frequency analysis is determined. Spatial frequencies above a cutoff are determined by the optical system do not contribute to the projected image. Spatial frequencies below this cutoff affect the print (and the mask), while those above the cutoff only affect the mask. Frequency components in the function below this cutoff frequency may be removed, which will help to reduce computational complexity.

Abstract: A method of designing a pattern layout includes defining one shot area including a plurality of chip areas, generating an initial common layout in the plurality of chip areas, primarily correcting the initial layout to form a primary corrected layout, and secondarily correcting the primary corrected layout independently to form a plurality of secondary corrected layouts.

Abstract: A method and an apparatus for determining the position of a structure on a mask for microlithography, in which the position is determined by comparing an aerial image, measured by a recording device, of a portion of the mask with an aerial image determined by simulation. The position determination includes carrying out a plurality of such comparisons which differ from one another with regard to the input parameters of the simulation.

Abstract: Some embodiments of the invention provide a method for verifying an integrated circuit (IC) design. The method receives a process description file that specifies a process technology for building the IC. The process description file describes a particular device type in which a first conductor overlaps a second conductor by recessing from the second conductor in one or more cut-outs. Based on the process description file, the method finds a section of the IC design that matches the particular device type and uses the description of the particular device type to compute a capacitance value and a resistance value for the section of the IC design.

Abstract: In an exemplary embodiment, a method of fabricating an integrated circuit includes designing an optical photomask for forming a pre-pattern opening in a photoresist layer on a semiconductor substrate, wherein the photoresist layer and the pre-pattern opening are coated with a self-assembly material that undergoes directed self-assembly (DSA) to form a DSA pattern. The step of designing the optical photomask includes using a computing system, inputting a DSA target pattern, and using the computing system, applying a DSA model to the DSA target pattern to generate a first DSA directing pattern. Further, the step of designing the optical photomask includes using the computing system, calculating a residual between the DSA target pattern and the DSA directing pattern, and using the computing system, applying the DSA model to the first DSA directing pattern and the residual to generate a second, updated DSA directing pattern.

Abstract: A method of fabricating an integrated circuit includes designing an optical photomask for forming a pre-pattern opening in a photoresist layer on a semiconductor substrate, wherein the photoresist layer and the pre-pattern opening are coated with a self-assembly material that undergoes directed self-assembly (DSA) to form a DSA pattern. Designing the optical photomask includes using a computing system, inputting a DSA target pattern, and using the computing system, applying a DSA model to the DSA target pattern to generate a first DSA directing pattern. Further, the step of designing the optical photomask includes using the computing system, calculating a residual between the DSA target pattern and the DSA directing pattern, and using the computing system, applying the DSA model to the first DSA directing pattern and the residual to generate a second, updated DSA directing pattern. Generating the second, updated DSA directing pattern includes linearizing a self-consistent field theory equation.

Abstract: A method for creating a photolithography mask from a set of initial mask cells arranged to form an initial mask. The set includes first and second initial mask cells having a mask element in common within an initial region of the initial mask. The method includes a creation of a first modified mask cell and of a second modified mask cell including OPC processing operations, a comparison of the position of the mask element in common between the first modified mask cell and the second modified mask cell, and if the result of the comparison is greater than a threshold, a creation of a new mask region including an optical proximity correction processing operation on the initial region, and a creation of the photolithography mask from the new mask region.

Abstract: Methods for optimizing conductor patterns for conductors formed by ECP and CMP processes. A method includes receiving layout data for an IC design where electrochemical plating (ECP) processes form patterned conductors in at least one metal layer over a semiconductor wafer; determining from the received layout data a global effects factor corresponding to a global pattern density; determining layout effects factors for unit grid areas corresponding to the pattern density of the at least one metal layer within the unit grid areas, determining local effects factors for each unit grid area; using a computing device, executing an ECP simulator using at least one of the global effects factor and the local effects factors, and using the layout effects factor; outputting an predicted post-ECP hump data map from the ECP simulator; and if indicated by a threshold comparison, modifying the layout data.

Abstract: A method and apparatus for atomic layer deposition (ALD) is described. In one embodiment, an apparatus comprises a vacuum chamber body having a contiguous internal volume comprised of a first deposition region spaced-apart from a second deposition region, the chamber body having a feature operable to minimize intermixing of gases between the first and the second deposition regions, a first gas port formed in the chamber body and positioned to pulse gas preferentially to the first deposition region to enable a first deposition process to be performed in the first deposition region, and a second gas port formed in the chamber body and positioned to pulse gas preferentially to the second deposition region to enable a second deposition process to be performed in the second deposition region is provided.

Abstract: System, method and computer program product including instructions executed by a processor system for configuring and controlling a facility to perform a manufacturing process and updating a tool controlling the process according to a model employed for mapping calculated coefficients that characterize non-linear variations observed of a product to actual control parameters governing the processes/tools used by the facility during the manufacturing process. In a semiconductor manufacturing process, the method enables real-time control of variation in an exposure step of a patterning process using an exposure tool to minimize a nonlinear variation in one or more pattern attributes by adjusting the exposure tool or the patterning process corresponding to the calculated coefficients. In the method, measurements of product attributes, obtained by finite sampling over a well defined domain (e.g.

Abstract: Methods of fabricating a photo mask are provided. The method includes collecting sample data, setting a preliminary mask layout, performing an optical proximity correction using the sample data and a preliminary mask layout to obtain an optimized preliminary mask layout, verifying the optimized preliminary mask layout to obtain a final mask layout, and fabricating the photo mask using the final mask layout. Verification of the optimized preliminary mask layout includes operating a verification simulator using the sample data and the optimized preliminary mask layout as input data to obtain verification image data. The verification image data includes a plurality of contours of a pattern at different vertical positions.

Abstract: Provided is an integrated circuit (IC) design method. The method includes receiving an IC design layout having a feature with an outer boundary, performing a dissection on the feature to divide the outer boundary into a plurality of segments, and performing, using the segments, an optical proximity correction (OPC) on the feature to generate a modified outer boundary. The method also includes simulating a photolithography exposure of the feature with the modified outer boundary to create a contour and performing an OPC evaluation to determine if the contour is within a threshold. Additionally, the method includes repeating the performing a dissection, the performing an optical proximity correction, and the simulating if the contour does not meet the threshold, wherein each repeated dissection and each repeated optical proximity correction is performed on the modified outer boundary generated by the previously performed optical proximity correction.

Abstract: A method for reducing layer overlay errors by synchronizing the density of mask material in the frame area across the masks in a set is disclosed. An exemplary method includes creating a mask design database corresponding to a mask and containing a die area with one or more dies and a frame area outside the die area. Fiducial features within the frame area are identified, and from the fiducial features, an idle frame area is identified. A reference mask design, which corresponds to a reference mask configured to be aligned with the mask, is used to determine a reference density for the idle frame area. The idle frame area of the mask design database is modified to correspond to the reference density. The modified mask design database is then available for further use including manufacturing the mask.

Abstract: A method of forming a functional razor cartridge for repeated shaving comprises rapid prototyping a housing of a razor cartridge. The housing has a front wall, a rear wall and opposing side walls disposed transverse to and between said front and rear walls. The method further comprises loading a metal insert with one or more elongate blade assemblies and disposing the metal insert in the housing such that the one or more blade assemblies extend between the opposing side walls of the housing.

Abstract: A method of data preparation in lithography processes is described. The method includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, converting the IC layout design GDS grid to a first exposure grid, applying a non-directional dither technique to the first exposure, coincident with applying dithering to the first expose grid, applying a grid shift to the first exposure grid to generate a grid-shifted exposure grid and applying a dither to the grid-shifted exposure grid, and adding the first exposure grid (after receiving dithering) to the grid-shifted exposure grid (after receiving dithering) to generate a second exposure grid.

Abstract: Apparatus for producing an object by sequentially forming thin layers of a construction material one on top of the other responsive to data defining the object, the apparatus comprising: a plurality of printing heads each having a surface formed with a plurality of output orifices and controllable to dispense the construction material through each orifice independently of the other orifices; a shuttle to which the printing heads are mounted; a support surface; and a controller adapted to control the shuttle to move back and forth over the support surface and as the shuttle moves to control the printing heads to dispense the construction material through each of their respective orifices responsive to the data to form a first layer on the support surface and thereafter, sequentially the other layers; wherein each printing head is dismountable from the shuttle and replaceable independently of the other printing heads.

Abstract: Described herein are methods for matching the characteristics of a lithographic projection apparatus to a reference lithographic projection apparatus, where the matching includes optimizing projection optics characteristics. The projection optics can be used to shape wavefront in the lithographic projection apparatus. According to the embodiments herein, the methods can be accelerated by using linear fitting algorithm or using Taylor series expansion using partial derivatives of transmission cross coefficients (TCCs).

Abstract: The manufacturability of a lithographic mask employed in fabricating instances of a semiconductor device is determined. Target edge pairs are selected from mask layout data of the mask, for determining a manufacturing penalty in making the mask. The manufacturability of the mask, including the manufacturing penalty in making the mask, is determined based on the target edge pairs as selected, and is dependent on the manufacturing penalty in making the mask. Determining the manufacturability of the mask includes, for a selected edge pair having first and second edges that are at least substantially parallel to one another, determining a manufacturing shape penalty owing to an aspect ratio of the first edge relative to a size of a gap between the first edge and the second edge. This penalty takes into account a pair of connected edges of the first edge that are at least substantially parallel to the first edge.

Abstract: An additive three-dimensional fabrication process is improved by controlling deposition rate to obtain surface textures or other surface features below the nominal processing resolution of fabrication hardware. Sub-resolution information may be obtained, for example, from express metadata (such as for surface texture), or by interpolating data from a source digital model.

Abstract: In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.

Abstract: A method for automatically generating and prioritizing several design solutions that resolve a double patterning (DP) loop violation in an IC design layout. The method of some embodiments receives a DP loop violation marker and identifies pairs of edges of shapes that form a double patterning loop based on the DP loop violation marker. For each pair of edges that violates the design rule, the method generates one or more design solutions. Each design solution moves a single edge or both edges to resolve the violation. The method of some embodiments computes the cost of applying each design solution to the IC design layout and prioritizes the generated solutions for all the identified pairs of edges based on the computed cost for each solution. The method in some embodiments then selects a solution from the prioritized solutions and applies the selected solution to the design layout.

Abstract: Systems and methods for process aware metrology are provided.

Abstract: A method of forming an article in a layer wise manufacturing process from a computer software file representing the article includes dividing the file into sub files in dependence of the size or other characteristics of features of the article to be created, applying a process characteristic selected independence on a characteristic feature to each sub file and manufacturing the article in accordance with the subfiles.

Abstract: Alignment data from an exposure tool suitable for exposing a plurality of semiconductor wafers are provided, the alignment data including alignment values applied by the exposure tool to respective ones of the plurality of semiconductor wafers at a plurality of measured positions.

Abstract: A method for designing masks adapted to the forming of integrated circuits, including the steps of: (a) forming a first test file including a set of configurations of integrated circuit elements; (b) forming a second test file comprising the elements of the first test file, less the elements corresponding to configurations forbidden by design rule manuals; (c) trans-forming the second test file by means of a set of logical operations implemented by computing means to obtain a mask file; (d) testing the mask file and, if the test is negative, modifying the design rule manuals; and (e) repeating steps (a) to (d) until the test of step (d) is positive.

Abstract: A low visibility landing system is provided for guiding aircraft on landing approaches. The low visibility landing system may aid a pilot during landing in low visibility conditions such that an aircraft may descend to lower altitudes without visual contact with the runway than is possible with other landing systems. The system may use various navigational systems to produce a hybrid signal that may be more stable than individual signals of those navigational systems. The hybrid signal is compared to a predetermined landing approach plan to determine the deviation of the aircraft from the landing approach plan and to provide guidance to the pilot to get the aircraft back onto the landing approach plan. The system may also use multiple navigational systems to perform checks on an operation of a primary navigational system to ensure that the primary navigational system is operating accurately.

Abstract: Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.

Abstract: An optical molding apparatus molds an optically molded product by stacking cured layers. Each cured layer is formed by emitting light according to cross-sectional-shape data of the optically molded product onto a surface of photo-curable resin. The optical molding apparatus includes an exposing unit and an exposure control unit. The exposing unit performs exposure on the photo-curable resin for each of small work areas that are defined by dividing an overall work area, which is where an optical molding operation is performed, into a plurality of areas. The exposure control unit controls an exposure condition of the exposing unit for each of the small work areas and allows the exposure to be performed collectively on multiple layers' worth of the photo-curable resin in a predetermined one of the small work areas.

Abstract: A mechanism is provided for converting a set of single-layer design rules into a set of split-layer design rules for double patterning lithography (DPL). The set of single-layer design rules and minimum lithographic resolution pitch constraints for single exposure are identified. The set of single-layer design rules comprise a first plurality of minimum distances that are required by a set of first shapes in a single-layer design. Each of the first plurality of minimum distances in the set of single-layer design rules are modified with regard to the minimum lithographic resolution pitch constraints for single exposure, thereby forming the set of split-layer design rules. The set of split-layer design rules comprise a second plurality of minimum distances that are required by a set of second shapes and a set of third shapes in a split-layer design. The set of split-layer design rules are then coded into a design rule checker.

Abstract: In an electronic design automation technique for optical proximity correction, a mask is represented by a function with an exact analytical form over a mask region. Using the physics of optical projection, a solution based on a spatial frequency analysis is determined. Spatial frequencies above a cutoff are determined by the optical system do not contribute to the projected image. Spatial frequencies below this cutoff affect the print (and the mask), while those above the cutoff only affect the mask. Frequency components in the function below this cutoff frequency may be removed, which will help to reduce computational complexity.

Abstract: A method for designing a two-dimensional array overlay target comprises the steps of: selecting a plurality of two dimensional array overlay targets having different overlay errors; calculating a deviation of a simulated diffraction spectrum for each two-dimensional array overlay target; selecting an error-independent overlay target by taking the deviations of the simulated diffraction spectra into consideration; and designing a two dimensional array overlay target based on structural parameters of the error-independent overlay target.

Abstract: A pattern generating method includes: extracting, from a shape of a pattern generated on a substrate, a contour of the pattern shape; setting evaluation points as verification points for the pattern shape on the contour; calculating curvatures on the contour in the evaluation points; and verifying the pattern shape based on whether the curvatures satisfy a predetermined threshold set in advance.

Abstract: A dental prosthesis is made by first forming a model of a patient's dentition. A three dimensional digital data corresponding to the surfaces of the model is then created. Based on this data, a three dimensional digital data file is then created substantially corresponding to the dental prosthesis to be manufactured. The three dimensional digital data of the dental prosthesis to be manufactured is next transmitted to automated prototyping equipment, and using the automated prototyping equipment, a wax pattern of the dental prosthesis is manufactured based upon this three dimensional digital data of the dental prosthesis. Finally, using this wax pattern in the lost wax investment casting process, the dental prosthesis is made. Prior to investment casting, marginal edges of the wax pattern are adjusted manually.

Abstract: Systems, devices, and methods for designing and/or manufacturing transparent conductors. A system is operable to evaluate optical and electrical manufacturing criteria for a transparent conductor. The system includes a database including stored reference transparent conductor data, and a controller subsystem configured to compare input acceptance manufacturing criteria for a transparent conductor to stored reference transparent conductor data.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: Disclosed herein is a device adapted to make a solid object. The device has a surface rotatable around an axis of rotation, and an applicator adapted to apply over at least one portion of the surface a material used to make the solid object. The applicator and the surface are displaceable relative to each other in a direction transverse to the axis. Disclosed herein are also methods of determining instructions for the device.

Abstract: Methods and software for correcting printable circuit layouts. The methods generally including steps of identifying shapes in an input circuit layout, applying a plurality of correction rules to the shapes, and producing an output printed circuit layout in accordance with the identified shapes and the correction rules. The input circuit layout generally comprises a bitmapped image or other description of at least one printable layer of at least one electronic component, device, or die. Embodiments of the present invention further allow for more precise control of spreading and effective coverage of features (e.g., source/drain terminal regions, gates, capacitors, diodes, interconnects, etc.) on a substrate by a printed ink composition including electronic materials.

Abstract: A 3D modeling apparatus includes: a support body which supports a modeled object formed by laminating a resin material that is cured by energy of an energy ray; an illumination mechanism which illuminates the resin material with the energy ray, on the basis of image data of laminated cross-sections which constitutes 3D data of an object to be modeled which is an object of modeling, in order to form the modeled object; and a supply mechanism which supplies a material that constitutes a part of the modeled object and is different from the resin material, to the resin material that is cured as being illuminated by the illumination mechanism, on the basis of the cross-section image data.

Abstract: A method and system may be used to design and control the manufacture of a surgical guide for implanting a prosthetic component. The system includes a bone surface image generator, a surgical guide image generator, and a surgical guide image converter. The bone surface image generator receives three dimensional bone anatomical data for a patient's bone and generates a bone surface image. The surgical guide image generator generates a surgical guide image from the bone surface image and an image of a prosthesis imposed on the bone surface image. The supporting structure of the generated surgical guide image conforms to the surface features of the three dimensional bone surface image. The surgical guide image is converted by surgical guide image converter into control data for operating a machine to form a surgical guide that corresponds to the surgical guide image.

Abstract: A technique for quantitatively expressing a manufacturing difficulty level of a photomask and for efficiently manufacturing the photomask is provided. A mask manufacturing difficulty level different for each mask layout, product, and mask layer is relatively recognized with a mask manufacturing load index calculated by a mask manufacturing load prediction system, and when layout correction is possible, the final layout is corrected to a layout with a low difficulty level, and a mask ordering party provides a mask manufacturer with information regarding the mask manufacturing difficulty level in an early stage. The mask manufacturing load index is expressed with a defect guarantee load index and a lithography load index.

Abstract: A graph is created in which mask patterns adjacent to one another at a distance in which desired printing resolution cannot be obtained in a lithography process among mask patterns generated based on a pattern layout design drawing are set as nodes connected to one another by edges. An odd number loop formed by an odd number of nodes is selected from closed loops. When the selected odd number loop is not isolated, based on whether a closed loop group in which a plurality of closed loops including the odd number loop are connected includes an even number loop formed by an even number of nodes, rearrangement target nodes are selected from the odd number loop included in the closed loop group according to different selection references. The layout of patterns described in the pattern layout design drawing is rearranged corresponding to the selected rearrangement target nodes.

Abstract: A head model according to one example of an embodiment is a head model that may be provided for use in the calibration for a brain-imaging device, where a part corresponding to the skull and a part corresponding to at least one specific region of the brain are each formed by a continuous cavity with no cuts other than an opening for liquid injection.

Abstract: Device for producing a three-dimensional object by solidification of a material solidifiable under the action of electromagnetic radiation by means of energy input via an imaging unit comprising a predetermined number of discrete imaging elements (pixels), said device comprising a computer unit, an IC and/or a software implementation respectively with the ability of adjusting and/or controlling the energy input via a specific gray value and/or color value in a voxel matrix.

Abstract: A method for forming masks for manufacturing a circuit includes providing a design of the circuit, wherein the circuit comprises a device; performing a first logic operation to determine a first region for forming a first feature of the device; and performing a second logic operation to expand the first feature to a second region greater than the first region. The pattern of the second region may be used to form the masks.

Abstract: There is provided a method for manufacturing a three-dimensional shaped object. The method of the present invention comprises the repeated steps of: (i) forming a solidified layer by irradiating a predetermined portion of a powder layer on a base plate with a light beam, thereby allowing a sintering of the powder in the predetermined portion or a melting and subsequent solidification thereof; and (ii) forming another solidified layer by newly forming a powder layer on the resulting solidified layer, followed by the irradiation of a predetermined portion of the powder layer with the light beam; wherein the solidified layers are formed such that they have a high-density portion whose solidified density is 95 to 100% and a low-density portion whose solidified density is 0 to 95% (excluding 95%); and wherein the high-density portion is a portion of the three-dimensional shaped object, to which the force is applied when the three-dimensional shaped object is used.

Abstract: According to various embodiments of the invention, systems and methods are provided for compressed design phase contour data created during the manufacturing of integrated circuits. In one embodiment of the invention, the method begins by generating a contour layout from a target layout during the design phase of a circuit. This contour layout is generated by way of a contour generator tool. Next, a set of differences between the contour layout and the target layout are calculated. A dataset containing these differences is generated. In some embodiments, the contour generator uses a post-optical proximity correction (OPC) layout of the target layout in order to generate the contour layout.

Abstract: The invention relates to a process or a device for the production of a three-dimensional object by layer-wise solidification of a material which is solidifiable under the application of electromagnetic irradiation by means of mask illumination, wherein the mask is produced using an image forming unit having a prescribed resolution, which is formed from a constant number of image forming elements (pixels) being discrete and being arranged in a spatially mutually fixed manner. For the improvement of the resolution along the outer and inner contours of the sectional areas of the object to be generated layer-wise in the sub-pixel range, a multiple illumination per layer is performed, which consists of a series of multiple images that are mutually shifted in the sub-pixel range in the image/construction plane, wherein a separate mask/bitmap is produced for each shifted image.