Stereolithography Patents (Class 700/120)
  • Publication number: 20110313560
    Abstract: A stereolithography apparatus and an exposure system for a stereolithography apparatus, wherein light emitting diodes are used as light sources. The invention relates to aligning light from the light emitting diode and to the exchange and control the light emitting diodes.
    Type: Application
    Filed: October 9, 2009
    Publication date: December 22, 2011
    Applicant: Huntsman International LLC
    Inventors: Ole Hangaard, Niels Holm Larsen, Emilie Pougeoise
  • Patent number: 8082525
    Abstract: Embodiments of a method for determining a mask pattern to be used on a photo-mask in a lithography process are described. This method may be performed by a computer system. During operation, this computer system receives at least a portion of a first mask pattern including first regions that violate pre-determined rules associated with the photo-mask. Next, the computer system determines a second mask pattern based on at least the portion of the first mask pattern, where the second mask pattern includes second regions that are estimated to comply with the pre-determined rules. Note that the second regions correspond to the first regions, and the second mask pattern is determined using a different technique than that used to determine the first mask pattern.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: December 20, 2011
    Assignee: Luminescent Technologies, Inc.
    Inventors: Yong Liu, John F. McCarty, Kelly Gordon Russell, Linyong Pang
  • Patent number: 8060345
    Abstract: A system and method for knowledge based development of interior models for configurable spaces, including storing a digital definition of the interior section of the passenger vehicle and parameters related to the objects, storing a digital definition of a plurality of three dimensional stay-out spaces associated with one or more of the objects, defining one or more collision rules between a first three dimensional stay-out space and a second three dimensional stay-out space, the rules define whether the first three dimensional stay-out space and the second three dimensional stay-out space may overlap, and designing the interior section to accommodate objects based on the defined collision rules and object parameters.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: November 15, 2011
    Assignee: The Boeing Company
    Inventors: David J. Lee, Margaret J. Taboada
  • Patent number: 8051392
    Abstract: A method for forming masks for manufacturing a circuit includes providing a design of the circuit, wherein the circuit comprises a device; performing a first logic operation to determine a first region for forming a first feature of the device; and performing a second logic operation to expand the first feature to a second region greater than the first region. The pattern of the second region may be used to form the masks.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: November 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lee-Chung Lu, Chung-Te Lin, Yen-Sen Wang, Yao-Jen Chuang, Gwan Sin Chang
  • Patent number: 8027746
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: September 27, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 8006202
    Abstract: A method of designing a lithographic mask for use in lithographic processing of a substrate is disclosed. The lithographic processing comprises irradiating mask features of a lithographic mask using a predetermined irradiation configuration. In one aspect, the method comprises obtaining an initial design for the lithographic mask comprising a plurality of initial design features having an initial position. The method further comprises applying at least one shift to at least one initial design feature and deriving there from an altered design so as to compensate for shadowing effects when irradiating the substrate using a lithographic mask corresponding to the altered design in the predetermined irradiation configuration. Also disclosed herein are a corresponding design, a method of setting up lithographic processing, a system for designing a lithographic mask, a lithographic mask, and a method of manufacturing it.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: August 23, 2011
    Assignees: IMEC, Samsung Electronics Co., Ltd.
    Inventors: Gian Francesco Lorusso, In Sung Kim, Byeong Soo Kim, Anne-Marie Goethals, Rik Jonckheere, Jan Hermans
  • Patent number: 8006203
    Abstract: A method is described herein for predicting lateral position information about a feature represented in an integrated circuit layout for use with an integrated circuit fabrication process, where the process projects an image onto a resist. The method includes providing a lateral distribution of intensity values of the image at different depths with the resist. Next, the lateral position of an edge point of the feature is predicted in dependence upon a particular resist development time, and further in dependence upon the image intensity values at more than one depth within the resist.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: August 23, 2011
    Assignee: Synopsys, Inc.
    Inventors: Yongfa Fan, Qiaolin Zhang, Bradley J. Falch
  • Patent number: 7979813
    Abstract: A method is described for converting an existing die, originally designed for a non-chip-scale package, to a chip-scale package die, where the die's bonding pads are located in positions within a defined grid of candidate positions. In the first step, the die's layout, comprising its outer boundaries and areas needed to be electrically connected to bonding pads, are shifted relative to a grid of candidate positions for the bonding pads until an optimal alignment is identified. Bonding pads positions on the die are then selected corresponding to optimum grid positions within the outer boundaries of the die. The die is then fabricated using the original masks to form at least the semiconductor regions and using a new set of masks for defining the new locations of the bonding pads for the chip-scale package. The chip-scale package is then bonded to a PCB using chip-scale package technology.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: July 12, 2011
    Assignee: Micrel, Inc.
    Inventors: Robert Rumsey, Richard Dolan, Haowei Wu
  • Patent number: 7975246
    Abstract: A method that purposely relaxes OPC algorithm constraints to allow post OPC mask shapes to elongate along one direction (particularly lowering the 1-dimensional MEEF in this direction with the result of an effectively overall lowered MEEF) to produce a pattern on wafer that is circular to within an acceptable tolerance.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: July 5, 2011
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corporation
    Inventors: Derren Neylon Dunn, Michael M Crouse, Henning Haffner, Michael Edward Scaman
  • Patent number: 7962865
    Abstract: A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Fook-Luen Heng, Mark Alan Lavin, Jin-Fuw Lee, Chieh-yu Lin, Jawahar Pundalik Nayak, Rama Nand Singh
  • Patent number: 7962866
    Abstract: Disclosed are an improved method, system, and computer program product for a method or system with concurrent models to more accurately determine and represent the three-dimensional design features of electronic designs. Some embodiments disclose a method or a system for determining the design feature characteristics based upon their respective three-dimensional profiles. Some other embodiments further determine whether the design objectives or constraints are met or may be relaxed based upon the design feature characteristics in order to complete the design. Other embodiments store the profile or geometric characteristics, or information derived therefrom, in a database associated with the design to reduce the need for potentially expensive computations. The method or system may modify the designs or the processes to reflect whether the design objectives or constraints are met or relaxed.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: June 14, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: David White, Louis K. Scheffer
  • Publication number: 20110106290
    Abstract: In a method for manufacturing an article (1), particularly a prototype of a product or component, a tool prototype or spare part, by using selected laser melting, for the application onto the article (1) of a layer (13) or portion of a second metallic material, which is different from the material of the first metallic powder (4), a tape (12), sheet (14), foil or three-dimensional pre-form (18) of a second material is applied to the article (1) and is heated by a focused laser or electron beam (6) to a specified temperature such that the tape (12), sheet (14), foil or pre-form, respectively, are made molten by the electron laser beam (6), wherein the focused beam (6) is applied to a given area corresponding to a selected cross-sectional area of the model of the article (1) under formation of a new layer or part made of second material integral with the article (1).
    Type: Application
    Filed: October 29, 2010
    Publication date: May 5, 2011
    Inventors: Simone HÖVEL, Alexander Stankowski, Lukas Rickenbacher
  • Patent number: 7930058
    Abstract: Processing a wafer using a double side grinder having a pair of grinding wheels. Warp data is obtained by a warp measurement device for measuring warp of a wafer as ground by the double side grinder. The warp data is received and a nanotopography of the wafer is predicted based on the received warp data. A grinding parameter is determined based on the predicted nanotopography of the wafer. Operation of the double side grinder is adjusted based on the determined grinding parameter.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: April 19, 2011
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Sumeet S. Bhagavat, Roland R. Vandamme, Tomomi Komura, Tomohiko Kaneko, Takuto Kazama
  • Patent number: 7912569
    Abstract: A method for generating data for a jetting program, includes the steps of: a) obtaining substrate data for a substrate, which is to be provided with deposits and components; and b) for each component which is to be placed on the substrate: —fetching component data for the component from said substrate data; and—selecting a matching predefined deposit pattern, comprising at least one deposit, which matches a desired deposit pattern for said component data, wherein the deposit pattern comprises, for the/each deposit, deposit data comprising deposit extension and deposit position; or—if no matching predefined deposit pattern exists, defining a deposit pattern, comprising at least one deposit, for the component data, comprising the step of defining, for the/each deposit, deposit data, which step comprises determining deposit extension and deposit position.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: March 22, 2011
    Assignee: Mydata Automation AB
    Inventors: Jens Byléhn, Håkan Sandell, William Holm
  • Patent number: 7913195
    Abstract: According to mask layout data created for a particular factory facility, transistors constituting a semiconductor device are classified into multiple groups depending on the gate length. Thereafter, the concentration of impurity introduced into a channel layer is set for each group, and thereby the gate length-threshold characteristics of a transistor are controlled. An overlapping area of a gate electrode and an element region of a certain group is extracted from mask layout data. The overlapping area is expanded to determine the shape of a mask used in injecting impurity in a channel layer. The data on the mask shape is then added to the mask layout data.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: March 22, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Yoshihiro Takao
  • Patent number: 7913197
    Abstract: According to various embodiments of the invention systems and methods for multiple pattern lithography, wherein a target layout pattern that is not capable of being printed in one lithography step is decomposed into multiple patterns that are printable in one lithography operation and, when appropriate, a continuous junction is utilized for where patterns overlap. In a further embodiment, where a continuous junction is not utilized, a splice is utilized at overlap locations. In yet another embodiment, where splices are utilized for overlap locations, identifying where critical nets are located in the target layout pattern, determining how close a component of the critical net is to a splice, and changing the target layout pattern as to avoid the condition of a component of the critical net being in proximity to a splice. In another embodiment of the invention, where splices are utilized at overlap locations, placing a landing pad of contacts or vias at the same location as the splice.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: March 22, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Michiel Victor Paul Kruger, Bayram Yenikaya, Anwei Liu, Abdurrahman Sezginer, Wolf Staud
  • Patent number: 7882481
    Abstract: For determining an optimized wafer layout, at least two wafer layouts are specified for a given wafer, each wafer layout defining the location of a plurality of die with regard to the wafer. An optimization parameter value of at least one optimization parameter is determined for each of the at least two wafer layouts. The at least one optimization parameter includes at least one of a number of exposure fields necessary for exposing the respective wafer layout and a number of die of the wafer layout. The optimized wafer layout is selected out of the at least two wafer layouts depending on the optimization parameter values.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: February 1, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Stefan Hempel
  • Patent number: 7873937
    Abstract: A system has been developed for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the system accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the system employs a lithography simulation system architecture, including application-specific hardware accelerators, and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: January 18, 2011
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Patent number: 7873935
    Abstract: A method of manufacturing a mask includes designing a first mask data pattern, designing a second mask data pattern for forming the first mask data pattern, acquiring a first emulation pattern, which is predicted from the second mask data pattern, using layout-based Self-Aligning Double Patterning (SADP) emulation, comparing the first emulation pattern with the first mask data pattern, and modifying the second mask data pattern according to results of the comparison. The method further includes performing Optical Proximity Correction (OPC) on the modified second mask data pattern, acquiring second emulation patterns, which are predicted from the second mask data pattern on which the OPC has been performed, using image-based SADP emulation, and comparing the second emulation patterns and the first mask data pattern and manufacturing a first mask layer, which corresponds to the second mask data pattern on which the OPC has been performed, according to the results of the comparison.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: January 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-gon Jung, Ji-young Lee, Han-ku Cho, Gi-sung Yeo
  • Patent number: 7866372
    Abstract: In an embodiment of the invention, there is provided a method of making a heat exchanger core component comprising the steps of generating a stereolithography file from design data, slicing the stereolithography file into two-dimensional patterns, repeating the two-dimensional patterns sequentially to produce a three-dimensional core component, and depositing at least one layer of a material having a high thermal conductivity onto a top surface of a base. In another embodiment there is provided a heat exchanger core component made by an embodiment of the method wherein the core component comprises a triply periodic design that is repeated in three dimensions.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: January 11, 2011
    Assignee: The Boeing Company
    Inventor: Victor Blakemore Slaughter
  • Patent number: 7866377
    Abstract: A method of using a minimal surface or a minimal skeleton to make a heat exchanger component is provided. The method comprises the steps of generating a stereolithography file from design data, slicing the stereolithography file into two-dimensional patterns, repeating the two-dimensional patterns sequentially to produce a three-dimensional minimal surface component or minimal skeleton component, and depositing at least one layer of a material having a high thermal conductivity onto a top surface of a base, wherein the deposited material forms either a three-dimensional minimal surface component or a three-dimensional minimal skeleton component. Also provided are the heat exchanger components made by the embodiments of the method using either minimal surfaces or minimal skeletons.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: January 11, 2011
    Assignee: The Boeing Company
    Inventor: Victor Blakemore Slaughter
  • Patent number: 7860597
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: December 28, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Patent number: 7860594
    Abstract: The present invention provides a method for making an ophthalmic device. In particular, the present invention provides a method for production of a contact lens by means of stereolithography. A preferred stereolithography technique is based on polymerization and solidification of a contact lens forming liquid material by actinic irradiation one layer at a time. In addition, the present invention provides systems and methods for making a contact lens for a specific patient based on the prescription.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: December 28, 2010
    Assignee: Novartis AG
    Inventors: Rafael Victor Andino, Robert Scott Meece, David Rosen, Benay Sager
  • Publication number: 20100319204
    Abstract: A method of forming a functional razor cartridge for repeated shaving comprises rapid prototyping a housing of a razor cartridge. The housing has a front wall, a rear wall and opposing side walls disposed transverse to and between said front and rear walls. The method further comprises loading a metal insert with one or more elongate blade assemblies and disposing the metal insert in the housing such that the one or more blade assemblies extend between the opposing side walls of the housing.
    Type: Application
    Filed: June 9, 2010
    Publication date: December 23, 2010
    Inventors: Mark Peterson, Dominic Michael Piff
  • Patent number: 7856612
    Abstract: In an electronic design automation technique for optical proximity correction, a mask is represented by a function with an exact analytical form over a mask region. Using the physics of optical projection, a solution based on a spatial frequency analysis is determined. Spatial frequencies above a cutoff are determined by the optical system do not contribute to the projected image. Spatial frequencies below this cutoff affect the print (and the mask), while those above the cutoff only affect the mask. Frequency components in the function below this cutoff frequency may be removed, which will help to reduce computational complexity.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 21, 2010
    Assignee: Gauda, Inc.
    Inventors: P. Jeffrey Ungar, Ilhami H. Torunoglu
  • Patent number: 7856613
    Abstract: Various embodiments of the invention provide systems and methods for semiconductor device fabrication and generation of photomasks for patterning a target layout of line features and large features. Embodiments of the invention are directed towards systems and methods using self-aligned double pattern to define the target layout of line features and large features.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: December 21, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Milind Weling, Judy Huckabay, Abdurrahman Sezginer
  • Patent number: 7848840
    Abstract: Methods and systems for adaptively controlling process parameters in semiconductor manufacturing equipment. An embodiment provides for gain scheduling of PID controllers across recipe steps. One embodiment provides a method for controlling a chuck temperature during a semiconductor manufacturing process, the method employing a first set of proportional-integral-derivative (PID) values in a PID controller to control the chuck temperature at a first setpoint in a first step of a process recipe and employing a second set of PID values in the PID controller to control the chuck temperature at a second setpoint, different than the first setpoint, in a second step of the process recipe. The methods and systems provide reduced controller response times where process parameter setpoint between steps of a process recipe span a wide range.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: December 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Ritchie Dao, Derek Brodie, Scott Olszewski, Duy D Nguyen, Chunlei Zhang
  • Patent number: 7849424
    Abstract: Systems, devices, and methods for designing and/or manufacturing transparent conductors. A system is operable to evaluate optical and electrical manufacturing criteria for a transparent conductor. The system includes a database including stored reference transparent conductor data, and a controller subsystem configured to compare input acceptance manufacturing criteria for a transparent conductor to stored reference transparent conductor data.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: December 7, 2010
    Assignee: Cambrios Technologies Corporation
    Inventors: Jeffrey Wolk, Haixia Dai, Xina Quan, Michael A. Spaid
  • Patent number: 7848835
    Abstract: A pulsed DUV workpiece treatment apparatus and method for delivering light to irradiate the workpiece, for crystallization of a material on the workpiece, carried on a work stage, which may comprise a pulsed laser DUV light source and an optical train producing a very narrow width very elongated beam of light pulses with a set of parameters required to be maintained within a respective selected narrow range of values on a pulse to pulse basis is disclosed, which may comprise: a laser controller; a work stage controller; a system controller receiving process recipe control demands from a customer recipe control command generator and providing control signals to the laser controller and the workstage controller, which may comprise: a database driven process controller which may comprise: a database containing generic process command steps selectable by a user through an external process user interface.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: December 7, 2010
    Assignee: Cymer, Inc.
    Inventors: Joseph Conway, Yogesh Sharma
  • Publication number: 20100305743
    Abstract: A method and arrangement for production of three-dimensional bodies by successive fusing together of selected areas of a powder bed, which parts correspond to successive cross sections of the three-dimensional body, which method comprises the following method steps: application of powder layers to a work table, supplying energy from a radiation gun according to an operating scheme determined for the powder layer to said selected area within the powder layer, fusing together that area of the powder layer selected according to said operating scheme for forming a cross section of said three-dimensional body, a three-dimensional body being formed by successive fusing together of successively formed cross sections from successively applied powder layers.
    Type: Application
    Filed: August 13, 2010
    Publication date: December 2, 2010
    Inventor: Morgan Larsson
  • Patent number: 7844940
    Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-pil Shin, Jin-sook Choi, Moon-hyun Yoo, Jong-bae Lee
  • Patent number: 7844939
    Abstract: The present invention provides a mask pattern correction program for correcting a design pattern which serves as a source to form a mask pattern so that, by exposure of a mask with a pattern formed thereon onto a substrate, the mask pattern is transferred as designed, the mask pattern correction program including performing, on a computer, the steps of: determining, before simulation of the dimension of the pattern transferred by exposure, whether the simulation result will converge; and classifying design pattern edges into first and second target edges, correct the first target edges and perform simulation thereon if it is determined that the simulation result will not converge.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: November 30, 2010
    Assignee: Sony Corporation
    Inventors: Reiko Tsutsui, Hidetoshi Oishi
  • Publication number: 20100290319
    Abstract: In illustrative implementations of this invention, a mechanical clock is produced in a manner such that, once its separate parts are made, the clock requires no further assembly. In one implementation of this invention, a mechanical clock is designed using standard CAD (computer-aided design) modeling tools and made with a rapid prototyping machine. The support material used in rapid prototyping is then removed. Once the support material is removed, the clock runs without any additional assembly. In this implementation, the clock contains all the components that are required and they are all constructed in the rapid prototyping process.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 18, 2010
    Inventors: Robert Swartz, Peter Schmitt
  • Patent number: 7836420
    Abstract: An integrated circuit system comprising: providing a substrate; forming a main feature using a first non-cross-junction assist feature over the substrate; forming the main feature using a second non-cross-junction assist feature, adjacent a location of the first non-cross-junction feature, over the substrate; and forming an integrated circuit having the substrate with the main feature thereover.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: November 16, 2010
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Sia Kim Tan, Qunying Lin, Andrew Khoh
  • Patent number: 7833000
    Abstract: There is provided an optical modeling apparatus that forms a model of a desired shape by sequentially forming hardened layers by irradiating a light-curable resin with light. The apparatus includes a first light source that emits a light beam for plotting on the resin, a scanning device that scans the light beam from the first light source over the resin, a second light source that emits light that irradiates one fixed region of the resin at a time, and a spatial light modulator that spatially modulates the light from the second light source to blanket-expose a specified region of the resin. The light beam from the scanning device and the light from the spatial light modulator form each hardened layer.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: November 16, 2010
    Assignee: Sony Corporation
    Inventors: Nobuhiro Kihara, Masanobu Yamamoto, Kimihiro Saito, Yuichi Aki, Takeshi Yamasaki
  • Patent number: 7820341
    Abstract: A method for generating a photolithography mask for optically transferring a pattern formed in the mask onto a substrate utilizing an imaging system.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: October 26, 2010
    Assignee: ASML MaskTools B. V.
    Inventors: Thomas Laidig, Jang Fung Chen, Xuelong Shi, Ralph Schlief, Uwe Hollerbach, Kurt E. Wampler
  • Publication number: 20100262272
    Abstract: A method and apparatus for making a three-dimensional object from a solidifiable material such as a photopolymer is shown and described. In accordance with the method, positions relative to a build axis are subdivided into first and second exposure data subsets, and the first and second exposure data subsets are solidified in alternating sequences to reduce the surface area of solidified material in contact with a solidification substrate.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 14, 2010
    Inventors: Alexandr Shkolnik, Ali El-Siblani
  • Publication number: 20100249979
    Abstract: Device for producing a three-dimensional object by solidification of a material solidifiable under the action of electromagnetic radiation by means of energy input via an imaging unit comprising a predetermined number of discrete imaging, elements (pixels), said device comprising a computer unit, an IC and/or a software implementation respectively with the ability of adjusting and/or controlling the energy input via a specific gray value and/or color value in a voxel matrix.
    Type: Application
    Filed: June 14, 2010
    Publication date: September 30, 2010
    Applicant: ENVISIONTEC GMBH
    Inventors: Hendrik John, Volker Schillen, Ali El-Siblani
  • Publication number: 20100233655
    Abstract: By capturing a highly detailed three-dimensional digital model of dentition, a suitable replacement dental article be fabricated with a combination of digitally-controlled reductive processes such as milling and digitally-controlled additive processes such as digital painting. A dental article so-manufactured can provide an aesthetically pleasing, multi-chromatic appearance that closely matches surrounding dentition.
    Type: Application
    Filed: November 18, 2008
    Publication date: September 16, 2010
    Inventors: Naimul Karim, Sumita B. Mitra
  • Patent number: 7797070
    Abstract: The present invention is a system and method for specifying custom hair pieces using three-dimensional digital acquisition devices. The system and method described herein uses electronic data acquisition techniques to electronically model a customer's head and hair line characteristics and to electronically record specifications for a custom hair piece. The electronic data containing certain head shape data and hair piece specifications is then electronically transmitted to a hair piece manufacturer for completion of the hair piece.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: September 14, 2010
    Assignee: CenterTrak, LLC
    Inventors: William W. Dilbeck, Jr., Cooper M. Schley, Jr., Michael T. Schley
  • Publication number: 20100228369
    Abstract: The present invention is directed to an improved method for supporting an object made by means of stereo lithography or any other rapid prototype production method. The generation of the support begins by determining the region that requires support in each layer of the object and defines a number of support points in this region. In a next step, a support mesh is generated connected to the object using these support points. The present invention also discloses different techniques that reduce superfluous edges to further optimize the support mesh. Finally, a support is generated from this support mesh. The present invention may facilitate the generation of supports data by employing more automation and less user analysis.
    Type: Application
    Filed: October 10, 2008
    Publication date: September 9, 2010
    Applicant: Materialise NV
    Inventors: Gerald Eggers, Kurt Renap
  • Publication number: 20100228381
    Abstract: A three-dimensional modeling apparatus includes a stage, a supply mechanism, a head, a movement mechanism, and a lifting and lowering mechanism. On the stage, a powder material is accumulated. The supply mechanism supplies the powder material on the stage for each predetermined layer thickness. The head ejects a liquid for forming a three-dimensional object to the powder material on the stage. The liquid is capable of binding the powder material. The movement mechanism moves the stage so that the liquid is supplied from the head to the powder material by the predetermined layer thickness. The lifting and lowering mechanism lowers the stage for each predetermined layer thickness.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 9, 2010
    Applicant: SONY CORPORATION
    Inventors: Takeshi Matsui, Junichi Kuzusako, Hiroyuki Yasukochi
  • Patent number: 7790093
    Abstract: The invention relates to a process or a device for the production of a three-dimensional object by layer-wise solidification of a material which is solidifiable under the application of electromagnetic irradiation by means of mask illumination, wherein the mask is produced using an image forming unit having a prescribed resolution, which is formed from a constant number of image forming elements (pixels) being discrete and being arranged in a spatially mutually fixed manner. For the improvement of the resolution along the outer and inner contours of the sectional areas of the object to be generated layer-wise in the sub-pixel range, a multiple illumination per layer is performed, which consists of a series of multiple images that are mutually shifted in the sub-pixel range in the image/construction plane, wherein a separate mask/bitmap is produced for each shifted image.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: September 7, 2010
    Assignee: Envisiontec GmbH
    Inventors: Alexandr Shkolnik, Hendrik John, Ali El-Siblani
  • Patent number: 7783371
    Abstract: Device for producing a three-dimensional object by solidification of a material solidifiable under the action of electromagnetic radiation by means of energy input via an imaging unit comprising a predetermined number of discrete imaging elements (pixels), said device comprising a computer unit, an IC and/or a software implementation respectively with the ability of adjusting and/or controlling the energy input via a specific gray value and/or color value in a voxel matrix.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: August 24, 2010
    Assignee: Envisiontec GmbH
    Inventors: Hendrik John, Volker Schillen, Ali El-Siblani
  • Patent number: 7778723
    Abstract: High-volume mass-production and customization of complex three-dimensional polymer and polymer-derived-ceramic microstructures are manufactured in a single step directly from three-dimensional computer models. A projection based non-degenerate two-photon induced photopolymerization method overcomes the drawbacks of conventional one and two-photon fabrication methods. The structure includes dual, synchronized, high-peak power, pulsed femtosecond and picosecond lasers combined with spatial light modulation. Applications include high-resolution rapid prototyping and rapid manufacturing with an emphasis on fabrication of various Micro-Electro-Mechanical Systems (MEMS) devices, especially in the area of MEMS packaging.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: August 17, 2010
    Assignee: Illumiform, LLC
    Inventor: Robert Brian Cregger
  • Patent number: 7758799
    Abstract: A solid imaging apparatus and method employing sub-pixel shifting in multiple exposures of the digitally light projected image of a cross-section of a three-dimensional object on a solidifiable liquid medium. The multiple exposures provide increased resolution, preserving image features in a three-dimensional object and smoothing out rough or uneven edges that would otherwise be occur using digital light projectors that are limited by the number of pixels in an image projected over the size of the image. Algorithms are used to select pixels to be illuminated within the boundary of each image projected in the cross-section being exposed.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: July 20, 2010
    Assignee: 3D Systems, Inc.
    Inventors: Charles W. Hull, Jouni P. Partanen, Charles R. Sperry, Patrick Dunne, Suzanne M. Scott, Dennis F. McNamara, Chris R. Manners
  • Publication number: 20100174399
    Abstract: A volume element (voxel) printing system for printing a three-dimensional object includes a first printhead group having a plurality of first printheads configured to print a first voxel layer on a substrate; at least one second printhead group having a plurality of second printheads downstream from the first group, the second printhead group configured to print a subsequent voxel layer on at least part of the first layer, said second printheads being reconfigurable as backup printheads for the first printheads in case of failure; a conveyor configured to convey the substrate past the printhead groups; and a control system configured to control and monitor the printhead groups, the object insertion device, and the conveyor, and dynamically to reconfigure the second printheads upon detection of failure of a first printhead. The at least one second printhead group is vertically spaced from the substrate by a greater distance than the first printhead group.
    Type: Application
    Filed: March 22, 2010
    Publication date: July 8, 2010
    Inventor: Kia Silverbrook
  • Publication number: 20100168890
    Abstract: Methods are provided for solid free-form fabrication of an article without using a slice stack file. These apply ray casting a number of times to an electronic representation of the article to create data objects for use directly as printing instructions or which are convertible into printing instructions. The data objects may be utilized as they is generated or after they are created for a portion or all of the article. After utilization, the data objects may be discarded or stored for later use. Layer-specific layer thickness and other-direction resolution parameters may be input and utilized in selecting the number of rays to be cast, their origination points, and their directions, thus permitting controllable variation in detail precision in any direction. Error diffusion techniques may be used to improve fabricated part integrity. Improved intermachine portability is provided. Method, system, code, and media claims are included.
    Type: Application
    Filed: March 24, 2005
    Publication date: July 1, 2010
    Applicant: EX ONE CORPORATION
    Inventors: Judith L. Fisher, Lawrence J. Voss
  • Publication number: 20100161102
    Abstract: In a method of providing a material amount for a generative manufacturing method, a three-dimensional object (2) is formed by selectively solidifying layers of a material at locations corresponding to the cross-section of the object (2) in the respective layers. It is the object of the present invention to provide a method, by which the quality of the manufactured objects is reproducibly recorded and, thus, further improved. Therefore, the method is characterized by the steps of: providing at least one first material amount, which is characterized by at least one feature; detecting data, which relate to the at least one feature of the first material amount; and storing data, which relate to the at least one feature of the first material amount.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 24, 2010
    Applicant: EOS GmbH Electro Optical Systems
    Inventors: Thomas Mattes, Ludger Hümmeler, Markus Frohnmaier
  • Patent number: 7740991
    Abstract: A beam dose computing method includes specifying a matrix of rows and columns of regions as divided from a surface area of a target object to include first, second and third regions of different sizes, the third regions being less in size than the first and second regions, determining first corrected doses of a charged particle beam for correcting fogging effects in the first regions, determining corrected size values for correcting pattern line width deviations occurring due to loading effects in the second regions, using said corrected size values in said second regions to create a map of base doses of the beam in respective ones of said second regions, using said corrected size values to prepare a map of proximity effect correction coefficients in respective ones of said second regions, using the maps to determine second corrected doses of said beam for correction of proximity effects in said third regions, and using the first and second corrected doses to determine an actual beam dose at each position on
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: June 22, 2010
    Assignee: NuFlare Technology, Inc.
    Inventors: Keiko Emi, Junichi Suzuki, Takayuki Abe, Tomohiro Iijima, Jun Yashima