Random Number Generation Patents (Class 708/250)
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Patent number: 12632222Abstract: Embodiments herein provide a system and a method for generating a random bit string in an Integrated Circuit. Predefined number of One-time Programmable Memory (OTPM) devices are connected in parallel with each OTPM device configured for producing a random bit-string. Current limiting circuit is connected in series with the at least two OTPM devices. Voltage source supplies a predefined voltage to the at least two OTPM devices for producing a breakdown in one of an OTPM device of the at least two OTPM devices resulting in a broken OTPM device while leaving remaining OTPM devices of the at least two OTPM devices unbroken. The random bit string is generated through at least one of the broken OTPM device and a remaining unbroken OTPM device of the at least two OTPM devices.Type: GrantFiled: March 20, 2019Date of Patent: May 19, 2026Assignee: INDIAN INSTITUTE OF TECHNOLOGY BOMBAYInventors: Udayan Ganguly, Sunny Sadana, Ashwin Sanjay Lele
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Patent number: 12625679Abstract: Provided is a method for generating random sequences. The method is applicable to generating a random sequence using a plurality of state machines, any state machine of which is configured to generate an output value. The method includes: selecting, in accordance with a first rule, a state machine from the state machines successively to output a value according to history output values of at least a portion of the state machines; acquiring an output value of each of the state machines; and forming a random sequence from the output values of the state machines according to an output order of the state machines.Type: GrantFiled: June 25, 2021Date of Patent: May 12, 2026Assignees: Beijing BOE Technology Development Co., Ltd., BOE Technology Group Co., Ltd.Inventor: Xiangye Wei
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Patent number: 12627503Abstract: A system and method for generating cryptographic keys to secure wide-area network (WAN) traffic utilizing real-time, high-entropy data derived from a distributed physical layer. The system utilizes a hybrid multi-point architecture comprising: (1) a plurality of Mobile Nodes configured to harvest stochastic multi-sphere telemetry data (e.g., environmental, biological, galactic, and technological noise); (2) a plurality of Anchor Nodes configured to harvest stochastic data, validate Mobile Node location proofs via Time-Difference-of-Arrival (TDoA) analysis, and stabilize network topology; and (3) a Universal Entropy Engine configured to generate a global security hash (GSH). This GSH enables the derivation of ephemeral encryption keys for native decentralized networks and third-party overlays (e.g., SD-WAN, IoT). By coupling security to the vast, non-deterministic multi-sphere, the system defends against quantum and algorithmic threats.Type: GrantFiled: December 22, 2025Date of Patent: May 12, 2026Inventor: Todd E. Snyder
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Patent number: 12621138Abstract: Provided is a method for generating, by a random number generator of a cryptographic system, an independent bit sequence from a binary candidate random stream, said random generator comprising a source of randomness configured to generate a random noise, an analog to digital converter configured to generate a binary raw random stream by digitizing said random noise, said candidate random stream being obtained from said raw random stream. Other embodiments disclosed.Type: GrantFiled: December 2, 2022Date of Patent: May 5, 2026Assignee: THALES DIS FRANCE SASInventors: Benjamin Duval, Olivier Fourquin, Yannick Teglia
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Patent number: 12607700Abstract: A random transient power test signal generator based on three-dimensional memristive discrete map, which utilizes a three-dimensional parallel bi-memristor Logistic map module to generate two pseudo-random sequences, and based on the two pseudo-random sequences, uses two waveform output modules to generate a transient voltage signal and a transient current signal respectively, thus the random transient power testing signal is obtained.Type: GrantFiled: August 15, 2023Date of Patent: April 21, 2026Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINAInventors: Bo Xu, Yuhua Cheng, Kai Chen, Jia Zhao, Hang Geng, Yifan Wang
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Patent number: 12603658Abstract: A capacitive array D/A converter samples an input voltage, and outputs a signal that corresponds to the input voltage IN and a threshold voltage based on control data. A comparison circuit receives an output of the capacitive D/A converter and performs comparison processing according to a comparison clock. A clock generating circuit generates a successive approximation clock. A logic circuit supplies the comparison clock to the comparison circuit based on the successive approximation clock. When a predetermined second number of cycles of the successive approximation clock are detected before a predetermined number of cycles of an external clock are detected from the start of A/D conversion, the logic circuit judges that operation is normal. Otherwise, the logic circuit judges that an abnormal state has occurred.Type: GrantFiled: February 29, 2024Date of Patent: April 14, 2026Assignee: ROHM CO., LTD.Inventor: Haruaki Nakamura
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Patent number: 12549300Abstract: Systems, apparatuses, methods, and computer-readable media are provided for a user equipment (UE) for a wireless communication system. The UE determines at least one sidelink primary synchronization signal (S-PSS) sequence of at least one S-PSS signal. The at least one S-PSS sequence is different from a primary synchronization signal (PSS) sequence. The UE also determines at least one sidelink secondary synchronization signal (S-SSS) sequence of at least one SSSS signal. The UE determines a plurality of S-PSS symbols and a plurality of SSSS symbols corresponding to a sub carrier spacing (SCS). The UE transmits to another UE the determined plurality of S-SSS symbols after the determined plurality of S-PSS symbols. The SCS may be associated with a physical resource block (PRE) allocation size. A maximum of 11 PRBs for a sidelink synchronization signal block (S-SSB) may be set based on the SCS.Type: GrantFiled: February 12, 2020Date of Patent: February 10, 2026Assignee: Apple Inc.Inventors: Alexey Khoryaev, Mikhail Shilov, Sergey Panteleev, Sergey Sosnin, Daewon Lee
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Patent number: 12535992Abstract: This method is implemented within a digital processor by: a) searching an internal register (R1, R2, R3, . . . R(n)) of the processor which content (b0, b1, b2, . . . b(n)) changes over time; b) extracting at a given time n bits from the register, n?1; c) using the n bits extracted at step b) as bit(s) for forming a random number of N bits to be generated; d) reiterating (250) steps a) to c) until obtaining the N bits of the random number; and e) providing the random number to an application circuit or software. In order to increase randomness, the method further comprises a selection (240), by a random of pseudo-random process, of the n bits of the register which will be extracted, and/or a selection (230), by a random of pseudo-random process, of one register among a plurality of internal registers (R1, R2, R3, . . .Type: GrantFiled: April 13, 2022Date of Patent: January 27, 2026Assignee: KAPSLOGInventor: Peter Roger Simon
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Patent number: 12525978Abstract: An electronic circuit includes the following: a first circuit configured to generate a first output having a first voltage-rise time; a second circuit configured to vary, in accordance with data included in challenge data, the first output to a second output having a second voltage-rise time different from the first voltage-rise time; and a third circuit in which an initial value is inconstant, and in which an output value varies in accordance with the second voltage-rise time.Type: GrantFiled: December 28, 2023Date of Patent: January 13, 2026Assignee: Sharp Semiconductor Innovation CorporationInventor: Haruhiko Shigemasa
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Patent number: 12500734Abstract: A third party cryptographically determines a private set difference between a data set of a first party and a data set of a second party. The third party cryptographically generates a key pair including a private key and a public key, provides the public key to the first party and the second party, receives an encrypted result from the second party, wherein the encrypted result is computed prior to receipt by the third party using homomorphic operations performed using the public key, the data set of the first party, and the data set of the second party, decrypts the encrypted result using the private key to yield an intermediate data set, and determines the private set difference between the first data set and the second data set based on the intermediate data set.Type: GrantFiled: May 15, 2024Date of Patent: December 16, 2025Assignee: SEAGATE TECHNOLOGY LLCInventors: Foo Yee Yeo, Jason Hwei Ming Ying
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Patent number: 12470204Abstract: An entropy source circuit, comprising: a first adjustable ring oscillator for operating under a first setting or a second setting according to a first control signal, for respectively generating a first oscillation clock signal and a second oscillation clock signal which have different frequencies under the first setting and the second setting; a first sampling circuit, for sampling the first oscillating clock signal according to the sampling frequency to generate first sampling values, or sampling the second oscillating clock signal according to the sampling frequency to generate second sampling values; a first detection circuit detecting a first distribution of the first sampling values; and a control circuit generating the first control signal to switch the first setting to the second setting when the first distribution does not meet a predetermined distribution. The entropy source circuit outputs entropy values according to the first sample value or the second sample value.Type: GrantFiled: July 6, 2023Date of Patent: November 11, 2025Assignee: PUFsecurity CorporationInventors: Chi-Yi Shao, Kai-Hsin Chuang, Meng-Yi Wu
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Patent number: 12452033Abstract: Techniques are presented for a computer-implemented method that may be implemented using a blockchain network. The computer-implemented method includes: monitoring a system to detect a challenge to a proposer string in response to a request, and as a result of detecting the challenge: placing a first digital asset and a second digital asset under exclusive control of a group of nodes via a public key associated with a group of nodes, wherein the first and second digital assets are configured to be released when a threshold number of members of the group of nodes generate a valid signature for the public key associated with the group of nodes; resolving the challenge using a blockchain network; and distributing, by the group of nodes, digital assets from the first digital asset and the second digital asset to one or more parties of the system based at least in part on the solution.Type: GrantFiled: July 10, 2024Date of Patent: October 21, 2025Assignee: NCHAIN LICENSING AGInventors: Thomas Trevethan, Craig Steven Wright
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Patent number: 12436741Abstract: A secure microcontroller for controlling devices in automobiles comprises a semiconductor substrate, memory elements, at least one internal bus, at least one 8/16/32/64-bit microcontroller core, one or more data interfaces and at least one quantum process-based generator for true random numbers. The memory elements, the data interface, the quantum process-based generator and the microcontroller core are connected to the internal bus. The quantum process-based generator generates and provides a random number at the request of the microcontroller core. The microcontroller core generates a key using a program from one or more of its memory elements and the random number. The microcontroller core uses a program from one or more of its memory elements and the key to encrypt and decrypt data which it exchanges with devices external to the secure microcontroller. The semiconductor substrate integrally comprises the sub-devices of the secure microcontroller mentioned herein.Type: GrantFiled: October 25, 2022Date of Patent: October 7, 2025Assignee: ELMOS Semiconductor SEInventors: Jan Laubrock, Thomas Rotter, Julia Kölbel, Christian Lammers
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Patent number: 12416978Abstract: A displacement meter configured to measure a displacement of a measurement target object includes an illumination assembly configured to illuminate the measurement target object, a photoelectric conversion element array configured to detect reflected light from the measurement target object, and a calculation circuit configured to calculate an amount of the displacement of the measurement target object by using a cross-correlation function of a plurality of images acquired at different timings by the photoelectric conversion element array. The calculation circuit limits a detection range, where the calculation circuit performs processing for detecting a position indicating a peak of the cross-correlation function, to a part of an entire range of the cross-correlation function, detects the position indicating the peak in the limited detection range, and calculates the amount of the displacement based on the detected position indicating the peak.Type: GrantFiled: April 21, 2022Date of Patent: September 16, 2025Assignee: Canon Kabushiki KaishaInventors: Kazuyuki Kuratomi, Takayuki Uozumi
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Patent number: 12411659Abstract: Disclosed herein are three context-aware architectures to accelerate the three state-of-the-art deterministic methods of SC. The proposed designs employ a control unit to extract the minimum bit-width required to precisely represent each input data. The lengths of bit-streams are reduced to the minimum lengths required to precisely represent each input data. The noise-tolerance property of the designs is preserved as each bit-flip can only introduce a least significant bit error. The proposed designs achieve a considerable improvement in the processing time at a reasonable hardware cost overhead. The proposed designs make the deterministic bit-stream processing more appealing for applications that expect highly accurate computation and also for error-tolerant applications.Type: GrantFiled: June 10, 2021Date of Patent: September 9, 2025Assignee: University of Louisiana at LafayetteInventors: Sina Asadi, Mohammad Hassan Najafi
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Patent number: 12406726Abstract: The present disclosure provides mechanisms for reducing and suppressing random telegraph noise (RTN) for a crossbar circuit. A processing device may perform a programming process to program the conductance of a resistive random-access memory (RRAM) device in the crossbar circuit to a target conductance value. The processing device may then determine whether a random telegraph noise (RTN) value associated with the RRAM device is within a predetermined range of acceptable RTN values. If the RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, one or more noise-reduction voltages may be applied to the RRAM device until the RTN value associated with the RRAM device is within the predetermined range of acceptable RTN values.Type: GrantFiled: July 28, 2023Date of Patent: September 2, 2025Assignee: TetraMem Inc.Inventors: Mingyi Rao, Mingche Wu, Ning Ge
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Patent number: 12405769Abstract: A random number generation unit and a computing system using the same, the unit including a magnetic tunnel junction element and being capable of developing the characteristics required for the execution of probabilistic computing and operating at a higher speed. A magnetic tunnel junction element includes a fixed layer having a ferromagnet and having a magnetization direction fixed substantially, a free layer having a ferromagnet and having a magnetization direction varying with a first time constant, and a barrier layer disposed between the layers configured with an insulator. The magnetic tunnel junction element has a shift magnetic field of an absolute value of 20 millitesla or smaller. The fixed layer has a plurality of ferromagnetic and non-magnetic coupling layers laminated one upon another, and ferromagnetic layers adjacent to each other among the respective ferromagnetic layers are coupled in terms of magnetization by the non-magnetic coupling layers in an antiparallel manner.Type: GrantFiled: May 25, 2020Date of Patent: September 2, 2025Assignee: TOHOKU UNIVERSITYInventors: Shunsuke Fukami, William Andrew Borders, Takuya Funatsu, Shun Kanai, Keisuke Hayakawa, Hideo Ohno
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Patent number: 12393352Abstract: Methods, systems, and devices for authenticated modification of memory system data are described. A host system may transmit a command to program data to a protection region of a memory system, and the host system may sign the command using a key associated with the protection region. In some examples, the host system may transmit the data associated with the command, or the command may include instructions to move the data from another region of the memory system. Upon receiving the command, the memory system may verify the signature to determine whether the host is authorized to modify the protection region, and may program the data as requested by the host system. In some cases, the protection regions of the memory system may be updated, for example by adjusting the size or address range of the protection regions, in response to a command from the host system.Type: GrantFiled: May 20, 2022Date of Patent: August 19, 2025Assignee: Micron Technology, Inc.Inventors: Lance W. Dover, Giuseppe Vito Portacci, Giuseppe Ferrari
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Patent number: 12388615Abstract: Provided is a method for securing against side channel attacks. An elliptic curve cryptographic process comprises a multiple points multiplication operation using predetermined scalar values, Pi being points of an elliptic curve over a finite field defined by parameters (F, E, G, N) together with the point addition law where F is a field over which is defined the curve, E is an equation of the curve, G is a base point in E over F and N is the order of the base point G. The method comprises generating (S1) a masking value iRand, multiplicatively masking (S2) each predetermined scalar value di with said generated masking value iRand to obtain masked scalars di?, computing (S3) a masked multiple points multiplication operation result, and obtaining (S4) said multiple points multiplication operation result R by unmasking said masked multiple points multiplication operation result R?.Type: GrantFiled: January 11, 2022Date of Patent: August 12, 2025Assignee: THALES DIS FRANCE SASInventors: David Vigilant, Steven Madec, Mylène Roussellet
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Patent number: 12381713Abstract: According to one embodiment, an encryption communication system configures a network with a plurality of nodes, and shares the encryption key between a first node that delivers the encryption key to a first user and a second node that delivers the encryption key to a second user. The first node forms n (n>1) systems of paths to the second node over the network, generates n pieces of first data, distributes the n pieces of first data to the n systems of paths and transmits the n pieces of first data to the second node, and generates the encryption key by superimposing the n pieces of first data. The second node receives the n pieces of first data from the first node via the n systems of paths, and generates the encryption key by superimposing the n pieces of first data.Type: GrantFiled: March 29, 2023Date of Patent: August 5, 2025Assignees: Kabushiki Kaisha Toshiba, Toshiba Digital Solutions CorporationInventors: Kazuhisa Kaino, Masakatsu Matsuo, Manabu Kobayashi, Koki Ando
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Patent number: 12373180Abstract: The present disclosure provides an interpreter of a reconfigurable cryptographic algorithm based on customized high-level C language, in the field of information security. The interpreter includes an input program of cryptographic algorithm customized language, a compilation optimization module, an intermediate file and data flow graph generation module, a mapping module and an array generation configuration code module. The disclosure provides an automatic mapping tool for the reconfigurable processor, which can take customized high-level C language as input, and the interpreter arranges and connects computing units like operators according to the input high-level C program, to complete the mapping of the whole computing function.Type: GrantFiled: July 19, 2023Date of Patent: July 29, 2025Assignee: SOUTHEAST UNIVERSITYInventors: Wei Ge, Chongyang Li, Qingxiao Zhou, Yanhong Xu
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Patent number: 12367013Abstract: The invention relates to devices for generating true random numbers, comprising a digital chaotically oscillating autonomous Boolean network as a source of entropy. According to the invention, the proposed digital chaotically oscillating autonomous Boolean network consists in three logic elements connected to each other, two of which represent two-input “Exclusive OR” and/or “Exclusive NOR” gates, and the third logic element has three inputs and one output, and implements a logic “counting ones” function, in which its output is set to a logic one if a logic one is present at no more than one of its inputs, otherwise it is set to a logic zero. The achieved technical result consists in an increase in true random number generation rate while decreasing energy consumption.Type: GrantFiled: January 18, 2021Date of Patent: July 22, 2025Assignee: PHYSTECH TECHNOLOGIES TRUE RANDOM AGInventor: Sergey Vladimirovich Goncharov
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Patent number: 12346902Abstract: The invention relates to distributed ledge technologies such as consensus-based blockchains. Computer-implemented methods for a secure random number generation within blockchain scripts are described. The invention is implemented using a blockchain network, which may be, for example, a Bitcoin blockchain. A first transaction that includes a puzzle is validated at a node in a blockchain network, with the first transaction being associated with a digital asset, and with a solution to the puzzle being indeterminable at a time of validation of the first transaction. A pseudorandom number, based at least in part on a solution to the puzzle that is included in a second transaction, is generated at least in part by validating the second transaction, the second transaction created to transfer control of the digital asset associated with the first transaction. Control of the digital asset is transferred based at least in part on the pseudorandom number.Type: GrantFiled: August 13, 2018Date of Patent: July 1, 2025Assignee: NCHAIN LICENSING AGInventors: Ying Chan, Dean Kramer, Craig Steven Wright
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Patent number: 12335396Abstract: An instance of the quantum token generating service is instantiated responsive to a request for instantiation of a quantum token generating service from an authenticating computing system. Instantiation of the instance of the quantum token generating service includes reserving a set of qubits for the instance of the quantum token generating service that are accessible to the authenticating computing system. It is determined that the authenticating computing system has accessed the set of qubits via the instance of the quantum token generating service to generate a first token. Electromagnetic bias is applied to a qubit of the set of qubits to weight the qubit such that each subsequent token generated with the instance of the quantum token generating service is different than the first token.Type: GrantFiled: May 18, 2023Date of Patent: June 17, 2025Assignee: Red Hat, Inc.Inventors: Leigh Griffin, Stephen Coady
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Patent number: 12321715Abstract: A system and a method for verifying a randomness of an intended random number is provided. The method includes: accessing the intended random number; converting the intended random number into a bitmap image; analyzing the bitmap image with reference to a predetermined model; and using a result of the analyzing to determine whether the intended random number is a true random number or a pseudorandom number. The analysis of the bitmap image may be performed by using a machine learning image classification technique with respect to a model that is trained by using white noise images.Type: GrantFiled: February 9, 2021Date of Patent: June 3, 2025Assignee: JPMORGAN CHASE BANK, N.A.Inventors: Alexander Buts, Marco Pistoia, Dylan Herman
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Patent number: 12323511Abstract: A device for generating random bit sequences is provided. The device includes at least one Silicon Photo-Multiplier sensor configured to generate a sequence of endogenous random current pulses as a result of an impact ionization driven self-amplification of thermally generated charge carriers to which the at least one Silicon Photo-Multiplier sensor is subject, and a data processing unit configured to receive the sequence of endogenous random current pulses and to determine a random bit sequence to be provided to an end user on the basis of the sequence of endogenous random current pulses received from the at least one Silicon Photo-Multiplier sensor.Type: GrantFiled: October 1, 2019Date of Patent: June 3, 2025Assignee: RANDOM POWER SRL IN FORMA ABBREVIATA RAP! S.R.L.Inventors: Massimo Luigi Maria Caccia, Lorenza Paolucci
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Patent number: 12299182Abstract: The present disclosure is drawn to, among other things, a storage device. The storage device may include a magnetic tunnel junction (MTJ)-based storage array and a communication interface. The MTJ-based storage array may be configured to be damaged by a shorting voltage based on detection of a tamper event.Type: GrantFiled: April 22, 2022Date of Patent: May 13, 2025Assignee: Everspin Technologies, Inc.Inventors: Syed M. Alam, Sanjeev Aggarwal
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Patent number: 12254286Abstract: A random number supply device that generates three states required for operation of a signal processing unit from two-bit random number, includes a decision section decides whether a first random number generated by a first random number generator matches a predetermined value, and a control section supplies the signal processing unit with two-bit random number including the first random number by not using a second random number generated by a second random number generator when the first random number matches the predetermined value, and by using the second random number when the first random number does not match the predetermined value.Type: GrantFiled: December 12, 2018Date of Patent: March 18, 2025Assignee: NEC CORPORATIONInventor: Ken-ichiro Yoshino
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Patent number: 12248465Abstract: A system and method uses a set of processors that each perform a logic function to identify portions of a data source meeting a criteria. Each logic function is performed against a row of a column of the data source, and a value that is derived from the criteria for that logic function, which is also derived from the criteria. The output of each of the logic functions is applied as an address to a table that has been configured to read true at the addresses corresponding to the criteria being met, and false otherwise. Data from the row of the database table having a table value of true are retrieved from the data source.Type: GrantFiled: September 20, 2022Date of Patent: March 11, 2025Assignee: Yellowbrick Data, Inc.Inventors: Adel Alsaadi, Paritosh Kulkarni, Jim Peterson
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Patent number: 12250311Abstract: A calculation device is disclosed. The calculation device includes: a memory storing at least one instruction and identity information; and a processor performing the at least one instruction, wherein the processor may randomly sample small elements, generate a function-processed output value by function-processing the stored identity information, and generate an encrypted text for a message by using a master public key computed using a ring having a dimension (d) represented by a power of 2 and an integer multiplication of 3 or more, the sampled small elements and the function-processed output value.Type: GrantFiled: February 28, 2024Date of Patent: March 11, 2025Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jung Hee Cheon, Yongha Son, Duhyeong Kim
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Patent number: 12230097Abstract: Method and apparatus are described which are used to provide enhanced functionality on gaming devices associated with the play of wager-based games. A secondary processor, separate from a game controller on the gaming device, can be used to provide the enhanced functionality. In one embodiment, the secondary processor can be used to control a display interface on a video display, such as a video display used to play a wager-based game on the gaming device. The display interface can be used to purchase items, such as a lottery ticket, under control of the secondary processor. After purchase, the lottery ticket can be dispensed from the gaming device using a printer. After the lottery ticket is dispensed, it can be reinserted into the gaming device and validated. If any winnings are associated with the lottery ticket, it can be credited to the electronic gaming machine.Type: GrantFiled: March 30, 2022Date of Patent: February 18, 2025Assignee: IGTInventors: Ali Saffari, Thomas Mikulich, Chris Gumiela, Kirk Kover, William R. Wells
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Patent number: 12217022Abstract: A random number generator system is disclosed that includes a quantum event source for generating a quantum event, a quantum event detector for detecting the generated quantum event, a clock circuit providing a looping counting signal including a plurality of counts (n0, n1 etc.), a converter circuit for associating the detected quantum event with a contemporaneous count of the plurality of counts, and a processing system for providing a random number based on the contemporaneous count.Type: GrantFiled: July 10, 2023Date of Patent: February 4, 2025Assignee: Qwerx Inc.Inventors: John Ellingson, Matthew Richardson
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Patent number: 12211529Abstract: A computer-implemented method for preparing a disk for a disk drive for operation includes: writing first and second servo information in a first portion of a servo sector for a track of the disk; writing third and fourth servo information in a second portion of the servo sector; in a single revolution of the disk, reading a first signal associated with the first servo information, a second signal associated with the second servo information, a third signal associated with the third servo information, and a fourth signal associated with the fourth servo information; based on the first signal, the second signal, the third signal, and the fourth signal, determining a repeatable runout value for the servo sector; and storing the repeatable runout value for the servo sector in a location that is accessed during operation and used during the operation as a repeatable runout correction factor for the track.Type: GrantFiled: August 17, 2023Date of Patent: January 28, 2025Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Gabor Szita, Richard M. Ehrlich
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Patent number: 12200826Abstract: A substrate processing apparatus includes an AD converter configured to output digital values of a voltage applied to a heater resistor and a current flowing in the heater resistor; and a controller configured to control a temperature of the heater resistor by using a calculation voltage and a calculation current configured to calculate a resistance value of the heater resistor, which are obtained from an output result of the AD converter. The controller calculates at least one of the calculation voltage or the calculation current, based on a combination result of a digital signal obtained from the output result of the AD converter and a noise signal including a normal distribution noise.Type: GrantFiled: August 25, 2021Date of Patent: January 14, 2025Assignee: TOKYO ELECTRON LIMITEDInventor: Kazuhito Yamada
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Patent number: 12182536Abstract: A method for entropy scaling in quantum random number generators, comprising dividing one spatial mode into multiple spatial modes, delaying each spatial mode, and recombing the spatial modes; detecting first temporal states with synchronisation to a photon generation time and encoding the first temporal states into first time bins; detecting second temporal states in an arbitrary clock, and encoding the second temporal states into second time-bins.Type: GrantFiled: July 13, 2021Date of Patent: December 31, 2024Assignee: INSTITUT NATIONAL DE LA RECHERCHE SCIENTIFIQUEInventors: Shashwath Shankar Bharadwaj, James Van Howe, Piotr Roztocki, Yoann Jestin, José Azaña, Roberto Morandotti
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Patent number: 12166540Abstract: In an embodiment an apparatus includes a contactless transponder including a contactless interface and a wired interface, wherein the contactless transponder is configured to communicate with a contactless reader according to a contactless protocol through the contactless interface, a wired communication bus connected to the wired interface and at least one module connected to the bus, wherein the transponder is configured so that the reader is a master on the bus when the reader and the transponder communicate.Type: GrantFiled: May 14, 2020Date of Patent: December 10, 2024Assignee: STMicroelectronics (Grenoble 2) SASInventor: Jean-Louis Labyre
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Patent number: 12155680Abstract: A method of monitoring and protecting access to an online service from Account Take Over may include: providing a Traffic Inspector in communication with a client device and web server; providing a Traffic Analyzer in communication with the Inspector; identifying each browsing session of the client device; extracting and identifying one or more usernames when a user performs authentication to the online service by analyzing traffic exchanged between the client device and web server; collecting first data concerning unique and/or non-unique technical parameters and associating the first data with respective identified one or more usernames and with the client device; collecting second data concerning unique and/or non-unique technical parameters and associating the second data with an anonymous application browsing session or web beacon; and taking security measures when a number of identified usernames associated with the anonymous application browsing session or web beacon exceeds a predetermined threshold vType: GrantFiled: March 16, 2022Date of Patent: November 26, 2024Assignee: CLEAFY SOCIETÀ PER AZIONIInventors: Nicolò Pastore, Carmine Giangregorio
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Patent number: 12147785Abstract: A system for generating a biased random bit stream, wherein said biased bit stream has different predetermined probabilities of occurrence for bit “0” and bit “1”, said system comprising: a true random generator unit configured to output a true random bit stream, a pseudo random generator unit configured to output a pseudo random bit stream, said pseudo random bit stream comprising n bit words, where n is an integer of at least two; a combining unit configured to combine a bit from said true random generator unit with an n-bit word from said pseudo random generator unit to output a processed n-bit word; and an output unit configured to generate an output bit value from said processed n-bit word using a function, wherein said function is selected to control the probabilities of occurrence of the bit “0” values and bit “1” values to be the predetermined probabilities of occurrence.Type: GrantFiled: February 26, 2021Date of Patent: November 19, 2024Assignee: Kabushiki Kaisha ToshibaInventors: Davide Giacomo Marangon, Mirko Sanzaro, Taofiq Paraiso, Thomas Roger, Innocenzo De Marco, Zhiliang Yuan, Andrew James Shields
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Patent number: 12147587Abstract: Secure serial bus communication methods and devices suitable for automotive applications. An illustrative sensor IC includes: a sensor controller that operates a transducer to obtain measurement data formattable as data packets; a scrambler that masks each data packet with a scrambling operation before that data block is sent via a serial bus to a bus controller device, said scrambling operation having a secret configuration and/or secret initial state; and an integrated circuit component that operates on a seed value to derive the secret configuration and/or secret initial state.Type: GrantFiled: March 23, 2022Date of Patent: November 19, 2024Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Marek Hustava
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Patent number: 12148504Abstract: A random data generation circuit includes: a first shift register and a second shift register. The first shift register includes n output ends Q1 to Qn, the second shift register includes n output ends Qn+1 to Q2n, and each of the output ends outputs 1-bit data in a clock cycle of a clock signal; and a parallel-to-serial circuit, coupled to the output ends Q1 to Q2n and configured to convert parallel data output from Q1 to Q2n in a clock cycle into serial data for output. An initial value of the first shift register is different from an initial value of the second shift register. Data may be generated in parallel by using two shift registers, and the parallel data generated by the two shift registers is converted into serial data by using the parallel-to-serial circuit to be output.Type: GrantFiled: January 5, 2023Date of Patent: November 19, 2024Assignee: Changxin Memory Technologies, Inc.Inventors: Biao Cheng, Tianchen Lu
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Patent number: 12148488Abstract: A memory system according to an aspect of the present disclosure includes a soft error generator that generates write data or read data considering a probability error by using a specific number as a random number. In the memory system, the write data or the read data considering a probability error is generated by using the random number. Herein, whether or not an error occurs is randomly changed depending on the random number. Accordingly, an error stochastically occurs, which makes it possible to reproduce a soft error.Type: GrantFiled: May 20, 2021Date of Patent: November 19, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Midori Aizawa, Masami Kuroda, Haruko Takahashi
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Patent number: 12141547Abstract: Techniques and mechanisms providing a mode of random number generation to satisfy a requirement for a consumer of random numbers. In an embodiment, a device comprises a Gaussian random number generator (GRNG) circuit, multiple uniform random number generator URNG circuits, and circuitry which is coupled between the GRNG circuit and the URNG circuits. Based on an indication of one or more required performance characteristics and/or one or more required statistical characteristics, a controller identifies a corresponding one of multiple available random number generation (RNG) modes. The controller communicates control signals to provide the mode with the circuitry. In another embodiment, the control signals configure the circuitry to select one or more of the URNG circuits for use in calculating random numbers with the GRNG circuit.Type: GrantFiled: December 22, 2020Date of Patent: November 12, 2024Assignee: Intel CorporationInventors: Deepak Dasalukunte, Richard Dorrance, David Gonzales Aguirre
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Patent number: 12141803Abstract: The invention relates to distributed ledge technologies such as consensus-based blockchains. Computer-implemented methods for a secure random number generation within blockchain scripts are described. The invention is implemented using a blockchain network, which may be, for example, a Bitcoin blockchain. A third transaction is validated. The third transaction is associated with a third digital asset and includes a first and second puzzle in a locking script. The first puzzle is included, in a first transaction, in a first locking script that encumbers transfer of control of a first digital. The second puzzle is included, in a second transaction, in a second locking script that encumbers transfer of control of a second digital asset. A pseudorandom number is generated based at least in part on solutions to the first and second puzzles. Control of the third digital asset is transferred based at least in part on the pseudorandom number.Type: GrantFiled: August 13, 2018Date of Patent: November 12, 2024Assignee: nChain Licensing AGInventors: Ying Chan, Dean Kramer
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Patent number: 12135830Abstract: Each of a secure computation server apparatuses includes a random number generation part that generates random numbers using a pseudo random number generator shared among the secure computation server apparatuses; a seed storage part that shares and stores a seed(s) used for generating random numbers in the random number generation part; a pre-generated random number storage part that stores random numbers generated by the random number generation part; a share value storage part that stores a share(s) to be a target of processing; a logical operation part that computes a carry to be transmitted and received among the secure computation server apparatuses using the random numbers and the share(s) to be a target of processing; an inner product calculation part that removes a mask from the carry; and an arithmetic operation part that performs a processing of erasing the carry to obtain a processing result.Type: GrantFiled: January 20, 2020Date of Patent: November 5, 2024Assignee: NEC CORPORATIONInventor: Hikaru Tsuchida
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Patent number: 12112242Abstract: Techniques for performing improved machine learning using decision trees are disclosed. In one example, a system includes a plurality of decision tree structures, and configuration logic operatively coupled to the plurality of decision tree structures. The configuration logic selectively configures the plurality of decision tree structures to form at least one of: one or more combined decision tree structures, wherein a combined decision tree structure comprises multiple interconnected ones of the plurality of decision tree structures; and one or more individual decision tree structures, wherein an individual decision tree structure comprises a single one of the plurality of decision tree structures.Type: GrantFiled: August 6, 2020Date of Patent: October 8, 2024Assignee: International Business Machines CorporationInventors: Mingu Kang, Seonghoon Woo, Eun Kyung Lee, Sukjay Chey
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Patent number: 12095911Abstract: An electronic device according to an embodiment includes a first random number generator module, a second random number generator module, a buffer memory configured to store random number data, and a processor configured to be operatively connected to the first random number generator module, the second random number generator module, and the buffer memory, wherein the processor is configured to acquire a first random number sequence from the first random number generator module to store the acquired first random number sequence in the buffer memory, generate a third random number sequence obtained by changing the first random number sequence based on a second random number sequence acquired from the second random number generator module, and generate an encryption key based on the third random number sequence. In addition, various other embodiments are possible.Type: GrantFiled: March 8, 2022Date of Patent: September 17, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Jungha Paik, Bumhan Kim, Jeongil Kim, Jonghyun Ahn, Jaeyoon Lee, Hoyong Jeong
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Patent number: 12086570Abstract: An actively stabilized random number generator includes a random number generator and a feedback controller. The random number generator includes a chaotic physical circuit realizing an iterated function. The iterated function is configured to produce a trajectory of iterates and has an operating parameter ? and a desired Markov operating point. A binary bit converter has a symbol function configured to produce binary symbols from the trajectory of iterates and a maximal kneading sequence. The feedback controller is configured to observe the maximal kneading sequence within the trajectory of iterates and adjust the operating parameter to the desired Markov operating point.Type: GrantFiled: March 23, 2021Date of Patent: September 10, 2024Assignee: United States of America, as represented by the Secretary of the ArmyInventors: Ned J Corron, Jonathan N Blakely
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Patent number: 12079591Abstract: A neural network device includes a floating-point arithmetic circuit configured to perform a dot product operation and an accumulation operation; and a buffer configured to store first cumulative data generated by the floating-point arithmetic circuit, wherein the floating-point arithmetic circuit is further configured to perform the dot product operation and the accumulation operation by: identifying a maximum value from a plurality of exponent addition results, obtained by respectively adding exponents of a plurality of floating-point data pairs, and an exponent value of the first cumulative data; performing, based on the maximum value, an align shift of a plurality of fraction multiplication results, obtained by respectively multiplying fractions of the plurality of floating-point data pairs, and a fraction part of the first cumulative data; and performing a summation of the plurality of aligned fraction multiplication results and the aligned fraction part of the first cumulative data.Type: GrantFiled: March 30, 2021Date of Patent: September 3, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunpil Kim, Hyunwoo Sim, Seongwoo Ahn, Hasong Kim, Doyoung Lee
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Patent number: 12074963Abstract: A computer-implemented method that may be implemented using a blockchain network including monitoring a computational task distribution system to detect a challenge to a proposer string provided by a proposer computer system in response to a request made by a requester computer system, and as a result of detecting the challenge, at least: resolving the challenge using a first blockchain network by at least selecting a solution from a set of solutions provided to the first blockchain network, the set of solutions at least including the proposer string; and distributing digital assets from the first digital asset and the second digital asset to one or more parties of the computational task distribution system based at least in part on the solution.Type: GrantFiled: November 21, 2022Date of Patent: August 27, 2024Assignee: nChain Licensing AGInventors: Thomas Trevethan, Craig Steven Wright
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Patent number: 12034834Abstract: A method for encryption that combines the steganographic method of concealing data inside a truly random string of bits with a cryptographic key that allows for the random distribution of this data, essentially creating a symmetrical cipher.Type: GrantFiled: February 23, 2023Date of Patent: July 9, 2024Assignee: RANDAEMON SP. Z O.O.Inventors: Jan Jakub Tatarkiewicz, Wieslaw Bohdan Kuźmicz