Random Number Generation Patents (Class 708/250)
  • Patent number: 10929102
    Abstract: A true random number generator is provided. The true random number generator includes an Exclusive-Or (XOR) circuit and multiple random entropy source circuits. One entropy source sampling process is performed at an output terminal of each of at least two inverters in each of the multiple random entropy source circuits, which is performed by a flip-flop corresponding to the inverter. Sampling results are inputted to an XOR unit in the random entropy source circuit and XOR processing is performed on the sampling results. XOR processing results outputted by the multiple of random entropy source circuits are inputted to the XOR circuit, and the XOR processing is performed on the XOR processing results to obtain a random number sequence.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: February 23, 2021
    Assignee: TONGXIN MICROELECTRONICS CO., LTD.
    Inventors: Jinhuang Huang, Qiulin Xu, Linlin Su, Yuchen Wang, Chao Yue
  • Patent number: 10922052
    Abstract: A method and apparatus is provided for generating pseudorandom numbers in a way that is deterministic (i.e., repeatable), that passes statistical tests, can have multiple instances of objects generating pseudorandom numbers at the same time. Also, the collection of pseudorandom numbers generated by multiple instances have the same statistical properties as numbers generated by a single instance (i.e., randomness). Embodiments described herein generate pseudorandom values by using a plurality of subsidiary linear congruential generators and combining their outputs nonlinearly. According to embodiments, after their outputs have been combined, a mixing function is applied. Embodiments include an on-demand split method in the style of the SplitMix algorithm.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: February 16, 2021
    Assignee: Oracle International Corporation
    Inventor: Guy L. Steele, Jr.
  • Patent number: 10917235
    Abstract: A method for performing privacy-preserving or secure multi-party computations enables multiple parties to collaborate to produce a shared result while preserving the privacy of input data contributed by individual parties. The method can produce a result with a specified high degree of precision or accuracy in relation to an exactly accurate plaintext (non-privacy-preserving) computation of the result, without unduly burdensome amounts of inter-party communication. The multi-party computations can include a Fourier series approximation of a continuous function or an approximation of a continuous function using trigonometric polynomials, for example, in training a machine learning classifier using secret shared input data.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: February 9, 2021
    Inventors: Nicolas Gama, Jordan Brandt, Dimitar Jetchev, Stanislav Peceny, Alexander Petric
  • Patent number: 10901695
    Abstract: Disclosed herein is a true random number generator (TRNG). The TRNG includes an enclosure defining a cavity and a cap covering the cavity and having a cap surface exposed to the cavity, the cap surface including radioactive nickel. An electronic sensor within a cavity detects electrons from the decay of the nickel and produces a signal for the detected energy. An amplifier is connected to the sensor and is constructed to amplify the signal and then feeds the signal to a filter. A processor connected to the filter generates a true random number based on the signal. This TRNG may be formed on an integrated circuit.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: January 26, 2021
    Assignee: RANDAEMON SP. Z O.O.
    Inventors: Jan Jakub Tatarkiewicz, Janusz Jerzy Borodzinski, Wieslaw Bohdan Kuzmicz
  • Patent number: 10862591
    Abstract: Disclosed in some examples, are optical devices, systems, and machine-readable mediums that send and receive multiple streams of data across a same optical communication path (e.g., a same fiber optic fiber) with a same wavelength using different light sources transmitting at different power levels—thereby increasing the bandwidth of each optical communication path. Each light source corresponding to each stream transmits at a same frequency and on the same optical communication path using a different power level. The receiver differentiates the data for each stream by applying one or more detection models to the photon counts observed at the receiver to determine likely bit assignments for each stream.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 8, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amer Aref Hassan, Wei-Chen Chen
  • Patent number: 10839642
    Abstract: A gambling hybrid game that provides game history validation. The gambling hybrid game includes an entertainment system engine that provides an entertainment game to a user, a real world engine that provides gambling games to users, and a game world engine that monitors the entertainment game and provides gambling games when appropriate. The entertainment system engine stores game history information in response to a trigger event and provides at least a portion of the stored game history information to a game world engine. The game world engine stores received portion of the game history information. When a request for game history verification is received by the game world engine, the game world engine retrieves the game history information from the entertainment system engine and used the portion of the game history information stored by the game world engine to verify the game history information from the entertainment system engine.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: November 17, 2020
    Inventors: Miles Arnone, Frank Cire, Clifford Kaylin, Scott Shimmin, Eric Meyerhofer
  • Patent number: 10824397
    Abstract: Disclosed is a method of manufacturing a Random Telegraph Noise source for use within true random number generators, comprising: subjecting a single semiconductor device to stress for a given period of time; and conditioning the single semiconductor device for a given period of time. Also disclosed is a true random number generator and a method of generating true random numbers.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 3, 2020
    Assignee: LIVERPOOL JOHN MOORES UNIVERSITY
    Inventors: Zhigang Ji, Jianfu Zhang
  • Patent number: 10784966
    Abstract: Disclosed in some examples, are optical devices, systems, and machine-readable mediums that send and receive multiple streams of data across a same optical communication path (e.g., a same fiber optic fiber) with a same wavelength using different light sources transmitting at different power levels—thereby increasing the bandwidth of each optical communication path. Each light source corresponding to each stream transmits at a same frequency and on the same optical communication path using a different power level. The receiver differentiates the data for each stream by applying one or more detection models to the photon counts observed at the receiver to determine likely bit assignments for each stream.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: September 22, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amer Aref Hassan, Wei-Chen Chen
  • Patent number: 10778407
    Abstract: A multi-word multiplier circuit includes an interface and circuitry. The interface is configured to receive a first parameter X including one or more first words, and a second parameter Y? including multiple second words. The second parameter includes a blinded version of a non-blinded parameter Y that is blinded using a blinding parameter AY so that Y?=Y+AY. The circuitry is configured to calculate a product Z=X·Y by summing multiple sub-products, each of the sub-products is calculated by multiplying a first word of X by a second word of Y?, and subtracting from intermediate temporary sums of the sub-products respective third words of a partial product P=X·BY, BY is a blinding word included in AY.
    Type: Grant
    Filed: March 25, 2018
    Date of Patent: September 15, 2020
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Moshe Alon
  • Patent number: 10748454
    Abstract: An assigned share which is a proper subset of a subshare set with a plurality of subshares as elements, and meta information indicating values according to the elements of the subshare set or indicating that the elements are concealed values are stored. When a value according to a provided corresponding value according to a subset of the assigned share is not obtained from the meta information, a provided value according to the provided corresponding value obtained from the subset of the assigned share is outputted. When a value according to an acquired corresponding value according to a subset of an external assigned share, which is a proper subset of the subshare set, is not obtained from the meta information, input of an acquired value according to the acquired corresponding value is accepted. When the acquired value is inputted, a secret share value is obtained at least using the acquired value.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: August 18, 2020
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai Ikarashi
  • Patent number: 10749695
    Abstract: A system and method for utilizing a security key stored in non-volatile memory, and for generating a PUF-based data set on an integrated circuit including non-volatile memory cells, such as flash memory cells, are described. The method includes storing a security key in a particular block in a plurality of blocks of the non-volatile memory array; utilizing, in a security logic circuit coupled to the non-volatile memory array, the security key stored in the particular block in a protocol to enable access via a port by external devices or communication networks to data stored in blocks in the plurality of blocks; and enabling read-only access to the particular block by the security logic for use in the protocol, and preventing access to the particular block via the port.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: August 18, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chun-Hsiung Hung, Kuen-Long Chang, Ken-Hui Chen, Shih-Chang Huang
  • Patent number: 10740068
    Abstract: A modular reduction device particularly for cryptography on elliptical curves. The device includes a Barrett modular reduction circuit and a cache memory in which the results of some precalculations are carried out. When the result is not present in the cache memory, a binary division circuit makes the precalculation and stores the result in the cache memory.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: August 11, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Thomas Hiscock
  • Patent number: 10698658
    Abstract: Apparatuses and methods disclosed herein relate to detecting a signal generated by a spin torque oscillator (STO). The signal is outputted, wherein the signal includes a direct current (DC) component, a wide bandwidth noise component, and an STO oscillating radio frequency (RF) component. The signal is filtered, wherein the filtering removes the DC component and the STO oscillating RF component, leaving the wide bandwidth noise component. A value of the wide bandwidth noise component is converted into a binary value, and a bit from the binary value is selected and combined with another bit to form a random number.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: June 30, 2020
    Assignee: Seagate Technology LLC
    Inventors: Xiong Liu, Lihong Zhang, WenXiang Xie, Quan Li
  • Patent number: 10685150
    Abstract: An experiment manager is discussed for the design and execution of numerical experiments in composite simulation models, such as those created using the Smarter Planet Platform for Analysis Simulation of Health (Splash). The experiment manager independently elicits experiment-related information from each contributor of a component model, and uses this information to subsequently assist the creator of a composite model in selecting experimental factors, creating experimental designs based on these factors, and executing the experiments. This functionality permits cross-disciplinary modeling, simulation, sensitivity analysis and optimization in the setting of complex systems.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: June 16, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicole C Barberis, Peter J Haas, Paul P Maglio, Piyaphol Phoungphol, Patricia G Selinger, Wang-Chiew Tan, Ignacio G Terrizzano
  • Patent number: 10678511
    Abstract: A method for using cellular automata to generate quality pseudo-random numbers, which may be used in cryptographic and other applications. A cellular automaton is a decentralized computing model that enables the performance of complex computations with the help of only local information. In general, cellular automata comprise a plurality of identical basic memory building blocks that are discrete in time and space, where the structure evolves over time according to a local transition rule. Cellular automata can be used in information security as an alternative for classic Feedback Shift Registers (FSRs) for pseudo-random sequence generation. The outputs of a pair of linear FSRs (LFSRs) act as continuous inputs to the two boundaries of a one-dimensional or two-dimensional elementary cellular automata.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: June 9, 2020
    Inventor: Karim Salman
  • Patent number: 10656916
    Abstract: Embodiments include apparatuses, methods, and systems for a random number generator that includes an entropy source. The entropy source may be coupled to a deterministic feedback circuit and a stochastic feedback circuit. The deterministic feedback circuit may include detection logic to detect when a bit of the output signal of the entropy source has registered, a pre-delay feedback path to cause the entropy source to power off responsive to the detection, and a post-delay feedback path to cause the entropy source to power on, after the entropy source is powered off, to generate a second bit of the output signal. The post-delay feedback path may include one or more delay cells that are bypassed by the pre-delay feedback path. Other circuits and techniques related to random number generators are also described. Further embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: May 19, 2020
    Assignee: Intel Corporation
    Inventors: Rachael J. Parker, Calvin Chiem
  • Patent number: 10635399
    Abstract: A system, method, and device for stochastically processing data. There is an architect module operating on a processor configured to manage and control stochastic processing of data, a non-deterministic data pool module configured to provide a stream of non-deterministic values that are not derived from a function, a plurality of functionally equivalent data processing modules each configured to stochastically process data as called upon by the architect module, a data feed configured to feed a data set desired to be stochastically processed, and a structure memory module including a memory storage device and configured to provide sufficient information for the architect module to duplicate a predefined processing architecture and to record a utilized processing architecture.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: April 28, 2020
    Assignee: CASSY HOLDINGS LLC
    Inventor: Patrick D. Ross
  • Patent number: 10635401
    Abstract: A method for optimal arrangement of a random generator on an electronic component, which includes a programmable integrated circuit and a basic structure consisting of a plurality of basic blocks, wherein during an initialization phase, starting from a starting configuration for a respective current arrangement of the random generator, the following are performed with a predefined number of repetitions, i.e., a predefined test sequence is performed for the current arrangement of the random generator, a test result is forwarded to a reconfiguration module and the current arrangement on the electronic component is reconfigured via the reconfiguration module, where upon each repetition, the test result of the current arrangement of the random generator is compared with the test result of a previous arrangement, and the current arrangement is saved in the reconfiguration module, if the test result for the current arrangement has a better test result than the previous arrangement.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 28, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thomas Hinterstoisser, Martin Matschnig, Herbert Taucher
  • Patent number: 10637597
    Abstract: A network of computing devices includes a timing reference, a free-run node, and an aggregator. The reference calculates a first communication packet having a reference timestamp and reference data, and transmits the first packet to the free-run node. The free-run node receives the first packet from the timing reference, calculates a second packet having metadata that includes the reference timestamp, a sparse hash value calculated from the reference data, and a free-run node timestamp, and publishes the second packet to the aggregator. The aggregator receives the second packet and calculates a compensation value from the reference timestamp, the sparse hash value, and the free-run node timestamp. Computer-implemented methods include the free-run node receiving the compensation value and updating its local clock based on the compensation value. Other methods include the aggregator determining an optimal packet path through a network of computing devices based on the metadata.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: April 28, 2020
    Assignee: LUMINOUS CYBER CORPORATION
    Inventors: Charles F. Barry, Nick J. Possley, Brendan P. Keller, Sumanta Saha
  • Patent number: 10628127
    Abstract: Provided is an Internet protocol (IP) generation method. The method is performed by an IP generation apparatus comprising one or more processors and memory and includes: forming a plurality of initialized partial numbers by dividing a decimal number indicating a count of IP addresses that can be generated; changing the partial numbers according to a predetermined rule; generating an IP decimal number by linking the changed partial numbers; generating a random IP address from the IP decimal number; and generating a plurality of different random IP addresses with improved time efficiency, by sequentially repeating the changing of the partial numbers, the generating of the IP decimal number and the generating of the random IP address.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: April 21, 2020
    Assignee: KOREA INTERNET & SECURITY AGENCY
    Inventors: Hwan Kuk Kim, Tae Eun Kim, Dae Il Jang, Eun Hye Ko, Jee Soo Jurn, Sa Rang Na, Eun Byul Lee
  • Patent number: 10601711
    Abstract: Certain hash-based operations in network devices and other devices, such as mapping and/or lookup operations, are improved by manipulating a hash key prior to executing a hash function on the hash key and/or by manipulating outputs of a hash function. A device may be configured to manipulate hash keys and/or outputs using manipulation logic based on one or more predefined manipulation values. A similar hash-based operation may be performed by multiple devices within a network of computing devices. Different devices may utilize different predefined manipulation values for their respective implementations of the manipulation logic. For instance, each device may assign itself a random mask value for key transformation logic as part of an initialization process when the device powers up and/or each time the device reboots. In an embodiment, described techniques may increase the entropy of hashing function outputs in certain contexts, thereby increasing the effectiveness of certain hashing functions.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: March 24, 2020
    Assignee: Innovium, Inc.
    Inventors: William Brad Matthews, Puneet Agarwal
  • Patent number: 10592240
    Abstract: An electronic apparatus includes a permutation circuit and an arbitration circuit. The permutation circuit is configured to apply to an input vector a permutation selected from a plurality of predefined permutations in response to a control word. The arbitration circuit is configured to receive a vector of requests for a resource, to instruct the permutation circuit to apply a randomly-selected permutation to the vector of requests, by configuring the permutation circuit with a corresponding randomly-selected control word so as to produce a permuted vector, to select an element of the permuted vector, to apply to the permuted vector an inverse of the randomly-selected permutation so as to produce an inversely-permuted vector, to identify an element of the inversely-permuted vector to which the selected element of the permuted vector is mapped, and to assign the resource to a client corresponding to the identified element of the inversely-permuted vector.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: March 17, 2020
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Liron Mula, Gil Levy
  • Patent number: 10578947
    Abstract: A media-defined optical logic circuit composed of a set of light-transmitting polyhedral prisms arranged so that a pair of adjacent prisms can exchange photonic signals through adjacent surfaces. Each prism contains one or more quantum dots that, when excited by a photonic signal received from an adjacent prism, respond by emitting light that becomes an incoming photonic signal for an adjacent prism. Photonic signals are propagated through the circuit in this manner along light-guide paths created by shading certain surfaces to render them fully or partially opaque. The prisms and shading are arranged such that the circuit performs a certain logic function. When the circuit receives a set of photonic input signals representing a binary input value, the circuit responds by emitting a set of photonic output signals that represent a binary output value determined by performing the logic function upon the binary input value.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Pablo F. Barquero Garro, Ricardo A. Golcher, Franz F. Liebinger, Meller J. P. Nunez
  • Patent number: 10567419
    Abstract: This document describes, among other things, a computer-implemented method for improving the security of one or more computing systems. The method can include receiving, at a computing system, first code that defines at least a portion of an electronic resource that is to be served to a client computing device. The method can include generating code that defines a challenge to be solved by the client computing device, in which the code is arranged to cause the client computing device to determine values for one or more parameters that comprise a solution to the challenge, and the values for the one or more parameters that comprise the solution to the challenge may be required for the client computing device to make valid requests to initiate one or more web-based transactions. The computing system can determine whether particular values for the parameters comprise a valid solution to the challenge.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: February 18, 2020
    Inventor: Marc R. Hansen
  • Patent number: 10520975
    Abstract: In some examples, a device includes an integrated circuit and two or more computational units configured to process respective stochastic bit streams in accordance with respective input clocks. Each of the stochastic bit streams comprises sequential sets of data bits, each of the sets of data bits representing a numerical value based on a probability that any bit in the respective set of data bits is one. The respective input clocks for each of the two or more computational units are unsynchronized.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: December 31, 2019
    Assignee: Regents of the University of Minnesota
    Inventors: David J. Lilja, Mohammadhassan Najafi, Marcus Riedel, Kiarash Bazargan
  • Patent number: 10514894
    Abstract: A metastable true random number generator realized on an FPGA comprises a configurable delay chain including rough adjustment module and a fine adjustment module. The rough adjustment module comprises 32 rough adjustment cells each including a 1st 6-input lookup table and a two-to-one selector. The 1st input port of each 1st 6-input lookup table is connected to the 1st input terminal of the corresponding two-to-one selector, and the connecting terminal is the input terminal of the corresponding rough adjustment cell. The 2nd input port, the 3rd input port, the 4th input port, the 5th input port and the 6th input port of each 1st 6-input lookup table are all accessed to a low level 0. The output port of each 1st 6-input lookup table is connected to the 2nd input terminal of the corresponding two-to-one selector.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: December 24, 2019
    Assignee: Ningbo University
    Inventors: Pengjun Wang, Hongzhen Fang, Yuejun Zhang
  • Patent number: 10508785
    Abstract: A light system for a fireplace, including a plurality of lights, and a chaos circuit coupled to the plurality of lights. The chaos circuit is configured to provide signals to the plurality of lights to provide naturalistic flame lighting and naturalistic ember lighting.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: December 17, 2019
    Assignee: HNI Technologies Inc.
    Inventors: Charles Miller, David Lyons, Suman Minnaganti
  • Patent number: 10503475
    Abstract: Unpredictable random numbers are used to provide the parameter values and seeds for a parameterized random number generator, thereby providing forensic reproducibility of a simulation. The values generated unpredictably to provide the parameters and seeds for the random number generator are stored so that the same random numbers can be utilized for a subsequent computation in the simulation.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: December 10, 2019
    Assignee: The Florida State University Research Foundation, Inc.
    Inventor: Michael V. Mascagni
  • Patent number: 10496376
    Abstract: A novel system for generating random numbers is disclosed. The radioactive source emits photons, which causes the release of electrons on the surface of the detector. The detector is configured as a two dimensional array having a plurality of pixels. This release of electrons creates a splatter pattern on the detector, which is then read by the processor. Subsequent photon emissions create a second splatter pattern, which is then read by the processor. The processor compares these two splatter patterns, and generates random numbers based on these two splatter patterns. In certain embodiments, the processor creates a difference matrix which represents a comparison of the two splatter patterns. The processor then classifies each pixel in the difference matrix in accordance with certain rules. In certain embodiments, these classification rules may vary as a function of time or as a function of where on the detector the pixel is disposed.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: December 3, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Harry R. Clark, Theodore M. Lyszczarz
  • Patent number: 10496377
    Abstract: Systems and methods generate a string based random permutation (SBRP). The SBRP may be used for any application which uses permutations to generate values for security or randomness. The SBRP may operate one directionally so that resulting permutation vectors cannot be reverse engineered to obtain the underlying algorithm. An exemplary embodiment uses remove and replace sub-processes which identify duplicate values in a vector. The identified values are changed to another value that is not within the vector range of values. Then, the same elements are given a new value within the vector range of values that does not already exist among the vector elements in the vector.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: December 3, 2019
    Inventor: Shakir M. Hussain Al-Farraji
  • Patent number: 10481873
    Abstract: A method includes detecting noise in a laser output of a heat assisted magnetic recording device. The noise is converted into an electrical signal including a numerical value. A least significant digit of the numerical value is selected. The least significant digit is concatenated with another least significant digit from another detecting of another noise in another laser output to form a number.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: November 19, 2019
    Assignee: Seagate Technology LLC
    Inventors: Li Hong Zhang, WenXiang Xie, Xiong Liu
  • Patent number: 10459692
    Abstract: According to one embodiment, a random number generator includes a first circuit which outputs a second oscillation signal having a predetermined duty ratio on the basis of a first oscillation signal, a second circuit which latches values on the basis of the second oscillation signal and a clock having a frequency lower than a frequency of the second oscillation signal, a third circuit which outputs a control signal on the basis of the values, and a fourth circuit which controls the first circuit on the basis of the control signal.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: October 29, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Takaya, Shinichi Yasuda, Tetsufumi Tanamoto, Shinobu Fujita
  • Patent number: 10416965
    Abstract: A method (and system) for generating random numbers includes setting a drain voltage Vd on an MOSFET (metal oxide semiconductor field effect transistor) device and a gate voltage Vg of the MOSFET device so that the MOSFET device comprises a noise source configured in a manner such as to tune as desired a random number statistical distribution of an output of the MOSFET device. An output voltage of the MOSFET is provided as an input signal into a low noise amplifier and an output voltage of the low noise amplifier provides values for a random number generator.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: September 17, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chia-yu Chen, Damon Farmer, Suyog Gupta, Shu-jen Han
  • Patent number: 10355891
    Abstract: Embodiments may include systems and methods for authenticating a message between a transmitter and a receiver. An apparatus for communication may include a transmitter to transmit a message to a receiver via a physical channel coupling the transmitter and the receiver. The message may be transmitted via a plurality of transmission voltage levels varied from a plurality of nominal voltage levels on the physical channel. The transmitter may include a voltage generator to generate the plurality of transmission voltage levels varied in accordance with a sequence of voltage variations from the plurality of nominal voltage levels for the message. The sequence of voltage variations may serve to authenticate the message between the transmitter and the receiver. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Marcio Juliato, Li Zhao, Ahmed Shabbir, Manoj R. Sastry, Santosh Ghosh, Rafael Misoczki
  • Patent number: 10216484
    Abstract: A system on chip (SoC) may include a nonvolatile ferroelectric random access memory (FRAM). A random number may be created by applying operating power to the ferroelectric random access memory (FRAM) device and reading a sequence of virgin memory locations within the FRAM device to produce the random number sequence. The sequence of virgin memory locations had previously never been written. The random number may be produced during an initial boot of the SoC, for example. Alternatively, the random number may be saved by a test station during testing of the FRAM device after fabrication of the FRAM device. A memory test of the FRAM may then be performed, after which the random number may be stored in a defined location in the FRAM.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: February 26, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Eric Thierry Peeters, William Francis Kraus, Manuel Gilberto Aguilar, John Anthony Rodriguez
  • Patent number: 10204258
    Abstract: The present disclosure provides an output conversion circuit and a fingerprint identification system. The output conversion circuit includes: a comparator, a counter, and a reference signal generator, where the comparator includes: a first input end, configured to receive a first output signal; a second input end; and an output end, configured to generate a comparison output signal; the counter is connected to the output end of the comparator, and configured to generate a second output signal; and the reference signal generator is connected to the second input end, and configured to generate a reference signal, where the reference signal generator includes a random digit generator configured to generate a random digit, and the reference signal is associated with the random digit; where the comparator generates the comparison output signal according to the first output signal and the reference signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: February 12, 2019
    Assignee: Shenzhen Goodix Technology Co., Ltd.
    Inventor: Bo Tan
  • Patent number: 10185818
    Abstract: Devices and systems operable to generate random numbers are disclosed and described. Such include an array of phase change material cells electrically coupled to circuitry configured to initially set all cells in the array to a high state, send a programming pulse through the array having a current sufficient to randomly set each cell to either the high state or a low state to generate a random distribution of cell states across the array, and to read the random distribution of cell states out of the array.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: January 22, 2019
    Assignee: Intel Corporation
    Inventors: Karthik Sarpatwari, Hongmei Wang, Sanjay Rangan
  • Patent number: 10168994
    Abstract: Embodiments include apparatuses, methods, and systems for a random number generator that includes an entropy source. The entropy source may be coupled to a deterministic feedback circuit and a stochastic feedback circuit. The deterministic feedback circuit may include detection logic to detect when a bit of the output signal of the entropy source has registered, a pre-delay feedback path to cause the entropy source to power off responsive to the detection, and a post-delay feedback path to cause the entropy source to power on, after the entropy source is powered off, to generate a second bit of the output signal. The post-delay feedback path may include one or more delay cells that are bypassed by the pre-delay feedback path. Other circuits and techniques related to random number generators are also described. Further embodiments may be described and/or claimed.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: Rachael J. Parker, Calvin Chiem
  • Patent number: 10157043
    Abstract: A random number generator (RNG) is disclosed. The RNG comprises a memory bit array having a plurality of bits, wherein each bit is configured to present an initial logic state when the memory bit array is powered on; and a first folding circuit coupled to the memory bit array, wherein the first folding circuit is configured to: read initial logic states of a first bit and a second bit of the memory bit array, perform a first logic function on the initial logic state of the first bit, and perform a second logic function on the initial logic state of the second bit to contaminate the initial logic state of the second bit so as to provide an altered initial logic state of the second bit.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Shih-Lien Linus Lu
  • Patent number: 10157128
    Abstract: A method for access to all cells in a memory area for purposes of writing or reading data blocks in the cells may include, for each access time (Ti with i=0 to N) to the cells in the memory area to be accessed, a process of determining the address (ADRj, with j=0 to N) of the cell of the memory area to be accessed at the access time (Ti), an address (ADRj) determined for an access time Ti not being once again determined for another access time (Tk, k?j). The process of determining each address (ADRj) may be a pseudorandom process. The method may be used, for example, in any type of card, chip card, SIM card, etc., which includes a processing unit, such as a microcontroller, for manipulating cryptographic data serving to identify and/or authenticate a user of such a card.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: December 18, 2018
    Assignee: MORPHO
    Inventors: Ahmadou Sere, Frédéric Boulet
  • Patent number: 10146507
    Abstract: An apparatus for testing a random number generator includes a correlation test circuit and a randomness determination circuit. The correlation test circuit extracts a first plurality of bit pairs each including two bits spaced apart from each other by a first distance in a bit stream generated by the random number generator, obtains a first sum of differences between respective two bits of the first plurality of bit pairs, and obtains a second sum of differences between respective two bits of a second plurality of bit pairs, the second plurality of bit pairs each including two bits spaced apart from each other by a second distance, different from the first distance, in the bit stream. The randomness determination circuit determines a randomness of the bit stream, based on the first sum and the second sum.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: December 4, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Karpinskyy Bohdan, Yong-ki Lee, Mi-jung Noh, Sang-wook Park, Kitak Kim, Yong-Soo Kim, Yun-hyeok Choi
  • Patent number: 10133554
    Abstract: A non-modular multiplier, a method for non-modular multiplication and a computational device are provided. The non-modular multiplier includes an interface and circuitry. The interface is configured to receive n-bit integers A and B. The circuitry is configured to calculate a non-modular product (A*B) by performing a sequence of computations, and to randomize a pattern of an electrical power consumed by the multiplier when performing the sequence. The sequence includes: generating a random number w, determining moduli M1 and M2 that depend on a number R=2k, k equals a bit-length of M1 and M2, and on the random number w, and calculating a first modular product C=A*B % M1 and a second modular product D=A*B % M2, and producing and outputting the non-modular product (A*B) based on the first and second modular products.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: November 20, 2018
    Assignee: Winbond Electronics Corp.
    Inventor: Uri Kaluzhny
  • Patent number: 10114614
    Abstract: Random numbers are generated using entropic properties associated with circuit hardware. Consistent with one method, a switching voltage regulator circuit is used to generate a random number. Data that is responsive to switching states of the switching voltage regulator circuit is generated. A multi-bit random number is then generated from the generated data.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: October 30, 2018
    Assignee: Seagate Technology LLC
    Inventors: Bruce Douglas Buch, Jon David Trantham
  • Patent number: 10101968
    Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: October 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Wook Park, Bohdan Karpinskyy, Yong Ki Lee, Yunhyeok Choi, Mijung Noh
  • Patent number: 10095661
    Abstract: According to one embodiment is a string processor configured to output a biased output string having a first output value and a second output value. The string processor is given an unbiased input string of at least two input values. The string processor has a processing unit and a memory device, the memory device stores a code-word set. The code-word set has a plurality of code-words, each code-word having at least one input value, and each output value has at least one corresponding code-word. The processing unit is configured to: compare a comparison string to the code-word set, wherein the comparison string includes an input from the input string; and assign an output value to the output string when the comparison string matches a code-word. The assigned output value is that to which the matched code-word corresponds.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: October 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Marco Lucamarini, Alan Plews, Zhiliang Yuan, Andrew James Shields
  • Patent number: 10089079
    Abstract: An integrated random signal generation circuit includes two logic gates, the output of each gate coupled to a respective first input of the other gate via assemblies of delay elements. The respective delays introduced by the assemblies of delay elements are adjustable.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: October 2, 2018
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Patrick Haddad, Viktor Fischer
  • Patent number: 10067745
    Abstract: A method of generating a random number that involves applying pulses of energy to amplify a quantum mechanical vacuum fluctuation to generate one or more macroscopic fields having one or more physical properties (e.g. phase or energy) that are random and measurable, and, measuring at least one of the physical properties to obtain a value for the physical property, the value of the physical property being a random number. Measuring the phase of a Stokes signal generated in a transient Raman scattering process is one way of generating the random number as the phase of the Stokes signal is random. This method can produce random numbers faster than prior art methods as the real numbers generated can be converted to binary to produce more than one random bit and the measurement process itself is faster permitting more rapid data collection rates and more rapid turn-on times.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: September 4, 2018
    Assignee: National Research Council of Canada
    Inventors: Benjamin J. Sussman, Philip J. Bustard
  • Patent number: 10063255
    Abstract: In some examples, a device includes an integrated circuit comprising a computational unit configured to process at least two input bit streams that each include a sequential set of data bits or two or more sets of data bits in parallel that is deterministically encoded to represent numerical values based on a probability that any data bit in the bit stream is high. In some examples, the computational unit includes a convolver configured to generate pair-wise bit combinations of the data bits of the input bit streams. In some examples, e computational unit further includes a stochastic computational unit configured to perform a computational operation on the pair-wise bit combinations and produce an output bit stream having a set of data bits indicating a result of the computational operation based on a probability that any data bit in the set of data bits of the output bit stream is high.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: August 28, 2018
    Assignee: Regents of the University of Minnesota
    Inventors: Marcus Riedel, Devon Jenson
  • Patent number: 10048940
    Abstract: Parallelized generation of random numbers. A vector, in a memory component, is allocated that is configured to store a sequence of random numbers. A first thread of a plurality of threads is assigned to a first random number generator of a plurality of random number generators. A second thread of the plurality of threads is assigned to a second random number generator of the plurality of random number generators. A first random number designated for a first index position in the sequence of random numbers and a second random number designated for a second index position in the sequence of random numbers are generated in parallel by the first and second thread, respectively. The first random number in the first index position of the sequence of random numbers and the second random number in the second index position of the sequence of random numbers are stored in the allocated vector.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: August 14, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ian S. Iscoe, Asif Lakhany
  • Patent number: 10037193
    Abstract: Embodiments include method, systems and computer program products for extracting entropy from mobile devices to generate random numbers. In some embodiments, first vibration data may be received from a first device. Second vibration data may be received from a second device. A first piece of entropy data may be generated using the first vibration data and a second piece of entropy data may be generated using the second vibration data. The first piece of entropy data and the second piece of entropy data may be aggregated. The first piece of entropy data and the second piece of entropy data may be stored in an entropy pool.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Volker M. M. Boenisch, Reinard T. Buendgen, Franziska Geisert, Jakob C. Lang, Mareike Lattermann, Budy D. Notohardjono, Angel N. Mencias