Abstract: A substrate processing apparatus includes an AD converter configured to output digital values of a voltage applied to a heater resistor and a current flowing in the heater resistor; and a controller configured to control a temperature of the heater resistor by using a calculation voltage and a calculation current configured to calculate a resistance value of the heater resistor, which are obtained from an output result of the AD converter. The controller calculates at least one of the calculation voltage or the calculation current, based on a combination result of a digital signal obtained from the output result of the AD converter and a noise signal including a normal distribution noise.

Abstract: A method for entropy scaling in quantum random number generators, comprising dividing one spatial mode into multiple spatial modes, delaying each spatial mode, and recombing the spatial modes; detecting first temporal states with synchronisation to a photon generation time and encoding the first temporal states into first time bins; detecting second temporal states in an arbitrary clock, and encoding the second temporal states into second time-bins.

Abstract: In an embodiment an apparatus includes a contactless transponder including a contactless interface and a wired interface, wherein the contactless transponder is configured to communicate with a contactless reader according to a contactless protocol through the contactless interface, a wired communication bus connected to the wired interface and at least one module connected to the bus, wherein the transponder is configured so that the reader is a master on the bus when the reader and the transponder communicate.

Abstract: A method of monitoring and protecting access to an online service from Account Take Over may include: providing a Traffic Inspector in communication with a client device and web server; providing a Traffic Analyzer in communication with the Inspector; identifying each browsing session of the client device; extracting and identifying one or more usernames when a user performs authentication to the online service by analyzing traffic exchanged between the client device and web server; collecting first data concerning unique and/or non-unique technical parameters and associating the first data with respective identified one or more usernames and with the client device; collecting second data concerning unique and/or non-unique technical parameters and associating the second data with an anonymous application browsing session or web beacon; and taking security measures when a number of identified usernames associated with the anonymous application browsing session or web beacon exceeds a predetermined threshold v

Abstract: A random data generation circuit includes: a first shift register and a second shift register. The first shift register includes n output ends Q1 to Qn, the second shift register includes n output ends Qn+1 to Q2n, and each of the output ends outputs 1-bit data in a clock cycle of a clock signal; and a parallel-to-serial circuit, coupled to the output ends Q1 to Q2n and configured to convert parallel data output from Q1 to Q2n in a clock cycle into serial data for output. An initial value of the first shift register is different from an initial value of the second shift register. Data may be generated in parallel by using two shift registers, and the parallel data generated by the two shift registers is converted into serial data by using the parallel-to-serial circuit to be output.

Abstract: A memory system according to an aspect of the present disclosure includes a soft error generator that generates write data or read data considering a probability error by using a specific number as a random number. In the memory system, the write data or the read data considering a probability error is generated by using the random number. Herein, whether or not an error occurs is randomly changed depending on the random number. Accordingly, an error stochastically occurs, which makes it possible to reproduce a soft error.

Abstract: Secure serial bus communication methods and devices suitable for automotive applications. An illustrative sensor IC includes: a sensor controller that operates a transducer to obtain measurement data formattable as data packets; a scrambler that masks each data packet with a scrambling operation before that data block is sent via a serial bus to a bus controller device, said scrambling operation having a secret configuration and/or secret initial state; and an integrated circuit component that operates on a seed value to derive the secret configuration and/or secret initial state.

Abstract: A system for generating a biased random bit stream, wherein said biased bit stream has different predetermined probabilities of occurrence for bit “0” and bit “1”, said system comprising: a true random generator unit configured to output a true random bit stream, a pseudo random generator unit configured to output a pseudo random bit stream, said pseudo random bit stream comprising n bit words, where n is an integer of at least two; a combining unit configured to combine a bit from said true random generator unit with an n-bit word from said pseudo random generator unit to output a processed n-bit word; and an output unit configured to generate an output bit value from said processed n-bit word using a function, wherein said function is selected to control the probabilities of occurrence of the bit “0” values and bit “1” values to be the predetermined probabilities of occurrence.

Abstract: Techniques and mechanisms providing a mode of random number generation to satisfy a requirement for a consumer of random numbers. In an embodiment, a device comprises a Gaussian random number generator (GRNG) circuit, multiple uniform random number generator URNG circuits, and circuitry which is coupled between the GRNG circuit and the URNG circuits. Based on an indication of one or more required performance characteristics and/or one or more required statistical characteristics, a controller identifies a corresponding one of multiple available random number generation (RNG) modes. The controller communicates control signals to provide the mode with the circuitry. In another embodiment, the control signals configure the circuitry to select one or more of the URNG circuits for use in calculating random numbers with the GRNG circuit.

Abstract: The invention relates to distributed ledge technologies such as consensus-based blockchains. Computer-implemented methods for a secure random number generation within blockchain scripts are described. The invention is implemented using a blockchain network, which may be, for example, a Bitcoin blockchain. A third transaction is validated. The third transaction is associated with a third digital asset and includes a first and second puzzle in a locking script. The first puzzle is included, in a first transaction, in a first locking script that encumbers transfer of control of a first digital. The second puzzle is included, in a second transaction, in a second locking script that encumbers transfer of control of a second digital asset. A pseudorandom number is generated based at least in part on solutions to the first and second puzzles. Control of the third digital asset is transferred based at least in part on the pseudorandom number.

Abstract: Each of a secure computation server apparatuses includes a random number generation part that generates random numbers using a pseudo random number generator shared among the secure computation server apparatuses; a seed storage part that shares and stores a seed(s) used for generating random numbers in the random number generation part; a pre-generated random number storage part that stores random numbers generated by the random number generation part; a share value storage part that stores a share(s) to be a target of processing; a logical operation part that computes a carry to be transmitted and received among the secure computation server apparatuses using the random numbers and the share(s) to be a target of processing; an inner product calculation part that removes a mask from the carry; and an arithmetic operation part that performs a processing of erasing the carry to obtain a processing result.

Abstract: Techniques for performing improved machine learning using decision trees are disclosed. In one example, a system includes a plurality of decision tree structures, and configuration logic operatively coupled to the plurality of decision tree structures. The configuration logic selectively configures the plurality of decision tree structures to form at least one of: one or more combined decision tree structures, wherein a combined decision tree structure comprises multiple interconnected ones of the plurality of decision tree structures; and one or more individual decision tree structures, wherein an individual decision tree structure comprises a single one of the plurality of decision tree structures.

Abstract: An electronic device according to an embodiment includes a first random number generator module, a second random number generator module, a buffer memory configured to store random number data, and a processor configured to be operatively connected to the first random number generator module, the second random number generator module, and the buffer memory, wherein the processor is configured to acquire a first random number sequence from the first random number generator module to store the acquired first random number sequence in the buffer memory, generate a third random number sequence obtained by changing the first random number sequence based on a second random number sequence acquired from the second random number generator module, and generate an encryption key based on the third random number sequence. In addition, various other embodiments are possible.

Abstract: An actively stabilized random number generator includes a random number generator and a feedback controller. The random number generator includes a chaotic physical circuit realizing an iterated function. The iterated function is configured to produce a trajectory of iterates and has an operating parameter ? and a desired Markov operating point. A binary bit converter has a symbol function configured to produce binary symbols from the trajectory of iterates and a maximal kneading sequence. The feedback controller is configured to observe the maximal kneading sequence within the trajectory of iterates and adjust the operating parameter to the desired Markov operating point.

Abstract: A neural network device includes a floating-point arithmetic circuit configured to perform a dot product operation and an accumulation operation; and a buffer configured to store first cumulative data generated by the floating-point arithmetic circuit, wherein the floating-point arithmetic circuit is further configured to perform the dot product operation and the accumulation operation by: identifying a maximum value from a plurality of exponent addition results, obtained by respectively adding exponents of a plurality of floating-point data pairs, and an exponent value of the first cumulative data; performing, based on the maximum value, an align shift of a plurality of fraction multiplication results, obtained by respectively multiplying fractions of the plurality of floating-point data pairs, and a fraction part of the first cumulative data; and performing a summation of the plurality of aligned fraction multiplication results and the aligned fraction part of the first cumulative data.

Abstract: A computer-implemented method that may be implemented using a blockchain network including monitoring a computational task distribution system to detect a challenge to a proposer string provided by a proposer computer system in response to a request made by a requester computer system, and as a result of detecting the challenge, at least: resolving the challenge using a first blockchain network by at least selecting a solution from a set of solutions provided to the first blockchain network, the set of solutions at least including the proposer string; and distributing digital assets from the first digital asset and the second digital asset to one or more parties of the computational task distribution system based at least in part on the solution.

Abstract: A method for encryption that combines the steganographic method of concealing data inside a truly random string of bits with a cryptographic key that allows for the random distribution of this data, essentially creating a symmetrical cipher.

Abstract: The present disclosure relates to a circuit for testing a random number generator adapted to delivering a series of random bits and comprising at least one test unit configured to detect a defect in the series of random bits, said test circuit being adapted to verifying whether, after the detection of a first defect by the test unit, the number of random bits, generated by the random number generator without the detection of a second defect by said unit test, is smaller than a first threshold.

Abstract: A system includes first and second subsystems. The first subsystem receives a validation number request, transmitted by a first device in response to the entry of an account number into a first field of a webpage. In response to receiving the request, the first subsystem randomly generates the validation number, stores a copy in memory, and transmits it to a second device. The second subsystem receives a transaction request that includes the validation number from the first device, and transmits the received number to the first subsystem. The first device transmitted the request in response to the second device receiving the validation number and its subsequent entry into a second field of the webpage displayed on the first device. In response to receiving the validation number, the first subsystem determines that it matches the stored copy and transmits a message to the second subsystem authorizing the transaction.

Abstract: A particle accelerator random number generator system comprises a particle accelerator, a particle event detector, and a processing application. Operation steps include initiating the particle accelerator; detecting a particle event by the particle event detector; recording a binary event from the detected particle event; determining if sufficient binary events have been recorded for the desired random number strength; if not, return to the step of detecting a particle event; if so, converting the random number binary string to a random number generated hexadecimal; applying the random number generated hexadecimal string for an encryption key; and using the random number hexadecimal key to encrypt an application.

Abstract: A system and method for generating quantum hash values through true-randomness hash functions to facilitate security on use of hash values, especially to a quantum hash value generator for providing a hash value with true randomness. Through operations of Borel-measure derivation, Lebesgue-dominated validation, and quantum-hash-value derivation, such technology not only provides hash functions with true randomness, but also enhances to implement a mechanism to generate various quantum hash functions instantly.

Abstract: The present description concerns a method of generation of a sequence of pseudo-random digital codes enabling to perform a permutation (3) of a first set of values (V) into a second set of values (Vp) based on said digital codes (CPos) representative of positions (j) of values (Vi) of the first set in the second set, including the steps of: generating, by successive iterations, a chain of numbers, called seed numbers, from an initial pseudo-random seed number (W0) by application of a first function (24,26) from a seed number to the next seed number; applying a second function to each seed number of the chain to obtain each position code (CPos(j)), the second function including at least one permutation (PERM) followed by a bijection (BIJ).

Abstract: Systems, apparatuses, methods, and computer program products are disclosed for quantum entanglement random number generation (QERNG). An example method for QERNG includes, among other operations, receiving a quantum computing (QC) detection alert control signal, a leakage alert control signal, or a tampering alert control signal; and in response to receipt of the QC detection alert control signal, the leakage alert control signal, or the tampering alert control signal, and within a defined duration of time corresponding to an associated QC threat, measuring at least a subset of a first set of entangled quantum particles, wherein one or more quantum particles in the first set of quantum particles is entangled with a respective quantum particle in a second set of quantum particles associated with a second computing system.

Abstract: A method of generating a nonce includes measuring a TOA and a corresponding first or second state value of a plurality of first photons, wherein respective ones of the plurality of first photons are entangled with respective ones of a plurality of second photons in a first basis, which is time, and entangled in a second basis. A first ordered list of the measured TOAs of the plurality of first photons is generated. A TOA and a corresponding first or second state value of the plurality of second photons are measured. A second ordered list of the measured TOA of the plurality of second photons is generated. TOA matches between the first ordered list and the second ordered list are determined. The first or second state values that correspond to the determined TOA matches between the first ordered list and the second ordered list are determined. A shared secret random number is determined using the first or second state values that correspond to the determined TOA matches.

Abstract: A random bit generator includes a voltage source, a bit data cell, and a sensing control circuit. The voltage source provides a scan voltage during enroll operations. The data cell includes a first transistor and a second transistor. The first transistor has a first terminal coupled to a first bit line, a second terminal coupled to the voltage source, and a control terminal. The second transistor has a first terminal coupled to a second bit line, a second terminal coupled to the voltage source, and a control terminal. The sensing control circuit is coupled to the first bit line and the second bit line, and outputs a random bit data according to currents generated through the first transistor and the second transistor during an enroll operation of the bit data cell.

Abstract: Embodiments of systems and methods for a multi-source true random number generator (TRNG) are disclosed. A set of values is generated from each of the sources of randomness and an extractor is applied each of the set of values to produce a set of random values from each source. At least one extractor for at least one of the sources is a multi-radix extractor. The sets of values generated from each source of randomness can be composited to generate a random bitstring as the output of the TRNG.

Abstract: A conversion apparatus includes a storage unit storing definition information in which position information and a type of the signal are associated with each other; a decoder referring to, when first reception data is input, the definition information of the first control target to determine a type of a first signal at a first position in the first reception data, and output first input data in which the determined type of the first signal and a value of the first signal in the first reception data are associated with each other; and an encoder referring to the definition information of a second control target to output second input data in which identification information of second computing units that corresponds to the type of the first signal, position information indicating a second position of the first signal, and a value of the first signal are associated with one another.

Abstract: A device may receive, at an operating system, a request for a random number from an application. The device may provide a command to generate an entropy input, based on the request for the random number and through a driver that is isolated from the operating system, to a quantum random number generator that is isolated from one or more processors hosting the operating system. Accordingly, the device may receive the entropy input, from the quantum random number generator, using the driver, and may generate the random number based at least in part on the entropy input. The device may provide the random number to the application.

Abstract: A true random number generator circuit includes a ring oscillator and a plurality of sampling circuits. The ring oscillator includes a plurality of series-connected stages coupled together in a ring. An output of a last stage of the ring oscillator is coupled to an input of a first stage of the ring oscillator. A sampling circuit of the plurality of sampling circuits has an input coupled to a node located between two adjacent stages of the plurality of series-connected stages. Every node of the ring oscillator is coupled to a corresponding sampling circuit of the plurality of sampling circuits. In another embodiment, a method for generating a random number is provided.

Abstract: A radio transmitting device configured to transmit a spread-spectrum radio signal wherein a carrier frequency changes in a predetermined set of radio channels according to a hopping sequence, the radio signal being organized in packets having each a header transmitted at a first channel in the hopping sequence comprising a detection sequence, and payload data encoding a message transmitted at following channels in the hopping sequence.

Abstract: A method and a device for remote acquisition of correlated pseudo-random numbers based on semi-trusted hardware. When applied to semi-trusted hardware, the method comprises: acquiring a random seed of a sender and a selected number of a receiver; generating a plurality of first correlated pseudo-random numbers and first commitment seeds according to the random seed and a predetermined category of the correlated pseudo-random number; generating a first commitment value and a first open value by a commitment mechanism according to the first correlated pseudo-random numbers and the first commitment seeds; generating a Merkle proof according to the first commitment value and the selected number; sending the first correlated pseudo-random numbers, the first commitment value, the first open value and the Merkle proof corresponding to the selected number to the receiver.

Abstract: A device for detecting perturbation attacks performed on a digital circuit is provided.

Abstract: Embodiments provide a device for testing a bit sequence generated by a Random Number Generator, wherein the device is configured to apply one or more statistical tests to the bit sequence, in response the detection of N bits generated by the Random number generator, each statistical test providing at least one sum value derived from the bits of the sequence, the testing device comprising: a comparator for comparing at least one test parameter related to each statistical test to one or more thresholds; a validation unit configured to determine if the bit sequence is valid depending on the comparison made by the comparator for each statistical test; wherein at least one of the test parameter and the at least one threshold is determined from N and from a target error probability.

Abstract: A random number generator includes a static random number generator, a dynamic entropy source, a counter and a combining circuit. The static random number generator includes an initial random number pool and a static random number pool to output a static random number sequence from one thereof the initial random number pool and the static random number pool. The dynamic entropy source is used to generate a dynamic entropy bit. The counter is used to generate a dynamic random number sequence according to the dynamic entropy bit. The combining circuit is used to output a true random number sequence to a lively random number pool according to the static random number sequence and the dynamic random number sequence. The static random number pool is updated when the lively random number pool is fully updated.

Abstract: Provided is a streaming-based artificial intelligence convolution processing method, applied to a processing module. The method includes: adding invalid data to a starting point of a first to-be-processed data matrix stored in a first streaming lake to form a second to-be-processed data matrix, where a number of columns of the second to-be-processed data matrix is an integral multiple of a degree of parallelism of data transmission; using a data transmission module to take out the second to-be-processed data matrix from the first streaming lake in a preset manner for a convolution operation. Also provided are a streaming-based artificial intelligence convolution processing apparatus, a readable storage medium and a terminal.

Abstract: A system and method for decision making for autonomous vehicles. The method includes determining if a decision scenario is present; generating a first random number; communicating the first random number to a receiver via visible light communication; receiving a second random number and determining a priority order based on the generated random numbers. The priority is communicated to all relevant units to determine the order in which the vehicles should proceed. An optical random generator may be used to generate the random number associated with each vehicle.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.

Abstract: A system described herein may provide for the tracking and/or calculating of performance metrics associated with a network by marking traffic and determining performance characteristics of the marked traffic. Such performance characteristics or metrics may include throughput, latency, jitter, and/or other metrics. The marking may be performed on “user” traffic, which may be traffic that is generated or sent via the network by an application or service (e.g., a voice call service, a content streaming service, etc.), as opposed to “synthetic” or “test” traffic, which is traffic that is generated or sent for the purposes of testing performance of the network (e.g., traffic related to a “speed test” or the like).

Abstract: Systems, computer-implemented methods, and computer program products to facilitate updating, such as averaging and/or training, of one or more statistical sets are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can include a computing component that averages a statistical set, provided by the system, with an additional statistical set, that is compatible with the statistical set, to compute an averaged statistical set, where the additional statistical set is obtained from a selected additional system of a plurality of additional systems. The computer executable components also can include a selecting component that selects the selected additional system according to a randomization pattern.

Abstract: Described are a system, method, and computer program product for generating a data storage server distribution pattern. The method includes determining a set of servers and raw data to be stored. The method also includes transforming the raw data according to an error-correcting code scheme to produce distributable data. The method further includes determining a server reliability of each server in the set of servers. The method further includes generating the data storage server distribution pattern based on maximizing a system reliability relative to maximizing a system entropy. System reliability may be based on a minimum reliability of the set of servers, and system entropy may be based on a cumulated information entropy of each server of the set of servers. The method further includes distributing the distributable data to be stored across at least two servers of the set of servers according to the data storage server distribution pattern.

Abstract: Provided are techniques for providing a global unique identifier for a storage volume. Under control of a storage initiator, a Global Universally Unique Identifier (GUUID) is identified for a storage volume of a storage device in a cloud system storing a plurality of storage devices, wherein the GUUID is generated for use with an ATA over Ethernet (AoE) protocol. The GUUID is stored in bytes of a packet header structure. Metadata is stored in remaining portions of the packet header structure. A request with the packet header structure is sent to a storage target.

Abstract: Methods, systems, and devices for wireless communications are described for a two-step random access channel (RACH) procedure in which uplink random access preamble and message transmission occasions may span multiple transmission slots. Reference signal resources for transmitting a reference signal with a first random access message of the two-step RACH procedure may include at least one symbol in each of the multiple transmission slots. The reference signal resources, reference signal sequence, or both, may be identified based on a particular uplink random access message transmission occasion, random access preamble transmission occasion, random access preamble sequence configuration, or any combinations thereof.

Abstract: An electronic control unit comprises circuitry to receive a combined signal via a vehicle bus of a vehicle, wherein the combined signal contains a combination of a data signal and a watermark signal, which can be a radio frequency (RF) signal or an analog baseband signal, wherein the data signal includes a message, circuitry to extract a watermark from the watermark signal, circuitry to verify the watermark based on a comparison of the watermark with a pre-defined watermark, circuitry to extract the data signal from the combined signal and obtain the message from the data signal, and circuitry to authenticate the message based on the verification of the watermark.

Abstract: A request to generate one or more random values can be received. In response to receiving the request to generate the one or more random values, a first read operation can be performed on a memory cell of the memory component to retrieve first data and a second read operation can be performed on the same memory cell of the memory component to retrieve second data. The first data can be compared with the second data to identify a difference between the first data and the second data. The difference can be associated with a noise characteristic of the memory cell. The one or more random values can be generated based on the difference between the first data and the second data that is associated with the noise characteristic of the memory cell.

Abstract: A test stimulus generator generates error irritations, or error sequences, within a processor system. The test stimulus generator includes an initialization register, a pseudo-random number generator (PRNG), a clock subsystem, and an output register. The PRNG calculates an output value from an initialization value stored in the initialization register. The PRNG output value represents a unique error irritation and identifies one or more components within the processor system to handle the error irritation. The clock subsystem generates either a continuous or pulsed clock signal that transfers the initialization value into the PRNG. The output register stores the PRNG output value and transmits the corresponding error irritation to the processor components identified to handle the error irritation. The test stimulus generator generates error irritations in a predetermined or random order based on the initialization value. A corresponding method and computer program product are also disclosed.

Abstract: In some embodiments, a method for generating a random bit is provided. The method includes generating a first random bit by providing a random number generator (RNG) signal to a magnetoresistive random-access memory (MRAM) cell. The RNG signal has a probability of about 0.5 to switch the resistive state of the MRAM cell from a first resistive state corresponding to a first data state to a second resistive state corresponding to a second data sate. The first random bit is then read from the MRAM cell.

Abstract: A random bit circuit includes four storage cells controlled by four different word lines. The first storage cell and the second storage cell are disposed along a first direction sequentially, and the first storage cell and the third storage cell are disposed along a second direction sequentially. The third storage cell and the fourth storage cell are disposed along the first direction sequentially. The first storage cell and the fourth storage cell are coupled in series, and the second storage cell and the third storage cell are coupled in series.

Abstract: A method for screening a semiconductor device for production of excessive random telegraph sequence (RTS) noise includes measuring noise of the semiconductor device at a first temperature, changing the temperature of the semiconductor device to a second temperature different from the first temperature, measuring noise of the semiconductor device at the second temperature, extracting a characteristic of the measured noise at the first and second temperatures (e.g., standard deviation, HMM output, frequency domain spectrum of time domain noise measurement), making a comparison of the extracted first and second noise characteristics, and making a determination whether the semiconductor device produces excessive RTS noise based on whether the comparison is above a predetermined threshold. Two different bias conditions of the device may be employed rather than, or in addition to, the two different temperatures.

Abstract: An embodiment of a data pattern analysis optimizer includes a time sequence data memory, an estimator, a grouping unit, and a time sequence pattern extractor. The time sequence data memory stores a plurality of time sequence data made from items in time order. The estimator estimates the upper limit of the total number of types of time sequence patterns present in the time sequence data at a rate higher than a minimum support level, based on a respective rate of presence of each item, wherein each of the time sequence patterns present in the time sequence data is a predefined number of items. In case that the estimated upper limit exceeds an upper limit of the number of types of time sequence patterns as a maximum processing load to a computer, the grouping unit groups a plurality of time sequence data into sub-groups, based on a group of items having the increased number of items and gives the estimator instructions to perform estimation.

Abstract: A multi-level memory cell NAND structure of a memory device is utilized to extract uniqueness from the memory device. Certain unreliable characteristics of a NAND-based storage are used to generate a true random number sequence. A method for generating such sequence is based on a physically unclonable function (PUF) which is implemented by extracting unique characteristics of a NAND-based memory device using existing firmware procedures.