Bus Expansion Or Extension Patents (Class 710/300)
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Patent number: 7103694Abstract: In one aspect, the invention is a tuned stub, SCSI topology comprising a SCSI bus, a breakout node on the SCSI bus, an external SCSI connector on the SCSI bus at a first point defined by a first propagation delay; an internal SCSI connector on the SCSI bus at a second point defined by a second propagation delay, the first and second propagation delays being substantially equal; a SCSI adapter electrically tapping the breakout node; and a terminator electrically tapping the breakout node.Type: GrantFiled: September 7, 2001Date of Patent: September 5, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Matthew J. Schumacher, M. Scott Bunker
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Patent number: 7099979Abstract: A single shelf network system capable of providing expansion to a multiple shelf mode is described. In one embodiment, slots are provided in a single shelf network system that are capable of accepting either I/O cards or expansion cards. When such a single shelf network system is to be operated in a single shelf mode, such slots may be provided with I/O cards to maximize the data transport capability of the single shelf network system. However, to expand the single shelf network system to function as a multiple shelf network system, the slots are provided with expansion cards. The expansion cards serve to couple a control card of the single shelf network system to one or more expansion shelves, thereby allowing the control card to exert control over the one or more expansion shelves. Since a single expansion card can support multiple expansion shelves, the number of slots of the single shelf network system needed to support expansion does not increase as additional expansion shelves are added.Type: GrantFiled: May 22, 2002Date of Patent: August 29, 2006Assignee: Alcatel Canada Inc.Inventors: Joseph Soetemans, Larry Friesen
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Patent number: 7093050Abstract: The network arrangement includes at least one common bus. An input member is connected to the common bus. An output member is connected to the common bus. The input member comprises at least one input contact defined with a unique identity. The output member comprises at least one output contact defined with a unique identity. The input member is adapted to receive an input signal through the at least one input contact. The output member is adapted to provide an output signal through the at least one output contact. The input member is arranged to generate an action signal transmitted over the buss from the input member to the output member. The action signal comprises an address corresponding to the unique identity of an output contact.Type: GrantFiled: December 28, 2001Date of Patent: August 15, 2006Assignee: Empir ABInventor: Henrik Niklasson
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Patent number: 7093049Abstract: A recording medium holder enables a user to easily find a desired recording medium from recording mediums that the user manages. The recording medium holder includes a recording medium holding unit for holding a plurality of recording mediums, a liquid crystal displaying unit for displaying each of the plurality of recording mediums held in the recording medium holding unit by an icon, and an information displaying unit for displaying information of a recording medium that corresponds to an icon clicked in the liquid crystal displaying unit, the information including ID information, title information, index information, and other information. The information is read out from the recording medium at a first click, and from a storing unit at a second click and after.Type: GrantFiled: June 25, 2003Date of Patent: August 15, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shunji Harada, Noriko Sugimoto, Shoichiro Nakata
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Patent number: 7088137Abstract: A communication system, method and program product are provided for establishing an extended bidirectional communication bus between a first device and a second device. The communication system includes decomposition logic for decomposing a single line, bidirectional data communication bus into a unidirectional transmit data communication bus and a unidirectional receive data communication bus. A differential communication subsystem is connected to the two unidirectional buses for extending the length thereof, and recomposition circuitry is connected to the differential communication subsystem for recombining the extended unidirectional transmit data communication bus and the extended unidirectional receive data communication bus to reestablish the single line, bidirectional data communication bus. The decomposition logic, differential communication subsystem and recomposition circuitry are implemented transparent to the first device and the second device and without use of a data direction control line.Type: GrantFiled: May 4, 2004Date of Patent: August 8, 2006Assignee: International Business Machines CorporationInventors: Eileen M. Behrendt, Jeffrey R. Biamonte, Raymond J. Harrington, Timothy M. Trifilo
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Patent number: 7089358Abstract: In one embodiment of the present invention, a process that uses a first processor is provided. The process includes the operation of blocking by the first processor of completion by a second processor of a configuration cycle. The process also includes the operation of selecting by the first processor of one procedure from a plurality of procedures that are associated with respective types of circuitry that may be used to permit the first processor to control a device. The one procedure is associated with one of the respective types of circuitry that is actually available to be used by the first processor.Type: GrantFiled: January 10, 2005Date of Patent: August 8, 2006Assignee: Intel CorporationInventors: Paul E Luse, Wolfgang Michel
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Patent number: 7085823Abstract: In a network element management method and apparatus, and a network management system where mounting positions of physical components on a network element are unfixed, an external input mounting schedule for a physical component detachable from a network element as mounting plan information including a type of the physical component, a scheduled mounting position within the network element, and a scheduled mounting term is received through a graphical user interface. No overlap with a preliminarily provided mounting schedule for another physical component per each predetermined measure of the scheduled mounting position is confirmed based on the inputted mounting plan information. The mounting plan information is determined to be implementable only when all of the predetermined measures of the scheduled mounting position are confirmed.Type: GrantFiled: March 25, 2002Date of Patent: August 1, 2006Assignee: Fujitsu LimitedInventors: Toshihiro Nakamura, Hiroyuki Oguro, Noriyuki Yokoshi, Masaki Hayashi, Yoshinobu Yanokura
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Integrated PC card host controller for the detection and operation of a plurality of expansion cards
Patent number: 7076589Abstract: An integrated controller for the detection and operation of both PC Cards, smart cards and passive smart card adapter cards. In one aspect, the invention detects the presence of standard expansion cards or passive smart card adapters by utilizing the reserved detection and voltage selection signal area defined by the PC Card specification. In another aspect, the invention provides an integrated controller that includes logic to operate either a standard expansion card or a passive smart card adapter by reassigning certain PC Card signal lines to operate a standard expansion card or a passive smart card adapter, thereby eliminating the need to provide pins in addition to those defined by the PC Card specification.Type: GrantFiled: November 28, 2003Date of Patent: July 11, 2006Assignee: O2Micro International LimitedInventors: Hyang-Kyun Oh, Yishao Max Huang, Richard Brayden -
Patent number: 7076588Abstract: A bus controller is capable of controlling a dual ported bus interface in combination with a peer interface. The bus controller comprises a state machine capable of executing in the dual ported bus interface. The dual ported bus interface has first and second front end ports for connection to hosts, and is capable of insertion into one of first and second slots for connection to one or more buses on a backplane. The state machine determines bus interface state based on information from the peer interface received across the backplane, and status of the first and second front end ports.Type: GrantFiled: February 18, 2003Date of Patent: July 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Anthony Joseph Benson, Thin Nguyen
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Patent number: 7072992Abstract: In the information processing system, the user can easily grasp the names of terminals that the main information processing device possesses. By transmitting the name data showing each name of multiple terminals 13, 14, 15 that the main information processing device 4 has to the control device 2 via the predetermined communication means 8, 11, and displaying each name of each terminal that said name data shows on the display means 33 of the control device 2, the user can easily grasp names of terminals that the main information processing device 4 has.Type: GrantFiled: March 24, 2005Date of Patent: July 4, 2006Assignee: Sony CorporationInventors: Yoshiyuki Takaku, Mari Horiguchi
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Patent number: 7072990Abstract: In the information processing system, the user can easily grasp the names of terminals that the main information processing device possesses. By transmitting the name data showing each name of multiple terminals 13, 14, 15 that the main information processing device 4 has to the control device 2 via the predetermined communication means 8, 11, and displaying each name of each terminal that said name data shows on the display means 33 of the control device 2, the user can easily grasp names of terminals that the main information processing device 4 has.Type: GrantFiled: March 24, 2005Date of Patent: July 4, 2006Assignee: Sony CorporationInventors: Yoshiyuki Takaku, Mari Horiguchi
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Patent number: 7072993Abstract: In the information processing system, the user can easily grasp the names of terminals that the main information processing device possesses. By transmitting the name data showing each name of multiple terminals 13, 14, 15 that the main information processing device 4 has to the control device 2 via the predetermined communication means 8, 11, and displaying each name of each terminal that said name data shows on the display means 33 of the control device 2, the user can easily grasp names of terminals that the main information processing device 4 has.Type: GrantFiled: March 24, 2005Date of Patent: July 4, 2006Assignee: Sony CorporationInventors: Yoshiyuki Takaku, Mari Horiguchi
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Patent number: 7072991Abstract: In the information processing system, the user can easily grasp the names of terminals that the main information processing device possesses. By transmitting the name data showing each name of multiple terminals 13, 14, 15 that the main information processing device 4 has to the control device 2 via the predetermined communication means 8, 11, and displaying each name of each terminal that said name data shows on the display means 33 of the control device 2, the user can easily grasp names of terminals that the main information processing device 4 has.Type: GrantFiled: March 24, 2005Date of Patent: July 4, 2006Assignee: Sony CorporationInventors: Yoshiyuki Takaku, Mari Horiguchi
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Patent number: 7069362Abstract: A dual ring topology for multiprocessing computer systems. The dual ring topology interconnects multiple building blocks (nodes) to each other, each node comprising processing elements, memory and IO devices. The topology allows for the dual rings to be temporarily transformed into a single ring structure while a node is added, repaired or replaced while the rest of the system continues to operate thereby allowing the remaining nodes in the system to remain fully connected to one another.Type: GrantFiled: May 12, 2003Date of Patent: June 27, 2006Assignee: International Business Machines CorporationInventors: Michael A. Blake, Pak-kin Mak
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Patent number: 7065591Abstract: A reconfigurable flash media reader system provides a flash media reader that accepts both asynchronous and synchronous flash media cards. The reader identifies the card type of the inserted flash media card and notifies the host computer of the card type. The host computer has a list of interface information for different types of flash media cards and references the card type in the list and sets the proper baud rate on the reader. If the flash media card is a synchronous card, data that is to written into the flash media card is gathered and converted to the proper card IO strobes for the card type which are interleaved with the proper card clock strobes for the card type into a bit stream in a bulk transfer packet. The reader extracts the data bit stream from said bulk transfer packet and clocks the data bit stream into the flash media card using the baud rate as a reference clock.Type: GrantFiled: August 17, 2004Date of Patent: June 20, 2006Assignee: O2Micro International LimitedInventors: Ching-Yung Han, Chin-Ran Lo
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Patent number: 7062594Abstract: A data processing system includes first and second data processing devices coupled to each other through a midplane. Each data processing device includes a data storage processor; a root complex coupled to the data storage processor; and a switch device coupled between the root complex and at least one end point device. The switch device includes a first transparent bridge coupled to the root complex and a second transparent bridge coupled between the first transparent bridge and the at least one end point device, a first data path connected between the first transparent bridge and the midplane and a second data path connected between the first transparent bridge and the midplane through a non-transparent bridge.Type: GrantFiled: June 30, 2004Date of Patent: June 13, 2006Assignee: EMC CorporationInventors: Steven D. Sardella, Douglas Sullivan
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Patent number: 7062596Abstract: A datalink for a system of N computers, and M monitors and peripheral devices is described. Separate state machines are provided for each switched computer, and separate state machines for each switched workstation, with a non-intrusive matrix switch disposed there-between. The matrix switch routes the peripheral data streams without intercepting them with a processor. The computer-side state machines and the workstation-side state machines are in a master/slave relationship, respectively, and communicate peripheral data using a half-duplex method of transfer.Type: GrantFiled: August 20, 2002Date of Patent: June 13, 2006Assignee: Avocent CorporationInventor: Philip M. Kirshtein
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Patent number: 7054976Abstract: A computer system includes a computer body and a main board installed in the computer body, the main board having a digital controller configured to support an audio standard interface. The computer system further includes a card unit separated from the computer body, the card unit including a card for conducting at least one of audio and communication functions supporting the audio standard interface, a connection jack electrically connected to the card and adapted to transmit a signal from the card to the digital controller, and a connection port provided on the main board, the connection port being connectable to the connection jack so as to transmit the signal from the connection jack to the digital controller. By this configuration, the computer system can have and retain compatibility with different cards supporting the audio standard interface when one of those cards mounted on the main board is replaced by another one of the cards without any replacement of the main board.Type: GrantFiled: September 5, 2001Date of Patent: May 30, 2006Assignee: Samsung Electronics Co., Ltd.Inventor: Kyun-Hoe Park
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Patent number: 7054965Abstract: A core component is disclosed which includes a processing module and a touch screen. The core component may operate by itself in a first mode to perform functions similar to that of a conventional personal digital assistant (PDA). In particular, the touch screen may both provide visual output and receive input from a user's finger when the core component operates in the first mode. When the core component is connected to another component including a display screen, the core component may operate in a second mode in which input received through the touch screen is provided to the other component. For example, the movement of a user's finger may control the position of a cursor displayed on a screen of the other component so that the core component exhibits the behavior of a trackpad when operating in the second mode.Type: GrantFiled: March 18, 2003Date of Patent: May 30, 2006Assignee: OQO IncorporatedInventors: Jory Bell, Michael Prichard, Nicholas G. L. Merz, Jonathan Betts-LaCroix
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Patent number: 7051139Abstract: Embodiments of the present invention provide a computer system with a high speed, high bandwidth expandability bus for integrated and non-integrated CPU products. The computer system includes a processor, a chipset coupled to the processor, a graphics processor coupled to the chipset for controlling a video display and a main memory coupled to the chipset. The computer system further includes an expandability bus, which is coupled at one end to the chipset and at the other end to a replaceable electronic component. The expandability bus can be changeably configured to enable or disable bus mastering at both ends, as required, to operate with whichever replaceable electronic component is installed.Type: GrantFiled: March 31, 2003Date of Patent: May 23, 2006Assignee: Intel CorporationInventors: Alex D. Peleg, Adi Golbert
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Patent number: 7039741Abstract: A method and apparatus are provided for implementing resilient connectivity in a Serial Attached SCSI (SAS) domain. A first edge expander is connected to a first port of a plurality of SAS devices for enabling communications between each of the plurality of SAS devices through the first edge expander. A second edge expander is connected to a second port of the plurality of SAS devices for enabling communications between each of the plurality of SAS devices through the second edge expander. A subtractive routing port of each of the first edge expander and the second edge expander is connected together for enabling communications between each of the plurality of SAS devices via the first ports and the second ports of the plurality of SAS devices.Type: GrantFiled: September 25, 2003Date of Patent: May 2, 2006Assignee: International Business Machines CorporationInventors: Brian Eric Bakke, Timothy Jerry Schimke
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Patent number: 7039747Abstract: A bridging device has a first port to allow the device to communicate with other devices on an expansion bus and a second port to allow the device to communicate with devices on a second bus. The device also includes a memory to store data and a processor or logic to prefetch data upon request from a device on the expansion bus, tag any remaining prefetched data with an identifier upon a disconnecting event, and retain the prefetched data until a discarding event occurs. A method of controlling prefetch transactions on an expansion bus involves prefetching data across a primary bus for a device on a secondary bus. An indication that a disconnecting event has occurred is detected and any remaining prefetched data remaining is tagged with an identifier and retained. The data may be prefetched from a controlled prefetch region in the memory.Type: GrantFiled: December 18, 2003Date of Patent: May 2, 2006Assignee: Cisco Technology, Inc.Inventors: Dattatri N. Mattur, Sampath Hosahally Kumar, Udayakumar Srinivasan, Madhu Rao, Abhay Ujwal Bhorkar
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Patent number: 7039733Abstract: A method, system, apparatus, and computer-readable medium for eliminating bus renumbering in a computer system are provided. A pool of bus numbers are reserved for each device within a computer system capable of hosting a bridge device. Upon startup of the computer system, each of the buses present in the computer are assigned unique bus numbers. Buses present in the system as a result of a bridge device are allocated bus numbers from the pool of bus numbers reserved for the device upon which the bridge device resides.Type: GrantFiled: February 21, 2003Date of Patent: May 2, 2006Assignee: American Megatrends, Inc.Inventor: Giri P. Mudusuru
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Patent number: 7035955Abstract: A modular information handling system includes a KVM management card. The KVM management card manages KVM communication with associated blade servers and allows access to KVM signals from each of the associated blade server through a VGA connector, a first PS2 connector and a second PS2 connector.Type: GrantFiled: April 3, 2003Date of Patent: April 25, 2006Assignee: Dell Products L.P.Inventors: Jil M. Bobbitt, Zhan Mei, Dung T. Nguyen, Scott M. Ramsey
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Patent number: 7035952Abstract: A system includes plural storage subsystems each having a controller and an expander to couple to storage devices. The controller accesses the storage devices through the expander, and the expander has interfaces for coupling to the storage devices. The system further includes an intercontroller link to connect expanders in two storage subsystems to enable the controller in one of the storage subsystems to communicate with the controller in another one of the storage subsystems through the expanders and the intercontroller link.Type: GrantFiled: September 24, 2003Date of Patent: April 25, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert C. Elliott, Thomas Grieff, Joseph E. Foster
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Patent number: 7032051Abstract: Circuits and methods for interconnecting a live backplane and at least one I/O card are provided. This invention provides interconnection circuitry that utilizes buffer circuitry to connect the data and clock busses of the backplane to the data and clock busses of the I/O card in a “hot-swappable” fashion. Buffer circuitry also isolates the capacitance associated with the backplane from the capacitance associated with the I/O card. For example, when at least one signal is driven from the backplane to the I/O card, the signal need only overcome the capacitance associate with the backplane. Conversely, when at least one signal is driven from the I/O card to the backplane, the signal need only overcome the capacitance associated with the I/O card. Hence, this capacitive isolation facilitates signal propagation between the backplane and the I/O card.Type: GrantFiled: December 11, 2001Date of Patent: April 18, 2006Assignee: Linear Technology Corp.Inventors: Robert L. Reay, John H. Ziegler
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Patent number: 7028125Abstract: A hot-pluggable peripheral input device coupling system is proposed, which is designed for use to couple one or more peripheral input devices, such as a keyboard and a mouse, to a network server, such as a blade server, for the purpose of allowing the user to input data and commands to the blade server via the keyboard and mouse. The proposed hot-pluggable peripheral input device coupling system is characterized by the provision of at least two management control modules with one serving as a redundant backup module to the other so that in the event of a failure to the active one, the blade server can nevertheless be functionally linked to the externally connected keyboard and mouse via the redundant backup module. The invention can therefore help enhance the efficiency of network system management on blade servers.Type: GrantFiled: August 4, 2003Date of Patent: April 11, 2006Assignee: Inventec CorporationInventor: Chun-Liang Lee
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Patent number: 7028106Abstract: A system includes a peripheral device and an expander having interfaces to couple to one or more peripheral devices and an expander. The expander has a storage to store entries containing routing information used to route a request received by the expander to one of the interfaces, wherein each interface is allocated to a respective set of routing information entries. Mapping logic remaps unused routing information of one of the interfaces to one or more other interfaces to expand capacity of the one or more other interfaces.Type: GrantFiled: December 5, 2003Date of Patent: April 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Joseph E. Foster, Robert C. Elliott, Hubert E. Brinkmann, Jr., James R. Reif
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Patent number: 7024507Abstract: A user specifies, in advance, the expansion devices which he/she does not want to remove among the expansion devices which are attachable/detachable with respect to the PC, and the specified expansion devices are excluded from a list displayed later for the user to select an expansion device to remove. Besides, whether to display expansion devices in the list is specified to an BIOS and the information referenced by the BIOS is stored in an NVRAM.Type: GrantFiled: September 13, 2002Date of Patent: April 4, 2006Assignee: Lenovo (Singapore) Pty Ltd.Inventors: Takashi Inui, Masahiko Nomura, Noritoshi Yoshiyama
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Patent number: 7020732Abstract: A network interface is described in which a single computer bus is split over a long distance into two or more inter-communicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.Type: GrantFiled: March 6, 2003Date of Patent: March 28, 2006Assignee: Avocent Huntsville CorporationInventors: Remigius G. Shatas, Robert R. Asprey, Christopher L. Thomas, Greg O'Bryant, Greg Luterman, Jeffrey E. Choun
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Patent number: 7020726Abstract: The present invention provides an apparatus and method for selecting bus-width formats. In an exemplary preferred embodiment of the invention, the circuit includes a bus controller configured to provide a first bus-width control signal to select a first bus-width. The circuit also includes a bus controller extension circuit configured to force the first bus-width control signal to a predetermined level when the bus controller is applied to a bus with a second bus controller that is incompatible with the first bus-width. Advantages of the invention include controlling a number of data bits to be transferred between a PCI device and a data bus that does not violate PCI specifications. Other advantages include a programmability of the PCI device to adapt to legacy systems as PCI technology progresses.Type: GrantFiled: March 29, 2002Date of Patent: March 28, 2006Assignee: LSI Logic CorporationInventor: Jeffrey M. Rogers
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Patent number: 7020723Abstract: A communications system for enabling extension of an internal common bus architecture (CBA) segment of a first root physical device to an internal CBA bus segment of one or more remote external physical device includes the first root physical device having a first serial communications interface module in the root device coupled between said internal CBA bus segment and an input and output port of the root device for serializing bus transactions from the first device to the output port of the root device and deserializing data received from at the input port to the internal CBA bus segment of the first device. The remote external physical device includes a second serial communications interface module coupled between the internal CBA bus segment and an input and output port of the remote device for serializing bus transactions from the remote device to the output port of the remote device and deserializing data received at the input port to the internal CBA bus segment of said remote device.Type: GrantFiled: April 23, 2003Date of Patent: March 28, 2006Assignee: Texas Instruments IncorporatedInventors: Denis R. Beaudoin, Gregory Guyotte, Michael J. Hanrahan, William S. Egr
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Patent number: 7016999Abstract: A SCSI message manipulation circuit in a SCSI expander detects a specified SCSI message from either a SCSI initiator, or a SCSI target. After detecting the specified SCSI message, the SCSI message manipulation circuit detects a pre-selected message-unit, e.g., a specific byte, within the message. Upon detecting the pre-selected message unit, the SCSI message manipulation circuit sets a pre-selected sub-unit, e.g., a bit, within the pre-selected message-unit to a state, which is programmable, as the SCSI message passes through the SCSI expander.Type: GrantFiled: February 5, 2002Date of Patent: March 21, 2006Assignee: Adaptec, Inc.Inventor: John S. Packer
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Patent number: 7009863Abstract: A memory module includes a memory device, a connector, a plurality of lines coupling the memory device and the connector, and termination circuitry coupled to at least a subset of the lines. A method for terminating a memory bus includes providing at least two expansion sockets coupled to the memory bus; interfacing two expansion memory modules including termination circuitry with the expansion sockets; and disabling the termination circuitry for one of the expansion memory modules.Type: GrantFiled: June 9, 2004Date of Patent: March 7, 2006Assignee: Micron, Technology, Inc.Inventors: Dirgha Khatri, Dail Robert Cox, Christopher S. Johnson
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Patent number: 7003607Abstract: A method and apparatus is provided for managing a controller embedded in a south bridge. The method includes determining if the south bridge of a processor-based system is configured to operate in a slave mode or a master mode, and polling one or more sensors in the processor-based system for status values in response to determining that the south bridge is configured to operate in the master mode. The method further includes receiving requests from a network interface card to access sensors internal to the south bridge based on determining that the south bridge is configured to operate in the slave mode.Type: GrantFiled: March 20, 2002Date of Patent: February 21, 2006Assignee: Advanced Micro Devices, Inc.Inventor: Dale E Gulick
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Patent number: 7003612Abstract: This invention is to provide a PC switching device which can be applied to various kinds of PC's, some of which have an electric power control method different from the others. When a plurality of PC's 621–624, the power of which are controlled by power control keys installed on keyboards are operated by single KB 63 without a power control key, power control switches PC-PSW 1–4 installed on the PC switching device 61 can control the power of the corresponding PC. When switches PC-PSW 1–4 are pressed again, main CPU 610 outputs a key-code to PC's 621–624 through sub-PC's 611–614, and can control the power of PC's.Type: GrantFiled: August 4, 2000Date of Patent: February 21, 2006Assignee: Fujitsu Takamisawa Component LimitedInventors: Kiyomitsu Takizawa, Fujio Seki, Hideo Yumoto
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Patent number: 7003690Abstract: A system for redundancy switching of line cards in a communications system. When a line card needs to be replaced or serviced or becomes inoperable, signal traffic is switched to and through a redundant line card. This is achieved by implementing a switching fabric on I/O cards, where the I/O cards carry signal traffic to and from line cards. The switching fabric enables traffic to and from an I/O card servicing the line card to be replaced to instead service the redundant line card.Type: GrantFiled: March 12, 2002Date of Patent: February 21, 2006Assignee: Juniper Networks, Inc.Inventors: Valentino Liva, Isaac Wingfield
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Patent number: 7003591Abstract: Techniques are disclosed for enabling a single computer system to execute both operating systems that permit multiple devices to be mapped to a single PCI function and operating systems that do not permit such mapping. Prior to loading and executing an operating system (e.g., during system reset), the computer system determines whether the operating system supports mapping of multiple devices to a single function. If such mapping is supported, the computer system maps multiple devices on a single PCI card to a single function in the PCI configuration space for the card. If such mapping is not supported, the computer system maps each device to a separate PCI function. The computer system then loads and executes the operating system. The operating system is thereby enabled to access all devices on the bus according to the particular device-function mapping scheme supported by the operating system.Type: GrantFiled: August 20, 2003Date of Patent: February 21, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventor: Daniel V. Zilavy
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Patent number: 7003588Abstract: A peripheral device is provided for connection to a home video game system having a recess formed in an external surface thereof. The peripheral device includes an electrical component, an electrical connector coupled to the electrical component for connecting to a connector of the home video game system, and a housing. The housing of the peripheral device is configured so that when the peripheral device is inserted in the recess of the home video game system, it is substantially flush with the external surface of the home video game system. In this way, the footprint of the video game system can remain the same, even if peripheral devices are added.Type: GrantFiled: August 22, 2002Date of Patent: February 21, 2006Assignee: Nintendo Co., Ltd.Inventors: Genyo Takeda, Ko Shiota, Munchito Oira, Kazuo Koshima, Satoshi Nishiumi
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Patent number: 7000052Abstract: A method for communicating data is provided that includes storing one or more physical connectors associated with an input/output card and configuring the input/output card to a selected one of a slave, master, and passive mode. An identification for the input/output card may be provided to an end user, the identification reflecting a selected configuration parameter associated with the input/output card.Type: GrantFiled: February 24, 2003Date of Patent: February 14, 2006Assignee: Cisco Technology, Inc.Inventors: Billy G. Moon, Mark G. Schnell
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Patent number: 6993102Abstract: In a method for adaptive synchronization of a data sink device to a data source device coupled by a USB, data is received and stored in a buffer of the sink device at an average data rate representative of the data rate of the source device. A data level for the buffer is determined based on input packet size and output packet size. An accumulated data level for the buffer is compared with a threshold level. A clock frequency for the sink device is corrected when the accumulated data level exceeds the threshold level.Type: GrantFiled: July 20, 2001Date of Patent: January 31, 2006Assignee: NEC CorporationInventors: Steven Donald Spence, Nikolai Nikolov, Rudolf Ladyzhenski
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Patent number: 6993614Abstract: The present invention relates to a management agent that can be ran on any operating system. More specifically, the management agent of the present invention is implemented with a set of application program interfaces (APIs) that allows the management agent to be independent of operating systems. The APIs makes the management agent portable across multiple operating systems. In an embodiment of the present invention, a Compact Peripheral Component Interconnect (CPCI) computer system includes a CPCI chassis, a circuit board located within the CPCI chassis, a first central processing unit (CPU) card coupled with the circuit board. The CPCI computer system also includes a second CPU card coupled with the circuit board, a first management agent located within the first CPU card, and a second management agent located within the second CPU card. The first and second CPU cards each respectively has a first operating system and a second operating system.Type: GrantFiled: August 26, 2003Date of Patent: January 31, 2006Assignee: Sun Microsystems, Inc.Inventors: Tuan A. Le, Christopher J. Rinaldo, Angshuman Mukherjee, Vinh N. Truong, Daniel Delfatti
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Patent number: 6990546Abstract: A portable computer can be “hot” docked to one or more expansion devices, such as a drive wedge and a port replicator. As such, the expansion devices can be connected to and disconnected from the portable computer while portable computer is powered on and fully operational. The portable computer includes control logic that detects when an expansion device is connected to or disconnected from the portable computer and asserts an SMI or equivalent interrupt signal to the computer's CPU to initiate a sequence of events by which the computer determines whether an expansion device has been connected or disconnected. If the CPU determines that the expansion device has been connected to the computer, the CPU appropriately reconfigures itself to communicate with the expansion device. If the expansion device is disconnected, the CPU also appropriately reconfigures itself to preclude communications with the disconnected device.Type: GrantFiled: October 22, 2003Date of Patent: January 24, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jeffrey C. Tang, Gregory N. Santos, Ronald P. Meyers, Jr.
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Patent number: 6990539Abstract: An apparatus for implementing bus request routing to allow functionality with 2 way or 4 way processors, includes a bus configured to provide bus request routing; and a bus request route switching stage coupled to the bus and configured to select a first route configuration if two processors are coupled to the bus. The switching stage is also configured to select a second route configuration if more that two processors are coupled to the bus. The switching stage determines if two or more processors are coupled to the bus. A logic block may be used to determine the required configuration based on the detected processor population.Type: GrantFiled: April 15, 2002Date of Patent: January 24, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ross V. La Fetra, Peter M. Arnold
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Patent number: 6988162Abstract: A high-speed, high-power modular router is disclosed. As opposed to conventional designs using optical backplane signaling and/or bus bars for power distribution, the disclosed embodiments combine high-power, low-noise power distribution with high-speed signal routing in a common backplane. Disclosed backplane features allow backplane signaling at 2.5 Gbps or greater on electrical differential pairs distributed on multiple high-speed signaling layers. Relatively thick power distribution layers are embedded within the backplane, shielded from the high-speed signaling layers by digital ground layers and other shielding features. A router using such a backplane provides a level of performance and economy that is believed to be unattainable by the prior art.Type: GrantFiled: February 5, 2002Date of Patent: January 17, 2006Assignee: Force10 Networks, Inc.Inventor: Joel R. Goergen
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Patent number: 6985987Abstract: An apparatus and a method for supporting multi-processors and a motherboard using the same are provided. The apparatus receives the pins Z36 and AK36 of the Socket-370 central processing unit to determine which type the Socket-370 central processing unit is. According to the suspend status input signal transmitted from the south bridge of the motherboard, the determined result is latched, and some appropriate circuits are coupled to the Socket-370 central processing unit via a switch circuit. Meanwhile, the suspend status input signal is delayed and used to cut off the connection between the Socket-370 central processing unit and the apparatus. The delayed suspend status input signal is further delayed and then sent to an ATX power supply to activate the whole system.Type: GrantFiled: October 22, 2001Date of Patent: January 10, 2006Assignee: VIA Technologies, Inc.Inventors: Nai-Shung Chang, Chia-Hsing Yu
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Patent number: 6983340Abstract: A system and method for extending a separation distance between a PC and its accompanying keyboard, video display, mouse and serial port, which includes an internal expansion card disposed in a PC where the expansion card combines/multiplexes conventional keyboard, video display, mouse and serial signals, to/from a combined signal on a single elongated link cable extending to a remote module disposed near the remote keyboard, video display, mouse and ports.Type: GrantFiled: February 9, 2001Date of Patent: January 3, 2006Assignee: Crystal Group Inc.Inventors: Todd A. Hermanson, John R. Bodensteiner, David T. Medin, Steven R. Waller
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Patent number: 6981087Abstract: A two wire serial bus is connected between different circuit boards in a complex electrical system. The two wire serial bus may be used to receive status information about each of the circuit boards in the system. A master control processor on one of the circuit boards controls which of the other circuit boards are active on the serial bus. Each of the non-master circuit boards includes a series of switches that electrically isolate or connect portions of the two wire serial bus from one another. Through the series of switches, both the master control processor and processors local to each of the other circuit boards may simultaneously access different portions of the serial bus.Type: GrantFiled: January 2, 2001Date of Patent: December 27, 2005Assignee: Juniper Networks, Inc.Inventors: Ross Heitkamp, Michael Armstrong, Michael Beesley, Ashok Krishnamurthi, Kenneth Richard Powell, Mike M. Wu
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Patent number: 6981086Abstract: An instrumentation system which extends channel-based switched fabric architectures to provide instrumentation signaling functions. The system comprises a chassis including slots for receiving inserted modules. The chassis includes a backplane which provides for inter-module communication, including a channel-based switched fabric bus, such as the InfiniBand bus, and instrumentation signaling lines for instrumentation signaling functions.Type: GrantFiled: October 26, 2001Date of Patent: December 27, 2005Assignee: National Instruments CorporationInventors: Mark Wetzel, Michel Haddad, Joseph E. Peck, Christopher A. Clark
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Patent number: 6981085Abstract: A case for an electronic device, which includes a first protective material that maintains the electronic device within the case, and at least one controlling interface that is in electrical communication with said electronic device, and disposed on the first protective material. Through the controlling interface, the user can operate an electronic feature of the electronic device. Electrical communication between the controlling interface and the electronic device can be carried out, at least in part using wireless communication means. Further, a connection port can included for transferring electrical signals between the electronic device and the controlling interface. The connection port can be attached to the first protective material to avoid separation of the port from the case.Type: GrantFiled: March 15, 2001Date of Patent: December 27, 2005Assignees: Sony Electronics, Inc., Sony CorporationInventors: John Tree, Ronald Leroy Lytel