Abstract: Portable communication devices and related methods for use in supporting voice and/or data communication are provided. One example portable communication device includes a housing, a display device disposed at said housing, a processor disposed at least partially within said housing, the processor coupled to said display device, and an interface connector disposed at said housing and coupled to said processor. The interface connector is configured to couple to a module. The processor is configured to communicate, through said interface connector, via a plurality of communication protocols. The processor is configured to select at least one of the plurality of communication protocols based on the module coupled to the interface connector.

Abstract: A lane jumper for transmitting at least one lane from a first interface to a second interface is disclosed. The at least one lane is connected with the first interface. The first interface defines a first pin group and a second pin group, and the second interface defines a third pin group connected with the second pin group. The lane jumper includes a fourth pin group and a fifth pin group, wherein the fourth pin group and the fifth pin group of the lane jumper are configured for being respectively connected with the first pin group and the second pin group. The at least one lane is transmitted from the first interface to the second interface sequentially through the first pin group, the fourth pin group, the fifth pin group, the second pin group, and the third pin group.

Abstract: A multicore system 2 includes a main system program 610 that operates on a first processor core 61 and stores synthesized audio data, which is mixed audio data, to a buffer for DMA transfer 63, a standby program 620 that operates on a second processor 62, and an audio output unit 64 that sequentially stores the synthesized audio data transferred from the buffer for DMA transfer 63 and plays the stored synthesized audio data. When an amount of storage of the synthesized audio data stored to the buffer for DMA transfer 63 has not reached a predetermined amount of data determined according to the amount of storage of the synthesized audio data stored to the audio output unit 64, the standby system program 620 takes over and executes the mixing and the storage of the synthesized audio data that is executed by the main system program 610.

Abstract: A flash drive includes a storage module, a switching module, and a transforming mechanism. The storage module has a storage unit and a first interface electrically connected to each other. The switching module has a second interface and a third interface which are in different types but are electrically connected to each other, and the first interface corresponds to the second interface. The transforming mechanism is located at a first position or a second position relative to the storage module, and the switching module is located in the transforming mechanism. When the transforming mechanism is located at the first position, the first interface is electrically connected to the second interface, so that the storage unit is electrically connected to a host through the third interface. When the transforming mechanism is located at the second position, the first interface of the storage unit is electrically connected to the host.

Abstract: A method for controlling the execution of an applet for an IC Card including a java card platform, includes a phase for downloading the applet inside the IC Card, a phase for executing the applet through the java card platform and a phase for storing an identification platform number inside a memory portion of the IC Card. The phase for executing the applet has a first step for detecting the identification platform number to perform the phase for executing the applet with or without restrictions, respectively if the identification platform number is not or is detected by the step for detecting. The applet is a java card applet or a SIM toolkit applet.

Abstract: In one embodiment, a network device having a plurality of hardware interfaces is disclosed. The network device includes a central processing unit and a main circuit board. The main circuit board has expansion slots that receivably connect corresponding secondary circuit boards to the main circuit board. The main circuit board also has sensors for detecting predetermined parameters. A voltage regulator is operative to regulate one or more particular expansion slots, in response to detection of a predetermined parameter associated with respective slots.

Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

Abstract: An RFID card includes a smartcard controller that receives power from a host device. The RFID card also includes a small inductive device capable of inductive coupling with an RFID reader. The small inductive device is small enough to fit in the form factor of a memory card or SIM card. Enhancement circuits enhance the usable read and write distance of the RFID card.

Abstract: A data storage architecture extension (DAX) system and method that daisy-chains multiple SATA disk drive storage elements to allow a single host bus adapter (HBA) to view the daisy-chain as one logical SATA disk drive is disclosed. The system/method may be broadly described as comprising a pass-thru disk drive controller (PTDDC) further comprising a pass-thru input (PTI) port, disk drive interface (DDI) port, and pass-thru output (PTO) port. The PTDDC intercepts and translates PTI port input to the requirements of a SATA disk drive connected to the DDI. Each PTDDC may be daisy-chained to other PTDDCs to permit a plethora of SATA drives to be associated with a given HBA, with the first PTDDC providing a presentation interface to the HBA integrating all SATA disk drive storage connected to the PTDDCs. Rack mounting of PTDDC-enabled SATA disk drives enables creation of inexpensive dynamically expandable petabyte-class storage arrays.

Abstract: A mounting apparatus includes a case and a securing member. The case includes a bottom plate and a rear plate connected to the bottom plate. A mounting tray is attached to the rear plate and defines a receiving slot. The securing member, includes an inserting portion and a securing portion. The inserting portion is engaged in the receiving slot, and the securing portion is secured to an expansion card. The securing member is moveable in a direction that is substantially perpendicular to the bottom plate, to disengage the inserting portion from the receiving slot.

Abstract: A portable device includes n (n?2) electrical sockets, each of which is configured to accommodate and to electrically engage a removable external memory card; an input device for selecting accommodated and electrically engaged external memory cards for data reading; and an output device for outputting information that is derived from or related to data read from such selected electrically engaged external memory cards. The information may pertain to digital content of the selected external memory card, to the identity of the selected external memory card, or to the storage capacity of the selected external memory card.

Abstract: A bus load module plugs into otherwise empty memory sockets on a memory bus. The bus load module conditions signals on the memory bus to improve signal quality and timing of the modules on the bus populated with memory, thereby improving system performance. The bus load module options include EEPROMs to interface to the system host to report load module configuration and capabilities.

Abstract: A memory module includes persistent-storage memory chips and an auxiliary voltage connector for powering the persistent-storage memory chips. An auxiliary power cable has a first end coupled to an electronic power source on the system board and has a second end having connector that plugs in to the auxiliary voltage connector on the memory module to provide power to the persistent-storage memory chips. The auxiliary power cable also resists movement of a latch lever to require disconnecting the auxiliary power cable before ejecting the memory module.

Abstract: A method is provided for using a wireless data card individually to access a network, and a wireless access terminal is provided. The wireless access terminal includes a data line switching module and a power line switching module. The method includes, when the wireless access terminal detects that the wireless data card is connected with a terminal through a universal serial bus (USB) cable, the power line and the data line of the wireless data card are respectively switched to connect the data line and the power line of the external USB interface thereon. A user can still freely connect the 3G network at anytime and anywhere by connecting a common USB cable between the laptop and the wireless data card in the wireless access terminal in the case without the mains supply.

Abstract: A presence detectable baffle for electrical components in a computing system, including: a passive chassis having a form factor is consistent with an electrical component of the computing system; and a presence detectable pin set connected to the passive chassis, the pin set consistent with the electrical component.

Abstract: In a method for integrating a thunderbolt (TBT) chip on a motherboard of a computing device, the motherboard includes a PCIe slot, and a platform controller hub (PCH) chip. The computing device includes a PCIe card plugged into the PCIe slot. The PCIe card includes a micro controller unit (MCU), and an EEPROM. The TBT chip, the MCU, and the EEPROM are integrated into the PCIe card. The PCH chip communicates with the TBT chip and the MCU through a system management bus of the motherboard. The method defines a TBT protocol parameter list used in the TBT chip, and sets GPIO parameters to support the TBT chip to perform various TBT protocol functions according to the TBT protocol parameter list. The TBT chip executes a TBT protocol function according to a GPIO signal output from the MCU.

Abstract: The SAS expander PCBA is partitioned to allow SAS lanes to be externalized, allowing for a x4 wide port external access into each of the two primary SAS expander modules and each of the two secondary SAS expander modules. This configuration allows for a single host x8 external HBA connection to tunnel into the storage array by connecting into either the primary or secondary x4 wide ports. A second host may connect to the alternate connection if desired. This configuration may also lend itself to allow up to four hosts to access the internal SAS topology of the Enclosure. This configuration may also lend itself to connecting the primary and secondary SAS expander modules together in applications that require an SAS expander to see more storage device arrays than would normally be confined to a typical SAS expander module.

Abstract: A motherboard assembly includes a motherboard and an expansion card. The motherboard includes an expansion slot, a storage device interface, a power connector, and a central processing unit (CPU). The expansion slot includes a protrusion, first signal pins connected to the CPU, first power pins connected to the power connector. The expansion card includes a circuit board. A storage unit, a display unit, a power circuit, and a serial advanced technology attachment (SATA) connector connected to the storage unit and the storage device interface of the motherboard are all arranged on the circuit board. A notch is defined in a bottom edge of the circuit board, to receive the protrusion. An edge connector is arranged on a bottom edge of the circuit board and includes second power pins connected to the power circuit, and second signal pins connected to the display unit.

Abstract: A memory card compatible RFID card includes a smartcard controller that receives power from a host device. The RFID card also includes a small inductive device capable of inductive coupling with an RFID reader. The small inductive device is small enough to fit in the form factor of a memory card. Commands may be sent to the RFID card to keep the RFID card powered.

Abstract: A PCI card's HBA identifier table held in an IODC in an IO slot expansion unit is read and recorded on a PCIe switch register of a PCIe switch. After a server blade is powered on so that an EFI is activated, the EFI reads the HBA identifier table recorded on the PCIe switch register and updates an HBA identifier of an HBA mounted in each PCI card. The HBA mounted in the PCI card operates with the updated HBA identifier of the PCI card. Thus, even when the PCI card is replaced by a new PCI card because of failure or the like, the new PCI card can operate with the same HBA identifier as that before the replacement. Therefore, a user does not have to register the HBA identifier of the PCI card newly in a device connected to the PCI card.

Abstract: A presence detectable baffle for electrical components in a computing system, including: a passive chassis having a form factor is consistent with an electrical component of the computing system; and a presence detectable pin set connected to the passive chassis, the pin set consistent with the electrical component.

Abstract: Example embodiments disclosed herein relate to selectively connecting an interconnect bus to an expansion slot. A first chip is connected to a first interconnect bus. A second chip is connected to a second interconnect bus. A switch selectively connects the first interconnect bus to one of a plurality of expansion slots.

Abstract: A USB SSIC removable electronic device includes a first receiving terminal pair, a first transmitting terminal pair, a MIPI/SSIC-PHY/Link layer, a function module, at least one power terminal and a ground terminal. The first receiving terminal pair receives data compatible with a USB SSIC interface. The first transmitting terminal pair transmits data compatible with the USB SSIC interface. The MIPI/SSIC-PHY/Link layer receives data compatible with the USB SSIC interface from the first receiving terminal pair, and transmits data compatible with the USB SSIC interface to the first transmitting terminal pair. The function module transmits data with the MIPI/SSIC-PHY/Link layer by the transmission protocol of the USB SSIC interface. The power terminal provides at least one source voltage for the MIPI/SSIC-PHY/Link layer and the function module.

Abstract: A method and an apparatus for monitoring single board running state are disclosed in the present invention. The above method comprises: establishing an Module Management Controller (MMC) communication channel between a slave board and a master control board when the slave board is powered up; and the slave board reporting running state information of the slave board to the master control board by the MMC communication channel according to one or more preset monitor information points. In the present invention, by the MMC function channel under the uTCA architecture, the slave board reports the master control board the running state of the working process from the moment of being powered-up to the time when the system runs stably, which solves the problem in the conventional art that the monitoring on the single aboard is incomprehensive and can record the running state of the slave board completely.

Abstract: An interface card quick plug-and-unplug device for use with a PCIe interface card is disclosed to include a shell covering a part of the PCIe interface card, and a locating member disposed at one side of the shell and/or the PCIe interface card for engagement with the PCIe slot upon insertion of the PCIe interface card into the PCIe slot. Biasing the locating member allows quick removal of the PCIe interface card from the PCIe slot without any tool. The interface card quick plug-and-unplug device enhances the flexibility of the design of computer circuit layout.

Abstract: According to one embodiment, first monitor controller of electronic circuit board recognizes free slot into which the electronic circuit board has been hot-inserted, notifies host control device of start together with slot information causes first parameter setting module to change reception parameter of first T/R circuit module. The host control device instructs switch processing board to change transmission parameter, in response to slot information and start notification. Second monitor controller of the switch processing board causes second parameter setting module to change transmission parameter of second T/R circuit module, in accordance with an instruction from the host control device.

Abstract: Embodiments of the present invention provide a method for managing a switch chip port. The method is applied in a distributed communications system and includes: detecting whether each of multiple service boards is in position; when it is detected that a service board is not in position, controlling disabling of a port corresponding to the detected not-in-position service board on a first switch chip of the main control board; and/or sending an in-position message including information about the not-in-position service board to the switch board, so that the switch board controls, according to the information about the not-in-position service board, disabling of a port corresponding to the not-in-position service board on a second switch chip of the switch board. Energy saving of a switch chip port can be efficiently implemented by adopting the technical solutions in the embodiments of the present invention, thereby efficiently reducing power consumption of the system.

Abstract: A method and apparatus for backplane support of 100/1000 Ethernet. A communication card for use in a chassis system is provided that includes a 100BASE-TX physical layer device component, a 1000BASE-KX physical layer device component, and a backplane connector, which is configured for enabling communication by the communication card over a backplane of the chassis system. The communication card also includes a selection module (e.g., a multiplexer) that is configured to selectively couple one of the 100BASE-TX physical layer device component and the 1000BASE-KX physical layer device component to the backplane connector, wherein the selective coupling enables a selected one of the 100BASE-TX physical layer device component and the 1000BASE-KX physical layer device component to communicate with a second communication card via the backplane of the chassis system.

Abstract: An expansion card and method for controlling a radio system integrates PCDD operations into a PCMCIA or ExpressCard which can be inserted into an external display, smart screen PCMCIA slot, or laptop ExpressCard or PCMCIA slot to allow an operator to control the radio system with a computer without any modification of the computer.

Abstract: This document discloses data security systems and methods of securing data. A cache memory can be connected between a decryption engine and a central processing unit (“CPU”) to increase security of encrypted data that is stored in a datastore. The decryption engine can retrieve the encrypted data from the datastore, decrypt the data, and store the decrypted data in the cache. In turn, the decrypted data can be accessed by the CPU. The data can be encrypted with a secret key, so that decryption can be performed with the secret key. The key can be varied based on a memory address associated with the data. The key can be protected by restricting direct access to the decryption engine by the CPU.

Abstract: The present invention discloses a method, related to smart card reader field, for recognizing a card reader with multiple card holders. The method includes connecting, by the card reader with multiple card readers, to a host and loading, by the host, card reader device bus driver; obtaining, by the card reader device bus driver, the device information of the card reader with multiple card readers and creating physical device object according to the device information; installing and loading, by the host, smart card function driver for each physical device object and registering a standard smart card driver library for every smart card function driver; creating, by the smart card service of the host, a new smart card device record in the resource manager of the smart card service according to the smart card function driver loaded and the smart card driver library registered and recognizing the card reader with multiple card readers as a plurality of smart card devices.

Abstract: A multi-mode data card includes at least two mode modules, and also includes an external interface module and an interface control module. The external interface module connects to the interface control module. The external interface is configured to connect with computer for data interaction; the interface control module is equipped with at least two channels, and said at least two channels connects to said at least two mode modules respectively. The interface control module is configured to: when the multi-mode data card is calibrated, connect the external interface module with the channel corresponding to the mode module to be calibrated, and switch the multi-mode data card to the mode to be calibrated. A method for calibrating multi-mode data card is also provided in the present invention.

Abstract: An indication of a version of a firmware stored in an input/output adapter may be provided by a method that includes detecting whether a first pin is connected to an external circuit, detecting whether a second pin is unconnected to an external circuit, and causing the indication to be provided if the first pin is connected and the second pin is unconnected. The indication may be provided on the first pin. The first pin may include a power supply pin and the indication may be an average rate of power supplied to the input/output adapter.

Abstract: The present invention provides a method and apparatus for controlling the operating condition of a peripheral device based on the mode of interconnection of the peripheral device of a host device. The apparatus includes a first connector for connecting the peripheral device, a second connector for connecting the host device and a coupling system operatively interconnecting contacts of the first connector and contacts of the second connector. The coupling system is further configured to provide a supply signal to the peripheral device via the first connector, wherein the supply signal is at least in part indicative of one or more characteristics of the power available to the peripheral device from the host device. The supply signal may provide a means for the peripheral device to control operation thereof in light of the characteristics of the power available.

Abstract: The invention provides a shock test device suitable for an expansion slot of a computer system. The shock test device includes a mainboard, a structure unit and a detection module. The mainboard has a connecting finger electrically connected to the expansion slot. The structure unit is disposed at the mainboard for simulating a weight and a supporting structure. The detection module is coupled to at least one pin of the connecting finger for detecting a touch condition between the connecting finger and the expansion slot so as to produce a warning signal. In this way, the shock test device can detect whether or not a link plug-in in a host computer (for example, the link between the expansion slot and the connecting finger portion of the shock test device) is disconnected due to shocking or unseen disconnected and then reconnected again.

Abstract: An assembly includes a printed circuit board and a solid memory module. The printed circuit board defines a slot in a side surface of the printed circuit board, the slot has a bottom surface, and the printed circuit board defines a groove in the bottom surface and includes a number of contacts attached on an inner surface of the groove. The solid memory module includes a body identical to the slot in shape and size, a connection board corresponding to the groove and extending from a side of the body corresponding to the bottom surface, and a number of terminals of corresponding to the contacts and attached on an outer surface of the connection board. The body is inserted into the slot while the connection board is inserted into the groove and the contacts connect the terminals.

Abstract: A data acquisition card, an expansion control system for a data acquisition card and a method thereof are disclosed. The method includes: a card address is preset for each data acquisition card, a channel address is preset for each data channel in the data acquisition card; the data acquisition card generates a corresponding card address signal after receiving a card beat signal from a user circuit, and judges whether the data acquisition card is selected; if the data acquisition card is selected, it generates a corresponding channel address signal after receiving a channel beat signal from the user circuit, and selects the data channel corresponding to the channel address signal. The data acquisition card, the expansion control system for the data acquisition card and the method thereof have powerful expansibility and high stability.

Abstract: In accordance with embodiments, a system includes a plurality of component slots and at least one indicator associated with each of said slots. The system also includes a controller coupled to the indicators. The indicators selectively provide installation guidance of components into said slots based on signals from the controller.

Abstract: In a method for registering identification information of network interface cards (NICs) in an operating system of a computing device, each of the NICs is respectively and uniquely labeled with a number. A peripheral component interconnect (PCI) device identification (ID) of each of the NICs is allocated according to the labeled number of each NIC using a basic input output system (BIOS) of the computing device when the BIOS is booted up. Then identification information of each of the NICs is registered in the operating system according to the PCI device ID of each NIC using a NIC driver of the computing device, when the NIC driver is driven by the operating system during the booting up process of the operating system.

Abstract: Structures and methods for improving logging in network structures are disclosed herein. In one embodiment, an apparatus can include: (i) a network interface card (NIC) configured to receive data, to transmit data, and to send data for logging; (ii) a memory log coupled to the NIC, where the memory log comprises non-volatile memory (NVM) configured to write the data sent for logging from the NIC; and (iii) where the data being sent for logging by the memory log occurs substantially simultaneously with the data being received by the NIC, and the data being transmitted from the NIC.

Abstract: A server system includes at least one blade server, wherein the blade server has at least one processor and memory modules, as well as a plug connector on an upper side or an underside of the blade server, a server frame with an opening on a first side of the server frame for accommodating the at least one blade server, wherein the server frame includes guidance means and a circuit board and a lifting device for guiding the at least one blade server in the lifting direction up to the circuit board, and at least one cooling fan assembly arranged inside the server frame.

Abstract: A peripheral component interconnect (PCI) adapter includes a PCI connector for connecting to a PCI slot of a motherboard, a first PCI expansion slots for connecting a first PCI card, a second PCI expansion slot for connecting a second PCI card, a detection control circuit connected to the first PCI expansion slot and the second PCI expansion slot, and an alarm circuit connected to the detection control circuit. The detection control circuit detects operation power of the first PCI card and the second PCI card, and controls the alarm circuit to report a fault alarm when the operation power of the first PCI card exceeds a threshold power of the first PCI expansion slot or the operation power of the second PCI card exceeds a threshold power of the second PCI expansion slot.

Abstract: A PCIe bus extension system, method, interface card and cable for connecting a PCIe-compliant peripheral device to a PCIe bus of a computer system. The interface card includes a printed circuit board, an edge connector adapted for insertion into a PCIe expansion slot on a motherboard of the computer system for transmitting PCIe signals between the motherboard and the interface card, an interface port configured to mate with a connector of the cable, and a logic integrated circuit on the printed circuit board, the logic integrated circuit functionally connecting the edge connector with the expansion slot and amplifying and propagating clock and data PCIe signals therebetween that are compliant with a PCIe standard. The interface card and cable lacks the capability of transmitting power therethrough to a PCIe-compliant peripheral device connected to the interface card through the interface port.

Abstract: A USB-to-SDIO bridge (UTSB) to efficiently transmit SD/SDIO commands in USB packets. The UTSB may allow the majority of the device drivers for a given SD/SDIO device to remain intact, requiring changes only in the lowest hardware adaptation layer to put a USB wrapper around native SD commands. These commands may be sent over USB-to-SD card reader devices that may include various embodiments of a UTSB, where they may be unwrapped and transmitted to the SD port as if the port were native to the host controller. Additionally, the SD/SDIO commands may be packaged into groups of commands, or transactions, to optimize performance. The host driver may instruct the UTSB bridge device to repeatedly read data from the SDIO device until a communications FIFO on the device is empty (corresponding to a termination condition), and return the collected data to the host.

Abstract: A load card for testing different types of PCI slots is provided. The load card includes several gold fingers, and resistor selection circuits. Each gold finger corresponds to one PCI slot. Each resistor selection circuit includes a resistor to test at least one PCI slot working in one working voltage. When a PCI slot working at a working voltage is to be tested, the gold finger connects to the PCI slot, and the resistor selection circuit including the resistor to test the PCI slot working at the working voltage is enabled and others are disabled in response to an operation of the user.

Abstract: A mechanism for integrating Universal Serial Bus (USB) devices is disclosed. A method of the invention includes retrieving an identifier of the USB device connected to a computer system, matching the identifier with a device identification stored in a systems library of the computer system. The systems library includes an application identifier corresponding to the device identification and an attribute corresponding to the application identifier. The method also includes executing instructions associated with attribute corresponding to the application identifier associated with the device identification matched to the identifier.

Abstract: Methods and systems are described for displaying enabling the transmission, formatting, and display of multimedia data after a hot plug event during a start-up dead period. In particular, approaches for transmission, formatting, and display of multimedia data in the absence or non-operation of a hot plug detect system or signal, so that multimedia information can be displayed in a proper format even during the dead period when no hot plug detect signal is received.

Abstract: Architectures and methods for performing big data analytics by providing an integrated storage/processing system containing non-volatile memory devices that form a large, non-volatile memory array and a graphics processing unit (GPU) configured for general purpose (GPGPU) computing. The non-volatile memory array is directly functionally coupled (local) with the GPU and optionally mounted on the same board (on-board) as the GPU.

Abstract: The present disclosure includes systems and techniques relating to customization of a bus adapter card. in some implementations, an apparatus includes a processor and a program memory, a bus adapter card coupled with the computing apparatus and configured to connect with a storage device, the bus adapter card computing a cache memory and a controller to cache in the cache memory data associated with the storage device, where the program memory includes a driver to communicate with the bus adapter card responsive to requests corresponding to the storage device, and the driver is configured to modify its communications with the bus adapter card responsive to information provided separate from the requests.

Abstract: An apparatus including a first connector configured to fit into a first socket in a processing system, the first connector and first socket conforming to a first standard, a second socket configured to accept a memory module therein, the second socket and the memory module conforming to a second standard, a memory buffer module communicatively coupled to the first connector and the second socket, the memory buffer module configured to receive signals associated with the first standard from the first connector and output signals associated with the second standard to the second socket, and a virtualization module communicatively coupled to the memory buffer module, the first connector, and the second socket, the virtualization module configured to receive first initialization data associated with the second standard from the second socket and output second initialization data associated with the first standard to the processing system.