Hot Insertion Patents (Class 710/302)
  • Patent number: 7523241
    Abstract: There is provided a hot-plug signal detecting apparatus capable of surely detecting change of a hot plug signal without increasing load on a transmission processing unit. A hot plug signal from a sink device is inputted to an AD input terminal of a controller, the hot plug signal is subjected to AD conversion, and a high level or low level is determined from the digital value, and thus, a hot-plug detecting circuit is not necessary, which can simplify a circuit configuration. Moreover, if a period of the low level of the hot plug signal is shorter than Tout, a period of the low level is prolonged to Tout, which allows the transmission processing unit to surely detect the low level without shortening a cycle at which the hot plug signal is detected.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: April 21, 2009
    Assignee: Onkyo Corporation
    Inventor: Tomohito Konishi
  • Publication number: 20090100208
    Abstract: A computer software system is disclosed for facilitating a user's replacement or insertion of devices in a computer server network system. The system allows a user to swap or add peripheral devices while the system is running, or in a “hot” condition, with little or no user knowledge of how the system carries out the “hot swap” or “hot add” functions. The system, which consists of a graphical user interface (GUI) and associated computer software modules, allows the user to select a desired peripheral device location within a server, and then provides the modular software structure to automatically execute a series of steps in the hot swap or hot add process. Each step is prompted by the user from the GUI, to invoke commands to instruct a network server through its operating system and hardware to suspend the appropriate device adapters, if necessary, power down the desired device slot or canister, allow the user to replace or insert a new device, and finally restart the adapters and the slot power.
    Type: Application
    Filed: November 18, 2008
    Publication date: April 16, 2009
    Applicant: Micron Technology, Inc.
    Inventors: Srikumar N. Chari, Kenny L. Bright
  • Patent number: 7519756
    Abstract: A PC card control apparatus includes a PC card connector, a card detector and an interconnection switching circuit. The PC card connector is configured to provide connections for connecting one of a first PC card compliant with specific card standards and a card-adapting card for connecting a second PC card compliant with a different card standard to the PC card control apparatus. The card detector is configured to detect connection of the card-adapting card to the PC card control apparatus and to subsequently output a detection signal. The interconnection switching circuit is configured to switch the connections of the PC card connector to connect the PC card connector to a bus interface dedicated to the second card upon receiving the detection signal from the card detector.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: April 14, 2009
    Assignee: Ricoh Company, Ltd.
    Inventors: Hitoshi Yamamoto, Hiromasa Kusakabe, Kazuhito Akiyama
  • Patent number: 7518614
    Abstract: A remote management controller may include a video redirection device and a processor. The video redirection device may be configured to: obtain multiple separate slices of video data output from a video graphics controller; calculate at least one value correlative to each of the multiple separate slices of video data; and if the calculated value for any portion of any of the multiple separate slices differs from a value for a previously obtained corresponding portion, update a table associated with an image related to a remote system with the calculated value, process the portion of the slice into a network packet, and move the network packet to one of multiple network buffers. The processor may be configured to: allocate the multiple network buffers; and facilitate transmission of the network packets loaded into the network buffers to the remote system.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: April 14, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore F. Emerson, Robert L. Noonan, David F. Heinrich, Don Dykes
  • Patent number: 7512778
    Abstract: A method for using an operating system device for non-operating system uses. A false event signal is generated to indicate that a device should be shut down. After this is accomplished, the device is used for a different purpose while the operating system thinks it is inoperative. Once the other use is completed, another false event signal is generated so that the device is activated again and returned to use in the operating system in normal fashion.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: March 31, 2009
    Assignee: Intel Corporation
    Inventor: Mahesh S. Natu
  • Patent number: 7512726
    Abstract: A reconfigurable flash media reader system provides a flash media reader that accepts both asynchronous and synchronous flash media cards. The reader identifies the card type of the inserted flash media card and notifies the host computer of the card type. The host computer has a list of interface information for different types of flash media cards and references the card type in the list and sets the proper baud rate on the reader. If the flash media card is a synchronous card, data that is to written into the flash media card is gathered and converted to the proper card IO strobes for the card type which are interleaved with the proper card clock strobes for the card type into a bit stream in a bulk transfer packet. The reader extracts the data bit stream from said bulk transfer packet and clocks the data bit stream into the flash media card using the baud rate as a reference clock.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: March 31, 2009
    Assignee: O2Micro International Limited
    Inventors: Ching-Yung Han, Chin-Ran Lo
  • Patent number: 7506093
    Abstract: A method and apparatus are provided for operating a hot plug system. A first device may determine whether the system is to operate in one of a parallel mode or a serial mode. A second device may control a mode of the chipset based on the determination of the first device. The second device may include logic, a first multiplexer, a second multiplexer, a first converter and a second converter all provided on the chipset.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: March 17, 2009
    Assignee: Intel Corporation
    Inventors: Joseph A. Bennett, David Sastry
  • Publication number: 20090063743
    Abstract: A card-type peripheral device includes an electronic component including a memory disposed in a case, a terminal part including connection terminals connectable with a to-be-connected device, and a switch for disabling writing to the memory. The card-type peripheral device further includes a signal terminal capable of transmitting a signal indicating the status of the switch to the to-be-connected device.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 5, 2009
    Applicant: Sony Corporation
    Inventors: Yoshitaka Aoki, Keiichi Tsutsui
  • Patent number: 7500040
    Abstract: A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for synchronizing processors during an assertion of a system management interrupt (SMI) in an information handling system including, for each processor, identifying whether the processor is an interrupt handling processor assigned to perform processing tasks necessary for resolving the SMI or a non-interrupt handling processor not assigned to perform the processing tasks necessary for resolving the SMI. The method further includes creating a task structure operable to cause non-interrupt handling processors to perform at least one task for each interrupt handling processor. The method further includes automatically performing the at least one task during the SMI for each non-interrupt handling processor.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: March 3, 2009
    Assignee: Dell Products L.P.
    Inventors: Saurabh Gupta, Paul D. Stultz
  • Publication number: 20090055567
    Abstract: A device for assembling transversal PCI expansion cards and a computer housing includes a vertical connection board which is installed in an internal space of a computer housing, with a riser card being fixed on the connection board. The riser card is provided with a plurality of insertion slots, and a side of the connection board is provided with a plurality of brackets, such that tail ends of PCI expansion cards can be horizontally locked on the brackets, thereby allowing more PCI expansion cards, which are superimposed, to be horizontally inserted in a limited space of the computer housing.
    Type: Application
    Filed: August 24, 2007
    Publication date: February 26, 2009
    Inventors: Richard Chen, Yen-Lun Lee
  • Patent number: 7493638
    Abstract: An IC card (processing terminal) divides a process into process blocks, and holds a time period required for processing each process block. A receiver (receiving terminal) notifies the IC card of a time period which can be spent for processing non-real-time process data when causing the IC card to perform the processing. The IC card processes the process blocks which can be processed within the notified time period. After the processing, the IC card once sends a response back to the receiver, and then transitions into a state in which it can receive a new request. Accordingly, it becomes possible for the IC card to process real-time process data such as an ECM. In the case where the receiver continues the suspended processing, it notifies the IC card of the continuation of the processing so that it causes the IC card to continue the processing of non-real-time process data.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: February 17, 2009
    Assignee: Panasonic Corporation
    Inventors: Takuji Hiramoto, Satoshi Niwano, Katsumi Tokuda, Hiroki Murakami
  • Patent number: 7493438
    Abstract: An apparatus and method for enumeration of processors during hot-plug of a compute node are described. The method includes the enumeration, in response to a hot-plug reset, of one or more processors. The enumeration is provided to a system architecture operating system in which a compute node is hot-plugged. Once enumeration is complete, the compute node is started in response to an operating system activation request. Accordingly, once device enumeration, as well as resource enumeration are complete, the one or more processors of the processor memory node are activated, such that the operating system may begin utilizing the processors of the hot-plugged compute node.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: February 17, 2009
    Assignee: Intel Corporation
    Inventors: Shivnandan D. Kaushik, James B. Crossland, Mohan J. Kumar, Linda J. Rankin, David J. O'Shea
  • Patent number: 7490197
    Abstract: The invention is directed towards a system and method that utilizes external memory devices to cache sectors from a rotating storage device (e.g., a hard drive) to improve system performance. When an external memory device (EMD) is plugged into the computing device or onto a network in which the computing device is connected, the system recognizes the EMD and populates the EMD with disk sectors. The system routes I/O read requests directed to the disk sector to the EMD cache instead of the actual disk sector. The use of EMDs increases performance and productivity on the computing device systems for a fraction of the cost of adding memory to the computing device.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: February 10, 2009
    Assignee: Microsoft Corporation
    Inventors: Alexander Kirshenbaum, Cenk Ergan, Michael R. Fortin, Robert L. Reinauer
  • Patent number: 7490199
    Abstract: A method and system is introduced for allowing removal of a removable device connected to a digital appliance in a safe manner that preserves removable device integrity. There is no requirement for taking any actions prior to removing the removable device such as to safely remove the device. The user can intuitively tell removable device is in a state that can be safely removed and remove the device. Following a state where device can be safely removed, digital appliance can make use of removable device if the removable device had not been removed from the digital appliance.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: February 10, 2009
    Inventor: Noam Camiel
  • Publication number: 20090034221
    Abstract: Method for controlling power and communications between to an electronic circuit board. A chassis includes a first electronic circuit board with a first connector and a cassette includes a second electronic circuit board with a second connector. When the cassette is received by the chassis, chassis flex circuitry and cassette flex circuitry come into contact to complete a circuit between the components. Closing the circuit indicates to a controller that the cassette is properly secured to the chassis and that a user is not attempting removal of the cassette. The controller instructs a power source to provide power to the second electronic circuit board through the first connector. When the circuit is broken by a user, the controller causes the completion of operations on the second electronic circuit board and causes the power source to stop supplying power to the second electronic circuit board.
    Type: Application
    Filed: October 13, 2008
    Publication date: February 5, 2009
    Applicant: Intrnational Business Machines Corporation
    Inventor: Brian Michael Kerrigan
  • Publication number: 20090019301
    Abstract: One aspect of the embodiments utilizes a storage apparatus includes a storage device through which data is input from and output to an external apparatus having an external interface. The storage apparatus includes a power supply control switch provided on a power supply line through which power is supplied to the storage device. A conversion control circuit converts signals mutually between a device interface of the storage device and the external interface, and performs control to turn off the power supply control switch so that supply of power to the storage device is stopped upon the storage device entering an idle state, the idle state being a state where input to and output from the external apparatus are absent.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 15, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Akira Minami
  • Publication number: 20090019205
    Abstract: In order to greatly simplify the electronics of devices utilizing memory cards, a new type of interface specification is presented which is called DPXD for a “Dual Ported extended Digital” memory card.
    Type: Application
    Filed: September 24, 2008
    Publication date: January 15, 2009
    Inventor: PETER ARTHUR SCHADE
  • Patent number: 7478187
    Abstract: Hot connection and disconnection of an external graphics cable with an information handling system provides automatic selection of an external graphics device or an internal graphics device for presentation of visual information. A graphics state module periodically stores visual information, such as display objects for recreating a display frame, and monitors an external graphics device port, such as a PCI Express port, to detect a change in connection state at the external graphics port. Upon detection of a connection or disconnection at the external graphics port, the graphics state module attempts to initiate graphics devices in a predetermined order and provides the stored visual information for presentation at successfully initiated graphics devices according to the predetermined order.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 13, 2009
    Assignee: Dell Products L.P.
    Inventors: Lawrence E. Knepper, Thomas A. Shows
  • Publication number: 20090013120
    Abstract: In a method for transferring data from a tachograph (1) onto a smartcard (3), the smartcard (3) is moved out of and back into the tachograph (1) by an electromotive drive (8) as a function of stipulated conditions. In the process, spring contacts (6) of the tachograph (1) rub over contact areas (5) of the smartcard (3) and remove any dirt which may be present. The conditions for starting the electromotive drive (8) and the intended operation of the electromotive drive (8) are stored in a memory (10) of an electronic control device (9).
    Type: Application
    Filed: January 18, 2007
    Publication date: January 8, 2009
    Inventors: Dieter Klostermeier, Horst Nather, Thomas Riester, Peter Wolf
  • Patent number: 7475171
    Abstract: A data transfer control device including: a link controller which analyzes a packet received through a serial bus; a packet detection circuit which detects completion or start of packet reception based on analysis result of the received packet; first and second packet buffers into which the packet received through the serial bus is written; and a switch circuit which switches a write destination of the received packet. When a Kth packet has been written into one of the first and second packet buffers and completion of reception of the Kth packet or start of reception of a (K+1)th packet subsequent to the Kth packet has been detected, the switch circuit switching the write destination of the (K+1)th packet to the other of the first and second packet buffers.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: January 6, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Hiroyasu Honda
  • Patent number: 7469308
    Abstract: A hierarchical bus structure is disclosed in which clusters of processors are arranged and interconnected within a hierarchy to facilitate processor communications via shared memories. The bus structure is well suited for voice processing applications in which clusters of embedded processors process voice streams in parallel, although the architecture is not so limited. Also disclosed is a memory access protocol in which the address and data portions of shared-memory access operations are performed as separate bus transactions that are separated in time, such that multiple concurrent memory access operations from different processors may be interleaved over a shared bus.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: December 23, 2008
    Assignee: Schism Electronics, LLC
    Inventors: Richard F. Hobson, Bill Ressl, Allan R. Dyck
  • Publication number: 20080313378
    Abstract: The invention relates to a method for determining device criticality in a computer system comprising the steps of building a component hierarchy graph using computer configuration information; labeling the nodes of component hierarchy graph with redundancy attribute; traversing the component hierarchy graph; and determining whether the device loses an access path by inspecting the redundancy attributes within the component hierarchy graph. Furthermore, one of a plurality of severity levels is assigned to each identified affected resource based on predetermined criteria. The severity levels include a low severity level, a medium severity level, and a high severity level. Each severity level represents degree of impact to the computer system if functionality of the identified affected resource became unavailable.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 18, 2008
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kishore Kumar Muppirala, Vasundhara Gurunath, Ushadevi Hassan Nagaraja
  • Patent number: 7467252
    Abstract: An I/O bus architecture is configurable so that I/O bandwidth may be re-allocated from one I/O slot or device to another. A first intermediate bus couples a system bus interface device to a first I/O bus interface device. A second intermediate bus couples the system bus interface device to a switching device. The switching device functions to couple the second intermediate bus either to the first or to the second I/O bus interface device responsive to a steering signal. The steering signal may be configured to indicate whether or not an I/O device is coupled to the second I/O bus interface device. If so, then the second intermediate bus is coupled to the second I/O bus interface device; but if not, it is coupled to the first I/O bus interface device so that the first I/O bus interface device may utilize the extra I/O bandwidth not being used by the second I/O bus interface device.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: December 16, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Charles Hartman, Raphael Gay
  • Publication number: 20080307143
    Abstract: A kind of modularized channel technology with expansion of different IO output interfaces, hereafter called MIB (modular industrial bus) system, which consists of an interface card carrying control chip, a BUS transmission interface, an expansion board, and a hot-plug capacity IO output module; the said interface card carrying control chip can be used to convert output data into communication transmission standard suitable for transmission interface and transmit the data to expansion board through wired or wireless communication interface and then output the IO data through the several sets of output modules (blocks) installed on the expansion board; the present invention allows users to instantly expand or replace different output interfaces and output ports according to different requirements and hot plug-in methods in order to resolve the problem of many specifications and complexities that conventional technology faces due to different types of interface cards, output interfaces, and output ports.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Inventor: Ming-Cheng Lin
  • Patent number: 7464016
    Abstract: In one embodiment, a distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot pull command designating the first node. The first node does not participate in the simulation responsive to the hot pull command. In another embodiment, A distributed simulation system may include a first node configured to participate in a simulation and a second node configured to transmit a hot plug command designating the first node. The first node does not participate in the simulation prior to the hot plug command. Additionally, the first node begins participation in the simulation responsive to the hot plug command.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: December 9, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: James P. Freyensee, Carl Cavanagh, Steven A. Sivier, Carl B. Frankel
  • Patent number: 7464205
    Abstract: A method for transferring data within a network storage appliance is disclosed. The method includes transmitting a packet on an I/O link from a server to a first portion of a storage controller. Transmitting the packet on the I/O link is performed within a single blade module in a chassis enclosing the storage appliance. The method also includes forwarding a data transfer command within the packet from the first portion of the storage controller to a second portion of the storage controller. Forwarding the data transfer command is performed via a local bus on a backplane of the chassis through a connector of the blade connecting the blade to the backplane.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: December 9, 2008
    Assignee: Dot Hill Systems Corporation
    Inventors: Ian Robert Davies, George Alexander Kalwitz, Victor Key Pecone
  • Patent number: 7464214
    Abstract: A server blade includes a printed circuit board (PCB), including a connector for connecting the blade to a backplane comprising a local bus, and a removal mechanism for use by a person to disconnect the connector from the backplane for removal of the blade from a chassis while the chassis is powered up. The server blade also includes an I/O link and a server, each affixed on the PCB. The server transmits packets on the I/O link to a storage controller enclosed in the chassis. The packets include commands to transfer data to at least one storage device controlled by the storage controller. A portion of the storage controller, affixed on the PCB, receives the packets from the server on the I/O link, and forwards the commands on the backplane local bus to another portion of the storage controller affixed on a separate PCB enclosed in the chassis.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: December 9, 2008
    Assignee: Dot Hill Systems Corporation
    Inventors: Ian Robert Davies, George Alexander Kalwitz, Victor Key Pecone
  • Patent number: 7457904
    Abstract: In at least some embodiments, a method comprises receiving an external card detection signal that indicates that a hot-pluggable card is coupled to a computer system and activating at least one reference clock signal of a scalable reference clock platform based on the external card detection signal. The method further comprises synchronizing clock signals embedded in data packets transmitted between the hot-pluggable card and the computer system with another clock signal bases on the at least one reference clock signal.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: November 25, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard S. Lin, Jeffrey K. Jeansonne, Walter G. Fry
  • Patent number: 7453692
    Abstract: A modular transmission interface is provided on a motherboard. The motherboard has a South Bridge and a power transmission port. The transmission interface includes a slot connector and an adaptor board. The slot connector is provided on the motherboard, and is connected to the South Bridge and the power transmission port. The adaptor board has a board body, a mating connector provided on the board body and connected detachably to the slot connector, a hard disk connector provided on the board body and connected to the mating connector, and an optical disk drive connector provided on the board body and connected to the mating connector. A hard disk and an optical disk drive can be connected to the motherboard through the adaptor board, thereby facilitating assembly and maintenance.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: November 18, 2008
    Assignee: Aopen Inc.
    Inventor: Yuang-Chih Chen
  • Patent number: 7453816
    Abstract: A method, apparatus, and computer instructions are provided by the present invention to automatically recover from a failed node concurrent maintenance operation. A control logic is provided to send a first test command to processors of a new node. If the first test command is successful, a second test command is sent to all processors or to the remaining nodes if nodes are removed. If the second command is successful, system operation is resumed with the newly configured topology with either nodes added or removed. If the response is incorrect or a timeout has occurred, the control logic restores values to the current mode register and sends a third test command to check for an error. A fatal system attention is sent to a service processor or system software if an error is encountered. If no error, system operation is resumed with previously configured topology.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: November 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: James Stephen Fields, Jr., Michael Stephen Floyd, Benjiman Lee Goodman, Paul Frank Lecocq, Praveen S. Reddy
  • Patent number: 7454549
    Abstract: A computer software system is disclosed for facilitating a user's replacement or insertion of devices in a computer server network system. The system allows a user to swap or add peripheral devices while the system is running, or in a “hot” condition, with little or no user knowledge of how the system carries out the “hot swap” or “hot add” functions. The system, which consists of a graphical user interface (GUI) and associated computer software modules, allows the user to select a desired peripheral device location within a server, and then provides the modular software structure to automatically execute a series of steps in the hot swap or hot add process. Each step is prompted by the user from the GUI, to invoke commands to instruct a network server through its operating system and hardware to suspend the appropriate device adapters, if necessary, power down the desired device slot or canister, allow the user to replace or insert a new device, and finally restart the adapters and the slot power.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: November 18, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Srikumar N. Chari, Kenny L. Bright
  • Patent number: 7449800
    Abstract: A power control system for use in an electronic device provided with a transforming module becoming self-contained upon connection with a power supply includes a switch module, a delay module, and a control module. The switch module turns on or off a power input route whereby the transforming module can supply power to the electronic device, and keeps the power input route at an off state while the transforming module remains unconnected to the power supply. The delay module performs a delay process and generates delay signals. The control module receives the delay signals generated and enables the switch module to turn on the power input route. The present invention prevents the stability of the electronic device from being deteriorated as a result of electric sparks induced by metallic friction and excessive instantaneous current while the electronic device is being connected to the power supply.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: November 11, 2008
    Assignee: Inventec Corporation
    Inventors: Weesyk Wang, Michael Yang
  • Patent number: 7447824
    Abstract: A dynamic lane management system comprises at least one downstream device of a computer system configured to dynamically initiate a lane width re-negotiation operation with at least one upstream device of the computer system in response to a detection of at least one power-related event associated with the computer system.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: November 4, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Monji G. Jabori, Rahul V. Lakdawala, Qijun Chen
  • Patent number: 7447943
    Abstract: A system includes a mechanism to detect addition of a memory module. In response to the addition of the memory module, a memory test is run to test the new memory module for a defect. If an uncorrectable error is detected, a routine is activated to process the error. Depending on whether the defect occurred in the new memory module or existing memory module(s), different processing is performed.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: November 4, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul H. Vu, Darrell R. Haskell, Robert A. Lester, Timoth W. Majni
  • Patent number: 7447822
    Abstract: A hot-plug control system and method is applied to a computer device, wherein the computer device is provided with a PCI-E (Peripheral Component Interconnect Express) bus, at least one PCI-E slot having a power switch and an indicator light, a power control unit and a driver. The hot-plug control system at least includes a signal control module for generating an interrupt signal; a detection module for detecting the status of the PCI-E slot and the power switch corresponding to the PCI-E slot in response to the interrupt signal; a control module for allowing power to be provided to the PCI-E slot and the indicator light corresponding to the PCI-E slot to be illuminated when the detection module detects that a new expansion card has been inserted in the PCI-E slot and the corresponding power switch has been actuated; and a drive module for loading the driver to drive the inserted expansion card.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: November 4, 2008
    Assignee: Inventec Corporation
    Inventor: Ming-Chen Wu
  • Patent number: 7441066
    Abstract: The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding and removing process cell boards and I/O from partitions which may or may not continue to run. The invention also allows changes to the association between cells, I/O and partitions. The partitions may be able to stay running, or may have to be shut down from the resulting changes. In the invention, multiple copies of the OS are running independently of each other, each in a partition that has its own cell boards with processors and memory and connected I/O. This provides isolation between different applications. Consequently, a fatal error in one partition would not affect the other partitions.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: October 21, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul H. Bouchier, Ronald E. Gilbert, Jr., Guy L. Kuntz
  • Patent number: 7437496
    Abstract: There is disclosed a hot swap adapter having a circuit board, a power connector, a data connector and a circuit board connector. The circuit board may include one more logic devices. The power connector, the data connector and the circuit board connector may attach to the circuit board. The data connector may interface with a serial bus. The circuit board connector may interface with a parallel bus and a power rail. The logic device may provide a conversion from the serial bus to the parallel bus. The logic device may cause current to stop flowing from the power connector to the power rail in response to an over load condition.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: October 14, 2008
    Assignee: IXIA
    Inventor: Melvin Oster
  • Patent number: 7437494
    Abstract: The present invention provides systems, methods, and bus controllers for establishing communication with various network systems located on a network system. Importantly, the systems, methods, and bus controllers of the present invention are capable recognizing that a new network device has been added to an existing network and assigning it an address such that the added network device is identifiable on the network. Further, the systems, methods, and bus controllers of the present invention may update the operating schedule that outlines communication in the network system between the bus controller and the network devices to include commands for communicating with the added network device. The systems, methods, and bus controllers of the present invention may also detect when a network device has been disconnected from a network system and remove the commands associated with the networked device from the command schedule.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: October 14, 2008
    Assignee: The Boeing Company
    Inventor: Philip J. Ellerbrock
  • Publication number: 20080250181
    Abstract: The present invention relates to the field of communications, in particular, to a server for solving the problem related to the incompatibility between normal blades and multi-processing blades in a conventional server. The server according to an embodiment of the invention includes a backboard, on which backboard wiring and a first slot are disposed. At least two second slots are further disposed on the backboard. Both a first interface configured to be connected to a normal blade and a second interface configured to be connected to a multi-processing blade are disposed on each of the second slots, the first interface being connected to a corresponding Cluster Switch interface disposed on the first slot via the backboard wiring, and the second interface being interconnected directly via the backboard wiring or being connected to a corresponding Symmetrical Multi-Processing Switch interface disposed on the first slot via the backboard wiring.
    Type: Application
    Filed: May 30, 2008
    Publication date: October 9, 2008
    Inventors: Minqiu Li, Feng Hong, Chunming Sheng, Tinghong Wang, Xing Rao, Jin Yu, Shaolin Zhang, Hansi Wang, Dingliang Gan
  • Publication number: 20080244143
    Abstract: A semiconductor device is disclosed including die bond pads which are heightened to allow wire bonding of offset stacked die even in tight offset configurations. After a first die is affixed to a substrate, one or more layers of an electrical conductor may be provided on some or all of the die bond pads of the first substrate to raise the height of the bond pads. The conductive layers may for example be conductive balls deposited on the die bond pads of the first substrate using a known wire bond capillary. Thereafter, a second die may be added, and wire bonding of the first die may be accomplished using a known wire bond capillary mounting a wire bond ball on a raised surface of a first semiconductor die bond pad.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventors: Alan Chiou, Bahman Qawami, Farshid Sabet-sharghi
  • Publication number: 20080222335
    Abstract: The invention is to provide a mode setting method and a system including a PCI bus in the hot plug of a PCI device which is capable of supporting a platform unique function for a PCI device that is hot-added. Therefore, in a system including a PCI bus according to an exemplary embodiment of the invention, a south bridge directly notifies firmware that a PCI device is hot-added and thus, it is possible to support the platform unique function for the hot-added PCI device without modifying an OS or an open hot plug driver.
    Type: Application
    Filed: March 5, 2008
    Publication date: September 11, 2008
    Inventor: KOJI ABUMI
  • Publication number: 20080222334
    Abstract: An electronic apparatus includes a main body, a panel unit removable from the main body, and an attachment unit configured to indirectly attach a removable memory device to the main body through the panel unit. The main body includes a control unit configured to logically disconnect a data line between the removable memory device and the main body at a time when a user operation for removing the panel unit from the main body is performed and before the panel unit is removed from the main body.
    Type: Application
    Filed: February 19, 2008
    Publication date: September 11, 2008
    Applicant: Sony Corporation
    Inventors: Takuma HIGO, Takaharu FUJII, Ryuichiro NOTO, Taichi YOSHIO
  • Publication number: 20080209098
    Abstract: Exemplary embodiments describe a design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for performing the functions of a PCI Express feature card remotely from a data processing system. The system is comprised of a circuit board connected to a PCI-E feature card. The PCI-E feature card is remotely located in comparison to the circuit board. Architecturally, the PCI-E feature card appears to the circuit board to be located at the circuit board.
    Type: Application
    Filed: April 30, 2008
    Publication date: August 28, 2008
    Inventors: JOHN D. LANDERS, David J. Steiner
  • Publication number: 20080209097
    Abstract: Apparatus and method to controlling power and communications between to an electronic circuit board. A chassis includes a first electronic circuit board with a first connector and a cassette includes a second electronic circuit board with a second connector. When the cassette is received by the chassis, chassis flex circuitry and cassette flex circuitry come into contact to complete a circuit between the components. Closing the circuit indicates to a controller that the cassette is properly secured to the chassis and that a user is not attempting removal of the cassette. The controller instructs a power source to provide power to the second electronic circuit board through the first connector. When the circuit is broken by a user, the controller causes the completion of operations on the second electronic circuit board and causes the power source to stop supplying power to the second electronic circuit board.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 28, 2008
    Inventor: Brian Michael Kerrigan
  • Patent number: 7414335
    Abstract: An inrush current controller for a device has a connector for hot-plugging the device into a source of energization. An impedance has a current input coupled to a first contact of the connector and a current output coupled to the device. The impedance has an impedance control input. An impedance control circuit has a logic input coupling to a second contact of the connector. The impedance control circuit has an impedance control output connected to the impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: August 19, 2008
    Assignee: Seagate Technology
    Inventors: Hakam D. Hussein, Wendong Zhang Zhang
  • Publication number: 20080195787
    Abstract: An interface to a removable device includes a power monitoring device that can be used to quickly detect if a removable device is present during boot up or start. If the removable device is present, the normal startup sequence is performed for the removable device. If the removable device is not present, the startup sequence skips any further startup sequence for the removable device. In some embodiments, the power draw of a device may be used to detect that the removable device is ready, rather than waiting a predetermined time before assuming that the removable device is ready.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 14, 2008
    Applicant: Microsoft Corporation
    Inventor: Avi R. Geiger
  • Publication number: 20080195786
    Abstract: The present invention provides a hard disk type detecting circuit for detecting a type of a hard disk plugged into a hard disk connecting port. The circuit includes a ground end, a power end for receiving a reference power source, and a voltage divider having a first resistor and a second resistor electrically connected to the first resistor via a signal output end. Two paths are formed in the signal output end, one path being used as a signal output end, the other electrically connecting with an idle pin of the hard disk connecting port. When a hard disk is plugged into the hard disk connecting port, the idle pin, depending on the type of the plugged hard disk, is or is not electrically connected to the hard disk. According to the connection result, the signal output end outputs an identifiable signal, indicating the type of the hard disk.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 14, 2008
    Applicant: Inventec Corporation
    Inventor: Chung Lun Lee
  • Publication number: 20080183933
    Abstract: A removable interface card expansion module slidably disposed in a case for the insertion of at least one interface card is provided. An opening is opened in the case, and a mainboard having at least one interface card slot corresponding to the interface card is disposed in the case. The removable interface card expansion module includes a removable frame, an expansion circuit board, and an interface adapter device. The removable frame slidably passes through the opening to be fixed in the case. The expansion circuit board is fixed in the removable frame, and includes at least one expansion slot for the insertion of the interface card. The interface adapter device is electrically connected to the expansion circuit board and the interface card slot of the mainboard, so as to electrically connect the interface card to the mainboard.
    Type: Application
    Filed: January 30, 2007
    Publication date: July 31, 2008
    Applicant: Inventec Corporation
    Inventors: Ying-Chao Peng, Chun-Ying Yang
  • Publication number: 20080184053
    Abstract: A pluggable module connected to the backplane or other connection interface of an information system unit so as to provide additional functionality thereto (such as a communications interface to an electrical or fiber optics cable), and arranged to draw electrical power from the system. In order to prevent excessive in-rush current on connection, the module is provided with power control circuitry which is adapted to incrementally increase the supply voltage to components within the module in a manner so as to avoid power supply glitches in the system, such as a substantial voltage drop, and/or excessive current flow.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 31, 2008
    Applicant: EMCORE Corporation
    Inventors: Xiaozhong Wang, Edmond Lau, Bill Lau
  • Patent number: 7406549
    Abstract: According to an embodiment of the invention, a method and apparatus for support of a non-standard device containing operating system data are described. According to one embodiment, a circuit comprises a first device that is not compliant with a PCI (peripheral component interconnect) standard, the first device containing operating system data, where the operating system data is not bootable for any non-standard device; a second device that is compliant with the PCI standard, the second device being associated with the operating system data, the association of the second device with the operating system data from the first device enabling the operating system data from the first device to be booted according to the PCI standard; and a memory to receive the operating system data from the first device.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: July 29, 2008
    Assignee: Intel Corporation
    Inventors: Soo Keong Ong, Wei Kee Law