Hot Insertion Patents (Class 710/302)
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Patent number: 7653772Abstract: A control system comprising an electronic device equipped with a port, a hub being connectable to multiple external devices and to be connected to the port of the electronic device, and one or more external devices to be connected to the hub, the operation of the external devices connected via the hub being controlled using the electronic device, wherein the electronic device comprises a supplying section for supplying currents to the hub connected to the port and the external devices connected via the hub, and a storage section for storing the magnitude of the total current supplied from the supplying section.Type: GrantFiled: August 24, 2006Date of Patent: January 26, 2010Assignee: Sharp Kabushiki KaishaInventors: Motohiro Hayashi, Kenji Ogasawara, Mariko Arai
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Publication number: 20100005211Abstract: An adapter board assembly includes a board member installed in one slot of a motherboard of an electronic apparatus and having arranged thereon a plurality of electronic devices, signal input ports and signal output ports, a metal frame fixedly provided at one side of the board member for affixing the board member to a rack inside the electronic apparatus to stabilize the positioning of the board member, and a control circuit electrically connected with the signal input ports and the signal output ports for converting a first format of each external signal being inputted into one signal input port into a second format for output through one corresponding signal output port.Type: ApplicationFiled: July 2, 2008Publication date: January 7, 2010Applicant: CHENBRO MICOM CO., LTD.Inventors: Po-Chih Wen, Tzu-Ping Yu
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Publication number: 20100005150Abstract: An image display system 20 includes a projector PR1, a computer PC1 and a USB memory U1 which can be connected in an ad-hoc mode by using a wireless LAN. When a user connects the USB memory U1 to a USB interface 75 of the projector PR1, the projector PR1 writes network setup information in a setup information storage area 144 of the USB memory U1. Then, when the user removes the USB memory U1 from the USB interface 75 and connects it to a USB interface 125 of the computer PC1, the computer PC1 performs network setup by referring to the network setup information and establishes connection to start projection by an automatic start program.Type: ApplicationFiled: January 6, 2009Publication date: January 7, 2010Applicant: Seiko Epson CorporationInventors: Mitsuru Kubota, Toru Karasawa, Tomohiro Nomizo
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Patent number: 7644218Abstract: A semiconductor storage device connected to the host system through the general purpose interface, including a semiconductor storage media module (1) and a controller module (2), in which the controller module (2) consists of a general purpose interface control module (21), a microprocessor and control module (22). Various device class protocols can be realized at the interface application level of the semiconductor storage device, which makes it possible to simulate and realize the storage functions of various storage disks. One or a plurality of storage spaces are opened up in the semiconductor storage media and one or a plurality of storage disks are supported by the same device; furthermore, the device supports hot plug and play and it is removable.Type: GrantFiled: October 24, 2007Date of Patent: January 5, 2010Assignee: Netac Technology Co., LtdInventors: Guoshun Deng, Xiaohua Cheng, Feng Xiang
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Patent number: 7644217Abstract: A low power Universal Serial Bus (USB) capable device uses a weak pull-up resistance that is coupled to at least one data line of the USB for detection of when the USB capable device is connected to a USB host or hub. When the USB capable device is not connected to the USB host or hub, USB peripheral, including the USB transceiver, USB voltage regulator, serial interface and/or USB logic circuits required for USB operation may be powered down to conserve power drawn by the USB capable device. When the USB capable device is connected to the USB host or hub, a voltage from the weak pull-up will be significantly reduced, thus signaling that the USB peripheral and associated circuits should be powered up for normal USB operation.Type: GrantFiled: March 2, 2007Date of Patent: January 5, 2010Assignee: Microchip Technology IncorporatedInventors: Daniel Butler, Hartono Darmawaskita
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Patent number: 7637816Abstract: A gaming control board having low-power circuitry and high-power circuitry for controlling the operation of a gaming machine. The low-power circuitry includes logic components including a CPU that executes instructions for randomly selecting a plurality of game outcomes in response to wagers inputted by a player. The high-power circuitry includes high-power components such as lamp drivers for interfacing high-power signals between the gaming control board and a game interface board. Two connectors are provided on the gaming control board, one to interface low-power signals and another to interface high-power signals. The high-power circuitry is located near the connector interfacing the high-power signals for optimal EMI suppression.Type: GrantFiled: April 5, 2002Date of Patent: December 29, 2009Assignee: WMS Gaming Inc.Inventors: Stephen A. Canterbury, Timothy C. Loose, Victor Mercado, Mark V. Page
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Publication number: 20090319713Abstract: An expansion card for an external storage device includes a circuit board, and an input power jack, an output power jack, a voltage transforming unit, an input data transmission interface and an output data transmission interface are located on the circuit board. The circuit board includes a plate-like mounting portion which fits into a bus slot of a motherboard such that the expansion card is positioned but not electrically connected to a motherboard bus. During operation, the expansion card receives power from a power supply via the input power jack, transforms the power via the voltage transforming unit, and transmits the power to the external storage device via the output power jack. In addition, the expansion card receives data from a storage device data transmission interface of the motherboard via an input data transmission interface, and transmits the data to the external storage device via an output data transmission interface.Type: ApplicationFiled: June 24, 2008Publication date: December 24, 2009Inventor: Kwok-Yan LEUNG
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Patent number: 7636867Abstract: A serial-transmission type memory system with a hot swapping function is provided which is capable of replacing a defective memory module without stopping the system. One end of a row of memory modules is connected to one input-output section of a memory controller and the memory controller exerts control so that, when a failure occurs in any of the memory modules, by disconnecting the defective memory module from the memory module in its preceding stage and by sequentially connecting the memory module in the row of the memory modules in a next and onward stage and a spare memory module connected to another end of the row of the memory modules to the other input-output section of the memory controller in series through second read and write signal lines to gain access to each of the memory modules.Type: GrantFiled: March 24, 2006Date of Patent: December 22, 2009Assignee: NEC CorporationInventor: Takashi Abe
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Publication number: 20090313390Abstract: An expansion card is provided that allows resources allocated to the expansion card to be shared with a different card. The expansion card comprises a coupling device that couples the expansion card to a data processing system. The expansion card also includes an identifier data structure that when queried by the data processing system, identifies the expansion card as a resource sharing expansion card. The data processing system reallocates one or more resources allocated to the expansion card to a different card coupled to the data processing system.Type: ApplicationFiled: June 11, 2008Publication date: December 17, 2009Applicant: International Business Machines CorporationInventors: Manish Ahuja, Joel H. Schopp, Michael T. Strosaker
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Patent number: 7634667Abstract: A power management system for use in a power-consuming system is disclosed. The system comprises one or more power module bays each adapted to have a power module hot-pluggably installed therein, the power module comprising an uninterruptible power supply (UPS) power module and a power supply unit (PSU) power module each adapted to be installed in the one or more power module bays; and a power module interface that connects power signals generated by installed power modules with one or more power buses in the system.Type: GrantFiled: July 12, 2002Date of Patent: December 15, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jeffrey S. Weaver, Samuel M. Babb
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Patent number: 7631134Abstract: This invention is to provide a half-sized PCI CPU card and a computer device having the capability of PCIe expansion, wherein the half-sized PCI CPU card comprises a PCI golden finger and a PCIe golden finger aligned at an edge of the half-sized PCI CPU card so that the half-sized PCI CPU card may be inserted by means of the golden fingers into corresponding PCI and PCIe slots provided on a backplane of the computer device, enabling the half-sized PCI CPU card to utilize the hot pull-plug and high transmission properties of the PCIe bus and communicate with a PCIe bus compatible peripheral inserted into the back plane.Type: GrantFiled: October 30, 2006Date of Patent: December 8, 2009Assignee: IEI Technology Corp.Inventor: Ling-Feng Jian
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Publication number: 20090300253Abstract: The invention relates to a changeable central processing unit (CPU) module apparatus for a computer, comprising a system control module board, a CPU module board and a heat-dissipating device. A second bus connector of the CPU module board is a golden finger plug extending from the CPU module board and is installed on a socket plug of a first bus connector of the system control module board. With the invention, a user can reduce the cost of updating the CPU and increase the period of using a peripheral equipment of the computer.Type: ApplicationFiled: September 16, 2008Publication date: December 3, 2009Applicant: First International Computer, Inc.Inventors: Jung-Lung Lien, Tun-Ming Lee, Yueh-Yun Chen
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Publication number: 20090300252Abstract: A monitor for a host computer includes a display circuit, a peripheral equipment interface, a power circuit, and a monitor video interface. The display circuit is capable of controlling display of the monitor. The peripheral equipment interface is disposed on a frame of the monitor. The peripheral equipment interface includes a plurality of signal pins. The power circuit is capable of providing power to the display circuit and the peripheral equipment interface. The monitor video interface mates with a video interface of a motherboard of the host computer. The monitor video interface includes a plurality of video pins and idle pins. The video pins are connected to the display circuit. The idle pins are connected to the idle pins of the motherboard video interface. The idle pins of the motherboard video interface are connected to a chip of the motherboard.Type: ApplicationFiled: August 14, 2008Publication date: December 3, 2009Applicants: HONG FU JIN PRECISION INDUSTRY (SHENZHEN) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: YI-HONG LIU, YUN-SHAN XIAO
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Publication number: 20090282180Abstract: A plug-and-play hard disk read/write drive includes a body, a control circuit board, and a connecting interface unit. The body has hard disk insertion slots and a power supply unit. The control circuit board is arranged in the body and is electrically connected with the connecting interface. The connecting interface unit has hard disk adapting interfaces corresponding to the hard disk insertion slots. The hard disk adapting interface has a first connecting end and a second connecting end. The hard disk is accommodated in the hard disk insertion slot, and is connected to the hard disk adapting interface. The power supply unit is electrically connected on the control circuit board for controlling a power switch of the connecting interface unit. The present invention allows the hard disks of different specifications to be accommodated in the hard disk read/write drive for transmitting and accessing data via the hard disk adapting interface.Type: ApplicationFiled: May 6, 2008Publication date: November 12, 2009Inventor: Ricky Kuan
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Patent number: 7617341Abstract: Plural information handling systems interface through a KVM switch with a DVI display with the KVM switch supporting selection of the information handling system providing display information to the display. A hotswap switch initiates a hotswap signal to the information handling system that is selected to provide display information to the display. Receipt of the hotswap signal at the information handling system results in the driver of the selected information handling system redetecting the display with a communication through the DDC channel and transfer of EDID information from the display to the selected information handling system so that the selected information handling system drives a desired display port, such as by sending display information through a TDMS channel instead of default VGA channel.Type: GrantFiled: November 10, 2003Date of Patent: November 10, 2009Assignee: Dell Products L.P.Inventors: David L. McClintock, Todd W. Schlottman
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Publication number: 20090276555Abstract: An apparatus for controlling a hot plug bus slot on a bus has an input for receiving a set of float signals (i.e., the set may have one or more float signals), and a driver having an output electrically couplable with the bus. The apparatus also has float logic operatively coupled with the input. The float logic is responsive to the set of float signals to cause the output to float at a high impedance in response to receipt of the set of float signals.Type: ApplicationFiled: May 11, 2009Publication date: November 5, 2009Applicant: Silicon Graphics, Inc.Inventors: Bruce A. Strangfeld, Thomas E. McGee
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Publication number: 20090271552Abstract: A computer, such as a portable computer, can include a removable interface module. The module can contain a device having a computer interface. The device can be a radio or a fiber optic communications device, for example. The use of such a module can facilitate repair and reconfiguration of the portable computer in the field. Such computers can be used by military personnel, police, emergency medical personnel, fire fighters, and the like.Type: ApplicationFiled: April 10, 2009Publication date: October 29, 2009Inventor: Magnus PYK
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Patent number: 7610447Abstract: Described herein is a point-to-point memory communications architecture, having a point-to-point signal line set associated with each of a plurality of connectors or module positions. When the system is fully populated, there is a one-to-one correspondence between signal line sets and memory modules. In systems that are not fully populated, the system is configurable to use a plurality of the signal line sets for a single memory module.Type: GrantFiled: February 28, 2001Date of Patent: October 27, 2009Assignee: Rambus Inc.Inventors: Richard E. Perego, Frederick A. Ware, Ely K. Tsern, Craig E. Hampel
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Patent number: 7610429Abstract: A method for determining the criticality of a device in a multi-path computer configuration comprising the steps of: traversing a directed acyclic graph representing a platform hierarchy; and determining paths within the directed acyclic graph affected by the removal of the device. A computer system comprising a directed acyclic graph data structure representing a platform hierarchy; and a control arrangement for traversing the directed acyclic graph to determining paths therein affected by removal of a device.Type: GrantFiled: January 30, 2007Date of Patent: October 27, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kishore Kumar Muppirala, Santosh Rao, Harish S. Babu, Ashok Rajagopalan
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Patent number: 7606964Abstract: A virtual universal serial bus (USB) flash memory storage device with a peripheral component interconnect (PCI) Express interface including a microcontroller connected separately to a flash memory and a PCI Express connecting interface, and the microcontroller has a flash memory interface, a PCI Express interface and a virtual USB module and the virtual USB module includes a USB host and a USB device. If a host gives a USB instruction for saving or reading to the storage device, the USB instruction will be sent to and executed by the virtual USB module and the required data processing for saving or reading will be completed through the flash memory interface and the flash memory. The data in the storage device can be transmitted with a PCI Express standard transmission rate, and the host considers the storage device as a USB device instead of a pure PCI Express device.Type: GrantFiled: May 11, 2007Date of Patent: October 20, 2009Assignee: Phison Electronics Corp.Inventors: Kian-Leng Lee, Wee-Kuan Gan
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Publication number: 20090259788Abstract: A motherboard having a time calculating device is provided. The motherboard includes a central processing unit, a chipset and a micro controller. The chipset is connected to the central processing unit. The micro controller includes a time counter and a non-volatile storage unit storing therein a first value. The time counter starts to count time when the operating state of the motherboard detected by the micro controller is switched from a power-off state to a power-on state. The time counter stops counting time and defines the counting value as a second value when the operating state of the motherboard detected by the micro controller is switched from the power-on state to the power-off state. The micro controller updates the first value by adding the first value and the second value and stores the updated first value to the non-volatile storage unit.Type: ApplicationFiled: March 9, 2009Publication date: October 15, 2009Applicant: ASUSTeK COMPUTER INC.Inventors: Yu-Chen Lee, Chien-Shien Lin, Chao-Chung Wu
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Publication number: 20090249057Abstract: The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.Type: ApplicationFiled: April 3, 2009Publication date: October 1, 2009Inventors: David M. Lerner, Dave Matheny, Douglas D. Boom
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Publication number: 20090248938Abstract: A method and apparatus are provided for conveying low level signals from a first circuit card to a second circuit card. The low level signals are encoded using a simple integer value N, and the low level signals are then communicated to the second circuit card as a sequence of N alternating values. A binary counter is used to generate the sequence of alternating values using the output of a single pin of the counter, although a second pin may be used to generate a clock signal. The invention allows all low level signals to be communicated in a robust yet simple way, minimizing the chance of spurious signals being generated upon hot insertion or extraction without complicated ad hoc solutions.Type: ApplicationFiled: April 1, 2008Publication date: October 1, 2009Applicant: ALCATEL LUCENTInventors: Michel Patoine, Simon Creasy
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Publication number: 20090240854Abstract: Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system.Type: ApplicationFiled: June 3, 2009Publication date: September 24, 2009Inventors: Yoram Cedar, Michael Holtzman, Yosi Pinto
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Patent number: 7590786Abstract: A server system includes at least one server, a signal processing unit that enables to operate said at least one server with a set of console, and a chassis having slots and a circuit board, said at least one server or the signal processing unit being attachable and detachable to any of the slots, the circuit board having interconnection lines connecting the slots. Said at least one server and the signal processing unit being connected via an interface that allows plug and play connectivity. Thus, it is possible to construct the server system without external cables. In addition, when a server is newly added to or removed from the system or, it is no longer necessary to power of the other servers. This makes it possible to facilitate system construction and management.Type: GrantFiled: November 12, 2004Date of Patent: September 15, 2009Assignee: Fujitsu Component LimitedInventors: Fujio Seki, Heiichi Sugino, Takeshi Kasai
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Patent number: 7587717Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.Type: GrantFiled: November 13, 2006Date of Patent: September 8, 2009Assignee: Intel CorporationInventors: John I. Garney, Robert J. Royer, Jr.
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APPARATUS FOR AUTOMATICALLY REGULATING SYSTEM ID OF MOTHERBOARD OF SERVER AND SERVER HAVING THE SAME
Publication number: 20090222609Abstract: An apparatus for automatically regulating a system ID of a motherboard of a server and a server having the same are provided. Under a condition that when a rack server is applied to different server systems, the rack server requires different riser cards, while a tower server does not require any riser card, whenever a corresponding riser card or a device card is inserted into the slot of the motherboard of the server, the present invention can automatically regulate a system ID of a motherboard of a server by designing the motherboard of the server compatible with a plurality of server systems as retained at a same status, i.e., retaining the any status configured on the motherboard unchanged.Type: ApplicationFiled: March 20, 2008Publication date: September 3, 2009Applicant: INVENTEC CORPORATIONInventors: Hai-Yi Ji, Shih-Hao Liu -
Patent number: 7576559Abstract: A universal serial bus (USB) device is comprised of a receiver for receiving signals from a USB host through data lines, and a pull-up resistor circuit connecting pull-up resistors to data lines in response to control signals. The pull-up resistor circuit selectively connects a plurality of pull-up resistors with a data line in response to control signals. The pull-up resistor circuit controls a number of the plurality of pull-up resistors connected with the data line to cause a voltage level of the signal to be lower than a threshold voltage when the USB host resets the USB device.Type: GrantFiled: November 9, 2006Date of Patent: August 18, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Yoon-Beom Song, Choong-Bin Lim, Sang-Jun Mun
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Patent number: 7577789Abstract: Described are systems that employ configurable on-die termination elements that allow users to select from two or more termination topologies. One topology is programmable to support rail-to-rail or half-supply termination. Another topology selectively includes fixed or variable filter elements, thereby allowing the termination characteristics to be tuned for different levels of speed performance and power consumption. Termination voltages and impedances might also be adjusted.Type: GrantFiled: March 24, 2006Date of Patent: August 18, 2009Assignee: Rambus Inc.Inventors: Richard E. Perego, Frederick A. Ware, Ely K. Tsern, Craig E. Hampel
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Publication number: 20090198853Abstract: Alignment posts that aid alignment of a peripheral slice to couple to the bottom surface of an information handling system also interface with a release so that actuation of the release translates to movement of the alignment posts relative to the peripheral slice so that the information handling system slides relative to the peripheral slice. Sliding of the peripheral slice relative to the information handling system releases attachment devices, such as hooks of the peripheral device that couple to attachment points of the information handling system so that the peripheral device decouples from the information handling system.Type: ApplicationFiled: February 1, 2008Publication date: August 6, 2009Inventors: Eduardo Escamilla, Philip Seibert
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Publication number: 20090199283Abstract: The present disclosure is directed to a system and method for wirelessly receiving broadcast signals using intelligent cards. In some implementations, a service card includes a physical interface, a communication module, memory, and a service module. The physical interface connects to a port of a mobile host device. The mobile host device includes a Graphical User Interface (GUI). The communication module wirelessly receives broadcast signals encoding content. The memory stores user information used to decrypt the encoded content independent of the mobile host device. The stored information is associated with a content provider. The service module decrypts the encoded content in response to at least an event and presents the content through the GUI of the mobile host device.Type: ApplicationFiled: September 12, 2008Publication date: August 6, 2009Applicant: DEVICEFIDELITY, INC.Inventor: Deepak Jain
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Patent number: 7571274Abstract: A process and system for virtually managing enclosures. A process determines whether a system includes an enclosure processor, a virtual enclosure processor, or both an enclosure processor and a virtual enclosure processor. The process receives a command by a virtual enclosure processor if it is determined that the system includes the virtual enclosure processor. The virtual enclosure processor manages a peripheral in an enclosure. Additionally, a process activates a virtual enclosure processor in a system including a real enclosure processor. The virtual enclosure processor receives a command. The virtual enclosure processor controls a peripheral.Type: GrantFiled: December 30, 2004Date of Patent: August 4, 2009Assignee: Intel CorporationInventors: Michele M. Clayton, Dave A. Draggon, Jeffrey D. Skirvin, Brian W. Skerry, Jonathan G. Wootten
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Patent number: 7565456Abstract: A method for configuring or reconfiguring an automation device and an automation device suitable for a configuration or a reconfiguration are provided. The automation device has a programmable controller (14) with a CPU unit (14a) and decentralized peripheral devices (16, 17, 18). In this method and automation device, newly supplied configuration data can be evaluated for changes in the hardware configuration and can be integrated during a configuration or a reconfiguration interval (21) without the automation device having to switch to a STOP mode. As a result, it is not necessary for centralized and/or decentralized peripheral modules to adopt a controlled (safe) state, which means that control can be resumed immediately after the reconfiguration.Type: GrantFiled: October 12, 2004Date of Patent: July 21, 2009Assignee: Siemens AktiengesellschaftInventors: Peter Becker, Albert Renschler
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Patent number: 7565473Abstract: In a semiconductor integrated circuit, a detection confirmation circuit sets the logical level of a second signal according to the logical level of a first signal observed after a lapse of a predetermined time since detection of insertion/removal of a cable for peripheral equipment. The semiconductor integrated circuit operates in a standby mode in which only the insertion/removal detection circuit operates if no cable for peripheral equipment is connected, in a repeater mode in which only PHY operates if a cable for peripheral equipment is connected and CPU is in the suspended state, and in a normal mode in which both PHY and LINK operate if a cable for peripheral equipment is connected and a CPU is in the operating state.Type: GrantFiled: April 14, 2006Date of Patent: July 21, 2009Assignee: Panasonic CorporationInventors: Yoshihiro Tabira, Satoshi Takahashi
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Patent number: 7562161Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features.Type: GrantFiled: March 14, 2005Date of Patent: July 14, 2009Assignee: Microsoft CorporationInventor: Maciej Maciesowicz
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Publication number: 20090172236Abstract: A method and system for flexibly supplying power to a high-end graphics card is described. The graphics system includes the high-end graphics card and also a configurable power supply module, which is physically separated to the graphics card and connected to a power source external to the graphics system. The configurable power supply module converts a first voltage from the power source to a second voltage for the graphics card, wherein the second voltage satisfies a set of power supply specifications required by the graphics card.Type: ApplicationFiled: January 21, 2008Publication date: July 2, 2009Inventor: Mike SUN
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Publication number: 20090172235Abstract: A MegaSIM adapter is disclosed allowing a MegaSIM card to be used in a standard card slot, such as an SD or MicroSD card slot, of a host device.Type: ApplicationFiled: December 27, 2007Publication date: July 2, 2009Inventors: Mei Yan, Robert C. Chang, Patricia Ann Dwyer, Po Yuan, Bahman Qawami, Farshid Sabet-Sharghi, Fabrice J. Jogand-Coulomb, Matthijs C. Hutten
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Patent number: 7555665Abstract: A power module includes a plurality of converters having outputs for coupling to a supply voltage. The power module further includes a connector having a pin to provide a signal indicative of whether the power module is being disconnected from a system. A controller is responsive to the signal indicating that the power module is being disconnected by sequentially deasserting enable signals to the converters to disable the converters in a sequential order.Type: GrantFiled: December 29, 2004Date of Patent: June 30, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Steve A. Belson, Paul A. Wirtzberger, Terrel L. Morris
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Publication number: 20090164686Abstract: A memory controller for a memory card such as an SD card with an additional host interface such as a USB interface comprises a duplicate SD interface. Embodiments with two SD interfaces may also comprise a card reader controller chip that can be turned off by the memory controller when the USB interface is not needed. Incorporation of the additional SD interface in the controller allows for an economical or off the shelf card reader controller to be employed.Type: ApplicationFiled: December 21, 2007Publication date: June 25, 2009Inventors: Steven Theodore Sprouse, Ka Ian Yung
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Publication number: 20090164687Abstract: A motherboard device includes a first connecting interface coupled to a first graphics card, a second connecting interface coupled to a second graphics card, a power source connected electrically to the first connecting interface for supplying electric power to the first graphics card via the first connecting interface, and a switch unit interconnecting electrically the power source and the second connecting interface, and operable so as to switch between an ON-state, where the power source supplies electric power to the second graphics card via the second connecting interface, and an OFF-state, where the electric power from the power source is not supplied to the second graphics card.Type: ApplicationFiled: June 4, 2008Publication date: June 25, 2009Inventor: Wen-Jie Zhu
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Patent number: 7552262Abstract: A standalone router is integrated into a multi-chassis router. Integrating the standalone router into a multi-chassis router requires replacing switch cards in the standalone router with multi-chassis switch cards. The multi-chassis switch cards forward packets to a central switch card chassis for routing within the multi-chassis router. By incrementally replacing standalone switch cards with multi-chassis switch cards in the standalone router, packet forwarding performance is maintained during the integration.Type: GrantFiled: August 31, 2005Date of Patent: June 23, 2009Assignee: Juniper Networks, Inc.Inventors: Steve W. Turner, Sriram Raghunathan, Jeffrey M. DiNapoli, Umesh Krishnaswamy, Anurag P. Gupta
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Patent number: 7552263Abstract: Embodiments of a method and apparatus for controlling a personal computer are provided that can stably engage and disengage a bay device to a single IDE channel coupled to a main memory. An embodiment of a portable computer can include an integrated drive electronic (IDE) controller supporting a single IDE channel, a main memory and a bay device connected to the IDE channel, and a control device that can set the IDE channel in a tri-state and reset (e.g., restore) the connection to the IDE channel as the bay device is attached to and detached from a bay.Type: GrantFiled: October 31, 2005Date of Patent: June 23, 2009Assignee: LG Electronics Inc.Inventor: Joo Cheol Lee
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Patent number: 7552244Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features.Type: GrantFiled: August 13, 2007Date of Patent: June 23, 2009Assignee: Microsoft CorporationInventor: Maciej Maciesowicz
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Patent number: 7549006Abstract: A structure of object stacks for driver with hot plug function is provided, wherein the hot plug function is with serial ATA device, which can be supported by standard IDE driver. The structure comprises a bus device stack, at least one port device stack and at least one serial ATA device stack, which are connected to serial ATA devices at each of channels of the bus and each of channels within the bus respectively, wherein each of bus device stacks comprises an upper-level filter bus device object, and each of port device stacks comprises respectively a lower-level filter port device object and an upper-level filter port device object. Thus, the hot plug function can be supported according to the massage transmission interface and status monitoring for the bus by each of filter device objects.Type: GrantFiled: March 14, 2007Date of Patent: June 16, 2009Assignee: Via Technologies, Inc.Inventor: Chih Hao Liu
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Publication number: 20090150589Abstract: Output control section detects, when the hot-plug line is conducted to the source device's hot-plug line, the data communication line is conducted to the source device's data communication line, and the power supply voltage line is not conducted to the source device's power supply voltage line, that a voltage is not supplied from the source device's power supply voltage line to the power supply voltage line and a voltage is supplied from the source device's data communication line to the data communication line, and thus bringing the switching section into an open state, whereby the voltage supplied from the source device's data communication line to the data communication line is inhibited from being supplied from the hot-plug line to the source device's hot-plug line; and detecting, when the hot-plug line is conducted to the source device's hot-plug line, the data communication line is conducted to the source device's data communication line, and the power supply voltage line is conducted to the source deviType: ApplicationFiled: October 15, 2008Publication date: June 11, 2009Inventors: Chikara WATARAI, Yiran Sun
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Publication number: 20090144477Abstract: A method and apparatus for adding or removing a logical unit of a mass storage device connected to a host computer through a universal serial bus (USB) interface are provided. The method may comprise: dynamically managing a logical unit table associated with the logical unit; generating a corresponding hot plug and play (PnP) event in the mass storage device; and informing the host computer of the hot PnP event. The mass storage device may comprise: a logical unit managing apparatus; a hot PnP event generating apparatus; and an informing apparatus for informing a host computer of the hot PnP event through a USB.Type: ApplicationFiled: November 13, 2008Publication date: June 4, 2009Applicant: International Business Machines CorporationInventors: Wei Chen, Xian Dong Meng, Long Wen Lan, Jane Xu
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Publication number: 20090144476Abstract: Machine-readable medium, processes and systems for adding and/or removing components from a running computing device based upon a static topology table and a dynamic topology table are disclosed.Type: ApplicationFiled: December 4, 2007Publication date: June 4, 2009Inventors: Xiaohua Cai, Yufu Li, Murugasamy Nachimuthu
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Patent number: 7539808Abstract: An information processing apparatus includes a port that connects a peripheral apparatus to the information processing apparatus through a USB, a first switch that interrupts supply of a power to the peripheral apparatus through the port under an OS control, a second switch that interrupts the supply of the power to the peripheral apparatus when the first switch operates to supply the power thereto, and a control unit that monitors whether a failure occurs to a connection between the information processing apparatus and the peripheral apparatus through the port and that controls an operation of the second switch based on a monitoring result independently of the OS control. The control unit switches the second switch so as to reset the connection when detecting that the failure occurs to the connection.Type: GrantFiled: April 26, 2006Date of Patent: May 26, 2009Assignee: NEC Infrontia CorporationInventor: Hiroshi Kojima
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Patent number: 7533208Abstract: An apparatus for controlling a hot plug bus slot on a bus has an input for receiving a set of float signals (i.e., the set may have one or more float signals), and a driver having an output electrically couplable with the bus. The apparatus also has float logic operatively coupled with the input. The float logic is responsive to the set of float signals to cause the output to float at a high impedance in response to receipt of the set of float signals.Type: GrantFiled: September 26, 2005Date of Patent: May 12, 2009Assignee: Silicon Graphics, Inc.Inventors: Bruce A. Strangfeld, Thomas E. McGee
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Publication number: 20090106471Abstract: An apparatus and method for enumeration of processors during hot-plug of a compute node are described. The method includes the enumeration, in response to a hot-plug reset, of one or more processors. The enumeration is provided to a system architecture operating system in which a compute node is hot-plugged. Once enumeration is complete, the compute node is started in response to an operating system activation request. Accordingly, once device enumeration, as well as resource enumeration are complete, the one or more processors of the processor memory node are activated, such that the operating system may begin utilizing the processors of the hot-plugged compute node.Type: ApplicationFiled: November 14, 2008Publication date: April 23, 2009Inventors: Shivnandan D. Kaushik, James B. Crossland, Mohan J. Kumar, Linda J. Rankin, David J. O'Shea