Abstract: According to an embodiment of the invention, a method and apparatus for support of a non-standard device containing operating system data are described. According to one embodiment, a circuit comprises a first device that is not compliant with a PCI (peripheral component interconnect) standard, the first device containing operating system data, where the operating system data is not bootable for any non-standard device; a second device that is compliant with the PCI standard, the second device being associated with the operating system data, the association of the second device with the operating system data from the first device enabling the operating system data from the first device to be booted according to the PCI standard; and a memory to receive the operating system data from the first device.

Abstract: A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).

Abstract: A computer comprises a mother board. A CPU, a chipset and a flash memory storage device are configured on the mother board. Wherein, the chipset is coupled to the CPU and coupled to the flash memory storage device through a USB bus, so that the CPU is able to access data stored on the flash memory storage device through the chipset.

Abstract: One embodiment of the present invention is a process tool optimization system that includes: (a) a data mining engine that analyzes end-of-line yield data to identify one or more process tools associated with low yield; and (b) in response to output from the analysis, analyzes process tool data from the one or more process tools to identify one or more process tool parameters associated with the low yield.

Abstract: Methods and structures within a SAS expander for initiating communication with one or more SAS initiators in a SAS domain to inform the initiators of sensed changes in the domain without the need for a full SAS Discovery process. In one aspect hereof, the expander may transmit a vendor unique BROADCAST primitive to inform SAS initiators that they should initiate a vendor unique SMP or SSP exchange with the expander to determine changes to the SAS domain. In another aspect hereof, the SAS initiator may respond as an SMP or SSP target device in response to initiation of vendor unique SMP or SSP exchanges by the expander. The expander may report to initiators regarding sensed changes in the domain and/or statistics regarding operation of the expander or other elements of the domain.

Abstract: An information handling system card (IHS card) includes a base having a first end. A first card connector is located on the first end and is operable to electrically couple to a first information handling system connector (IHS connector) located on an information handling system (IHS), wherein the first IHS connector is operable to electrically couple an IHS card compliant to the ExpressCard™ Standard to the IHS. A second card connector is located on the first end and adjacent to the first card connector, wherein the second card connector is operable to electrically couple to a second IHS connector located on the IHS. The IHS card may be coupled to an IHS in order to provide greater functionality to the IHS than that provided by a conventional ExpressCard™.

Abstract: A PC card control apparatus includes a PC card connector, a card detector and an interconnection switching circuit. The PC card connector is configured to provide connections for connecting one of a first PC card compliant with specific card standards and a card-adapting card for connecting a second PC card compliant with a different card standard to the PC card control apparatus. The card detector is configured to detect connection of the card-adapting card to the PC card control apparatus and to subsequently output a detection signal. The interconnection switching circuit is configured to switch the connections of the PC card connector to connect the PC card connector to a bus interface dedicated to the second card upon receiving the detection signal from the card detector.

Abstract: A method and apparatus for a hot swappable media interface card capable of layer-1 processing is described. The media interface card transmits and receives physical layer network traffic with a main board. The main board performs media access control layer transformation.

Abstract: In some embodiments, a method, apparatus and system to generate an interrupt by monitoring an external interface are presented. In this regard, an interrupt agent is introduced to communicate over a serial interface with an input/output (I/O) extender and to save a relevant status of the I/O extender in a memory. Other embodiments are also disclosed and claimed.

Abstract: A PC Card subsystem is used for coupling a PC card to a computer system and comprises a PC Card controller and a PC Card power switch. The PC Card controller is coupled to and operates the PC card. The PC Card power switch is used for supplying power to the PC Card and provides at least one control signal for operating the PC card.

Abstract: An inlayed flash memory module suitable for being directly welded or inlayed on a printed circuit board via a pad interface connection is disclosed. The flash memory module comprises a flash memory and a circuit board. The flash memory has at least one or a plurality of blocks for storing data. The circuit board comprises a flash memory controller and a plurality of interface connecting points. The flash memory controller is adopted for interacting with a host and controlling the blocks in the flash memory, and the interface connecting points are directly welded or inlayed on the circuit board. Thus, the need of a connector for memory card can be eliminated.

Abstract: In a variable field device for use in automation systems, which has a microprocessor for running a control program, and a serial fieldbus interface for communicating with a fieldbus, a parallel communication interface CI is provided as an additional interface, in the form of a standard insertion bay for different interface modules.

Abstract: A processing system optimized for data string manipulations includes data string execution circuitry associated with a bus interface unit or memory controller. Cache coherency is maintained, and data move and compare operations may be performed efficiently on cached data. A barrel shifter for realignment of cached data during move operations and comparators for comparing a test data string to cached data a cache line at a time may be provided.

Abstract: An enhanced power switch device is provided for enabling modular USB PC cards. The enhanced power switch may include a card sense circuit for sensing the type of card present, a card power switching circuit for supplying power to a modular USB card, and isolation circuit for isolating conventional PC Card control signals from the modular USB card and a connection circuit for connecting USB signals to the USB Card. The system of the present invention can modified for other bus technologies, in addition to USB bus devices.

Abstract: Integrated circuits such as programmable logic devices are provided with hotsocket detection circuitry. The hotsocket detection circuitry monitors signals on data pins and power supply voltages. If the data pins become active before the power supply voltages have reached appropriate levels, a hotsocket condition is identified. When a hotsocket condition is identified, driver circuitry on the integrated circuit can be disabled by a hotsocket signal. Conductive paths may be used to share hotsocket detectors among multiple blocks of input-output circuitry.

Abstract: A PC card control apparatus includes a PC card connector, a card detector and an interconnection switching circuit. The PC card connector is configured to provide connections for connecting one of a first PC card compliant with specific card standards and a card-adapting card for connecting a second PC card compliant with a different card standard to the PC card control apparatus. The card detector is configured to detect connection of the card-adapting card to the PC card control apparatus and to subsequently output a detection signal. The interconnection switching circuit is configured to switch the connections of the PC card connector to connect the PC card connector to a bus interface dedicated to the second card upon receiving the detection signal from the card detector.

Abstract: A tape storage emulator has a disk storage, a tape storage, a server interface, a data path control, a virtual tape management and a personality logic. The server interface is in communications with a server so as to receive and transmit tape storage commands and tape formatted data compatible with the tape storage. The data path control is in communications with the server interface and the disk storage so as to transfer the tape formatted data between the disk storage and the server interface. The virtual tape management is in communication with the disk storage so as to store the tape formatted data on the disk storage. The personality logic is at least temporarily in communications with the tape storage so as to capture and store tape storage responses. The stored tape storage responses allow the virtual tape management to emulate the tape storage to the server using the disk storage.

Abstract: Devices, systems and methods for providing a connector system are disclosed. The exemplary device may have system and device flow contacts on the system and device connectors, respectively. A first set contacts and a second set of contacts may be electrically connected to each other to verify that system and device contacts are properly mated to each other. A controller linked to a contact circuit may regulate the power and/or signals provided to an end device.

Abstract: A method for determining connection of an external device to a mobile communication terminal is provided. The method comprises detecting connection of an external device to a mobile communication terminal based on a signal generated by a first operation module of the mobile communication terminal; activating a connection interrupt routine, in response to the signal generated by the first operation module; controlling an active status of a second operation module by way of the first operation module to switch system operations from a first clock speed to a second clock speed; and establishing a signal transfer path between the mobile communication terminal and the external device.

Abstract: Embodiments of the present invention pertain to methods and systems are described for switching root cells for a computer system without requiring the computer system to be re-booted. In one embodiment, objects are used to represent fixed registers associated with a first cell and a second cell of the computer system. In response to detecting that the second cell should be used instead of the first cell as a root cell for the computer system, the objects are used to communicate information between firmware and an operating system associated with the computer system, wherein the information describes the fixed registers associated with the second cell.

Abstract: A method of connecting a storage device to a host computer has a first connection processing for enabling a host interface in advance even when the storage device is not ready yet, and a second connection processing for enabling the host interface after the storage device is ready. The first connection processing is carried out when a power supply to the storage device is turned on, and the second connection processing is carried out when the storage device is at a hot plug time.

Abstract: The present invention is carried out to provide a system controller, a control system and a system control method which are inexpensive, highly stable, capable of storing all information and past record at a time when one of the devices is down and capable of switching the devices without any time lag. The system controller comprises a bus arbiter and a non-volatile memory and has only periodically executed functions and passive functions. The system includes a bus employing a center arbitration method, from which devices can be detached from and to which the detached devices can be attached again as power being supplied. Even if one of the devices is down, processes can be immediately continued by switching from the down device to other device by utilizing the system controller and the bus.

Abstract: A computer system for receiving standard and expanded computer devices includes a chassis, a midplane, and an interposer. The chassis includes bays, each adapted to receive the standard computer device. The midplane includes connectors respectively aligned with the plurality of bays that connect the midplane to a standard computer device disposed within a bay. The standard and expanded computer devices are passed through the interposer, which includes a body defining slots respectively aligned with the bays. Each slot is sized to enable the standard computer device to pass through the slot. The slots includes first and second sets of adjacent slots. The interposer is configured to allow the expanded computer device to simultaneously pass through all slots of the first set of adjacent slots and prevent the expanded computer device, while positioned within the second set of adjacent slots, from fixedly engaging the chassis.

Abstract: For distributing available power between a plurality of cards hot pluggable into chassis slots, a power policy, which defines rules and conditions for assuredly distributing the available power to selected ones of the plurality of cards, is configured. The selected ones, each of which is assured to receive power when hot plugged, are selectable to include any card of the plurality of cards. When any one of the plurality of cards is hot plugged into one of the slots, the power policy is triggered to assuredly distribute the available power to the selected ones that are hot plugged, or activate an alarm if the any one card that is hot plugged is excluded from the selected ones. The power policy is modifiable in response to a change in the rules and conditions.

Abstract: An apparatus for linking a hot-plug device to a host includes a slave interface circuit for connection to the host; a master interface circuit for connection to the hot-plug device; and direction, data, and clock lines that link the master and slave interface circuits. A control logic circuit detects a Presence Detect signal on the direction line. A method of determining a connection between a host and a hot-plug device includes asserting a direction signal on a direction line to control a direction of a flow of data between the host and the hot-plug device; toggling the direction signal to indicate a presence of the hot-plug device; and indicating a disconnect after a given period of inactivity in the toggling. A method of linking a host and a hot-plug device interface circuit for connection to a hot-plug device includes asserting a Presence Detect signal on the direction line.

Abstract: Described is a device comprising a power supply, a receiving arrangement, a removable cover and a sensor. The receiving arrangement detachably receives a peripheral device. The peripheral device draws power from the power supply when coupled to the receiving arrangement. The removable cover covers the receiving arrangement and prevents the peripheral device from being physically removed from the receiving arrangement. The sensor outputs a first signal when the cover covers the receiving arrangement and outputs a second signal when the cover is removed from the receiving arrangement. Communication with the peripheral device is terminated as a function of the first and second signals.

Abstract: The detector includes the plug for connecting the personal computer through a cable, battery power supply which provides a constant power supply, and the MCU which receives a specific potential from the personal computer when the later is connected.

Abstract: A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.

Abstract: Methods, apparatus, and products are disclosed for initializing expansion adapters installed in a computer system having similar expansion adapters that include detecting an expansion adapter installed in a computer system having a plurality of expansion adapters, the detected expansion adapter having an option ROM containing initialization code, identifying similar expansion adapters installed in the computer system that correspond to the detected expansion adapter, each of the identified similar expansion adapters having an option ROM containing initialization code, disabling the option ROM of each of the identified similar expansion adapters, and initializing the plurality of expansion adapters installed in the computer system without executing the initialization code of the identified similar expansion adapters.

Abstract: Methods and apparatuses for dynamic virtual frame buffer management. At least one embodiment of the present invention dynamically enables or disables the use of a virtual frame buffer, which is not under control of graphics hardware of a data processing system, without restarting the graphical user interface system (e.g., the window system) of the data processing system. For example, in response to the addition or removing of a frame buffer that is under control of a graphics controller (e.g., due to the activation or deactivation of the graphics controller, or the hot plug-in or hot disconnection of the graphics controller), the virtual frame buffer is disabled or enabled respectively.

Abstract: An electronic device includes a casing and a board assembly. The casing defines an accommodating space, and a slot that is in spatial communication with the accommodating space. The board assembly includes a circuit board and a hot-swap port. The circuit board is mounted in the accommodating space in the casing. The hot-swap port is coupled electrically to and is mounted directly on the circuit board, extends into the slot in the casing, and is adapted to be connected electrically to a hot-swap component received in the slot in the casing.

Abstract: A dual-interface computer interface card includes a circuit board. The circuit board includes an ExpressCard connector, a USB connector, a control circuit, a converter, two USB signal traces, two DC traces. The two USB traces are electrically connected with the ExpressCard connector and the USB connector respectively. The two DC traces are electrically connected with the converter and respectively with the ExpressCard and USB connectors. The control circuit, subject to the required DC operation voltage, is optionally connected with one of the two DC traces, while another DC trace is connected with the converter to convert its DC voltage level into the DC voltage level required by the control circuit. Accordingly, the computer interface card can be connected with the computer system optionally by one of the connectors thereof for transmission of USB signals therebetween.

Abstract: According to the present invention, an input/output controller connected between an interface connection port of an information processing apparatus and a network device so as to connect the information processing apparatus and a network includes an identification number obtaining part obtaining an identification number unique to the network device, a port number obtaining part obtaining a port number from the interface connection port of the information processing apparatus, and an identification information generation part generating identification information on the network from the identification number and the port number.

Abstract: During power-on self-test (POST) the basic input-output operating system (BIOS) may set hot-add status light emitting diodes (LEDs) to appropriate colors so as to indicate which memory slot(s) is most optimal for hot-adding a hot-plug memory module. In the case where the user or administrator fails to notice or understand the meaning of the LED color representation when hot-adding the new memory module, the BIOS Service Management Initiative (SMI) handler (which controls the hot-add to the information handling system) will verify if the hot-add memory module is being installed into an optimal memory slot. If not, the BIOS may capture a Chassis System Event Log (SEL) indicating a non-optimal Hot-add and may flash a front panel LED to a certain color, e.g., amber, and may also issue an appropriate error message. Additional Advanced Configuration and Power Interface (ACPI) implementations may be used for a more user-friendly alert and/or message display.

Abstract: A method for managing multiple hot plug operations in an information handling system is provided. An instruction for initiating a new hot plug operation is received, the new hot plug operation including one or more hot plug system management interrupts (SMIs). Another hot plug operation currently ongoing at the time of receiving the instruction for initiating the first hot plug operation is identified, the ongoing hot plug operation also including one or more hot plug SMIs. In response to identifying the ongoing hot plug operation, the initiation of the new hot plug operation is restricted such that the ongoing hot plug operation may be completed. For example, hot plug SMIs not related to the ongoing hot plug operation may be disabled until the ongoing hot plug operation is completed. As another example, the new hot plug operation may be queued and performed upon the completion of the ongoing hot plug operation.

Abstract: Electrical apparatus in the form of a broadcast data receiver or set top box is provided including a housing for the location of one or more electrical components therein. The electrical components include a hard disk drive (HDD). The HDD is separated from one or more further electrical components by partition means provided in the housing.

Abstract: An enclosure for an input-output (IO) subsystem comprises: a backplane; a plurality of first slots for accepting corresponding IO option modules; a second slot for accepting an IO controller module; a plurality of first connectors corresponding to the plurality of first slots for connecting the corresponding IO option modules to the backplane; a second connector corresponding to the second slot for connecting the IO controller module to the backplane; and wherein the backplane includes communication links for interconnecting the second connector to each of the plurality of first connectors.

Abstract: One of the ground pins on a conventional floppy drive host connector is coupled to an input of a computer system and to a supply potential via a pull-up resistor. When a floppy drive is connected to the floppy drive host connector, the pin is pulled to ground by virtue of the ground connections within the floppy drive device. When a floppy drive is not connected to the floppy drive host connector, the pin remains at the supply potential. BIOS firmware or another system within the computer may detect the presence of the floppy drive by simply reading the value of the input.

Abstract: There is provided a hot-plug signal detecting apparatus capable of surely detecting change of a hot plug signal without increasing load on a transmission processing unit. A hot plug signal from a sink device is inputted to an AD input terminal of a controller, the hot plug signal is subjected to AD conversion, and a high level or low level is determined from the digital value, and thus, a hot-plug detecting circuit is not necessary, which can simplify a circuit configuration. Moreover, if a period of the low level of the hot plug signal is shorter than Tout, a period of the low level is prolonged to Tout, which allows the transmission processing unit to surely detect the low level without shortening a cycle at which the hot plug signal is detected.

Abstract: An external device such as a digital recording/reproduction device may be controlled via a digital data bus using auto-play and/or auto-pause functions. According to an exemplary embodiment, a method for controlling an external device includes detecting initiation of one of a disconnection from the external device and a connection to the external device, providing a pause command signal to the external device via a digital data bus if the initiation of the disconnection from the external device is detected, and providing a play command signal to the external device via the digital data bus if the initiation of the connection to the external device is detected.

Abstract: A method and an apparatus are used in hot swap of AC or DC line replaceable modules (40A). The apparatus according to one embodiment comprises a pin assembly (183), the pin assembly (183) being connectable to a module (40A) and connectable to a backplane (104), the pin assembly (183) resistively reducing a current associated with the module (40A) during disconnection of the module (40A) from the backplane (104), and presenting a high resistance to the module (40A) during connection of the module (40A) to the backplane (104), and a low resistance to the module (40A) at completion of the connection of the module (40A) to the backplane (104); and a hot swap detector (134) connectable to the pin assembly (183), the hot swap detector (134) detecting the disconnection of the module (40A) from the backplane (104), and detecting the connection of the module (40A) to the backplane (104). In one embodiment, the method and apparatus provide a main advantage of preventing electrical arcs and damage to mating pins (183).

Abstract: A method for controlling hot-plug behavior includes identifying a hot-plug event caused by a hot-plug device; generating hot-plug threads that execute a hot-plug operation; executing a finite state machine state sequence to regulate hot-plug threads involved in the hot-plug operation; and completing the hot-plug operation at the end of the finite state machine state sequence. A computer usable medium has computer readable program code embodied therein for causing a computer system to execute the method for controlling hot-plug behavior. A hot-plug control system for a computer system includes a hot-plug device; a set of hot-plug threads that regulate operations in the hot-plug device; and a finite state machine that controls execution of instructions using the set of threads.

Abstract: A transition module using an input/output (I/O) bus interface can be connected to a backplane having a bus connector. The transition module is provided with an external connector for receiving an input signal, an interface circuit coupled to the external connector and a processing unit for carrying out initial filtering and processing of the input signal before coupling the signal to a processor card connected to the backplane via the I/O bus interface and the bus connector.

Abstract: Apparatus, methods and computer-code are disclosed where an impending decoupling between a peripheral device and a host is detected. In some embodiments, in response to the detected impending disconnection, a user alert signal is generated. In some embodiments, an ‘onboard detector’ that is associated with housing of the peripheral device and operative to detect the impending disconnection is provided. In some embodiments, the user alert signal is generated in accordance with inter-device data flow between the host and the peripheral device. Exemplary peripheral devices include but are not limited to transient storage devices such as a USB flash drives (UFD).

Abstract: A computer system which may allow a centerplaneless design. The computer system may include various client circuit boards including processor circuit boards, memory circuit boards and switch circuit boards. The processor circuit boards may each include at least one processor, while the memory circuit boards may each include memory which is accessible by each processor. The switch circuit boards may include a plurality of detachable connectors for interconnecting each of the processor circuit boards to each of the memory circuit boards. At least one of the switch circuit boards may convey redundant memory access information. Each of the boards may be hot swappable.

Abstract: By installing a device control module (DCM), a functional component module (FCM), and a guarantee card FCM of a digital video cassette recorder (DVCR) into an integrated receiver decoder (IRD), the IRD is able to control the DVCR. The guarantee card FCM is used for accessing an electronic guarantee card stored in a non-volatile memory of the DVCR. The IRD stores purchase information or repair information of the DVCR into the non-volatile memory of the DVCR via an IEEE-1394 serial bus in response to an instruction from a requester. The IRD also reads the purchase information or the repair information from the non-volatile memory of the DVCR via the IEEE-1394 serial bus.

Abstract: A data port operates to support symmetric PCI Express-type data transfers when in a first mode of operation. When in a second mode of operation, at least a portion of the data port connections are used to support an asymmetric PCI Express-type data transfer. The asymmetric data transfer is accommodated by supporting, with respect to the asymmetric data port, partial data lanes, thereby reducing the number of data channels implemented in a direction of the lower data rate transfer.

Abstract: An electronic device, a storing means and a method for loading the user interface software of an expansion card in the electronic device. The electronic device comprises means for loading, starting and executing program modules in the electronic device. The expansion card can be coupled in a releasable manner to the electronic device. The user interface software is divided at least into a basic module and a user interface module. The loading of the user interface software is executed at least in two phases, wherein in the first phase the loading and start-up of the basic module is conducted, and in the second phase the loading and start-up of the user interface module is conducted. The second phase is conducted when the expansion card is coupled to the electronic device.

Abstract: On the basis of a period of a timing signal, a signal propagation delay in a device unit, signal propagation delay in the timing signal bus and the data bus, and a setup time of another device unit or a device connected to the data bus, a timing at which noise caused by active connection of the first device to the data bus is propagated to the other device unit or the device is computed in a step of noise propagation computing, and on the basis of the timing computed in the step of noise propagation computing, a connection timing at which the first device unit is connected to the data bus. With thes two steps, a noise caused by active connection of a device unit does not affect other device units and devices connected to the same data bus.

Abstract: A method, system, and apparatus for secure programmable addressing is provided by relocating functions within a multifunctional chip to be distributed across multiple logical partitions and maintaining security over the distribution mechanism. In one embodiment, this invention is used by a data processing system including a system processor connected to a plurality of operating system instances that are allocated individual system functions. Using logical partitioning, each operating system instance's access is limited to its own partition. Address buses to system functions are manipulated to make the functions appear at appropriate memory locations expected by the operating system instances. Accordingly, an inverter can be inserted on the address bus to change the address to a given distance in memory safe from operating system accessibility, for example, a page boundary.