Abstract: Disclosed herewith is a semiconductor processing system such as a card type electronic device, which can easily cope with an error caused by power shutoff that occurs when the card is ejected. The semiconductor processing system is provided with an interface control circuit and a processing circuit and receives operation power from an external device such as a card slot when it is inserted therein. According to a first aspect of the present invention for coping with an error caused by power shutoff that occurs when the card is ejected, the interface control circuit, when the card is ejected from the card slot, detects a potential change to occur at a first external terminal to be disconnected from a predetermined terminal of the card slot before the power supply from the card slot is shut off, then instructs the processing circuit that is active to perform an ending processing. The semiconductor processing system can end the processing by itself before the power supply stops completely.

Abstract: A design method for a bus system comprising a noise propagation computation step and a connection timing computation step. Based on the cycle of a timing signal, a signal propagation delay in a device unit, signal propagation delays in a timing-signal bus and a data bus, and a setup time in the device unit or device connected on the data bus, the noise propagation computation step computes timing at which, when the device unit is connected on the data bus being active, noise propagates to other device units other than the connected device unit or to the device connected on the data bus. Based on the timing computed in the noise propagation computation step, the connection timing computation step computes connection timing at which the device unit is connected on the data bus.

Abstract: An information handling system is disclosed that retires events upon device replacement. The system has several devices of one or more types and each device includes nonvolatile memory. A unique identifier, for devices of that type, is stored in the nonvolatile memory of each device. A first memory segment stores an event log. The event log has entries that identify system events. A second memory segment stores identifiers of devices that correspond to an entry of the event log. At least one of the corresponding devices is removable. The system detects the removal of the devices and, in response, removes any entries in the event log that correspond only to identifiers of one or more devices that have been removed.

Abstract: A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

Abstract: An apparatus for distributing power in a computer system includes a power supply device; a processing device including a CPU module and a plurality of I/O modules; and an insert line coupled between the power supply and the processing device. The insert line is connected to each of the CPU module and the plurality of I/O modules before terminating at a ground connection within the processing device. The CPU module and the plurality of I/O modules are powered by the power supply. When one of the CPU module and the plurality of I/O modules is removed from the processing device, the power supply senses that the insert line is no longer grounded, and removes power from the CPU module and the plurality of I/O modules.

Abstract: According to embodiments of the present invention, indicators on a PCI/PCI-X controlled by a Standard Hot-Plug Controller (SHPC) have non-fifty percent duty cycle blinking patterns that communicate to an operator a particular command being processed, whether the command was processed successfully, whether a “hard” or “soft” error occurred if the command was processed successfully, and whether power was applied to the slot if the command was not processed successfully.

Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features.

Abstract: One aspect of the present invention is a clock switching circuit for switching between asynchronous first clock and second clock when connecting or disconnecting an interface cable having a hot-plug function. The clock switching circuit includes a first group of flip-flops for receiving an interface disconnection signal that corresponds to disconnection and connection of the interface cable in response to the first clock, and a second group of flip-flops for receiving the interface disconnection signal in response to the second clock.

Abstract: A portable storage device 10 includes a body 12, an actuator 16, and an indicator 18. When coupled to a host device 22, a user depressing the actuator 16 causes an interrupt message to be sent to the host device, which initiates shutdown of the portable device by removing it from a host device list of available storage media, and de-powers the portable device. The indicator then changes to signify that it is safe to remove the portable device from the host. The indicator may be visual, aural, or tactile. Preferably, the indicator uniquely identifies four states regarding the status of computer instruction exchange between the portable and host devices, including normal and inactive, normal and active, error, and ready-to-be-removed states. The latter is available only after actuating the actuator. Removal of the portable device is thereby effected by a single user action at the portable device: depressing the actuator.

Abstract: Embodiments of the present invention include a method for providing protected swapping of a peripheral component in a computer system. The method comprises determining a position of a first mechanical retention latch wherein the first mechanical retention latch has an open position and a closed position and is configured to communicatively couple to a computer expansion card slot. Provided the first mechanical retention latch is in the open position, the method further includes filtering power management events and preventing the computer system from powering up. Provided the first mechanical retention latch is in the closed position, allowing the computer system to accept power management events.

Abstract: A method is provided for selectively using a PCIXCAP pin input to detect PCI/PCI-X bus mode or as DC pin input. The method provides a PCI/PCI-X device having PCIXCAP pin input, and a circuit having a plurality of voltage level detection structures and an output corresponding to each voltage level detection structure. Each output is received by a first logic to detect the PCI bus mode of a device defining a first, PCIXCAP mode for the pin input. The method ensures that one of the plurality of voltage level detection structures may be used as a DC signal logic to provide a DC output signal to a second logic. A mode of the PCIXCAP pin input is selected so as to provide the DC output signal under conditions where the PCI/PCI-X bus mode is not being detected. In an embodiment, the DC output signal is used in as a PCI Hot-Plug interface signal.

Abstract: A method and system for detecting when a receiver in a host system is present or absent to receive information from a PCI-Express device is provided. The method includes monitoring a signal received from a serial/de-serializer for transitions; re-starting a first timer when a transition is detected; and detecting a receiver's absence if a second timer has reached a maximum value after a transition is detected and a first timer cycle is incomplete. The PCI-Express device includes a receiver detection logic that determines when a receiver is absent before sending any data to the host system. The PCI-Express device may be a host adapter.

Abstract: A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for synchronizing processors during an assertion of a system management interrupt (SMI) in an information handling system including, for each processor, identifying whether the processor is an interrupt handling processor assigned to perform processing tasks necessary for resolving the SMI or a non-interrupt handling processor not assigned to perform the processing tasks necessary for resolving the SMI. The method further includes creating a task structure operable to cause non-interrupt handling processors to perform at least one task for each interrupt handling processor. The method further includes automatically performing the at least one task during the SMI for each non-interrupt handling processor.

Abstract: A method and apparatus are provided for detecting a receiver over a PCI-Express bus. A receiver is detected on a PCI-Express link by adjusting a common mode voltage using a current injected into one or more transmitter output nodes and detecting whether a receiver is present based on a voltage change rate. The current can be injected, for example, by a charge pump. In various embodiments, the charge pump can be integrated with a CML transmit buffer or an H-bridge type of transmit buffer. The amplitude control circuit can compare the adjusted common mode voltage to one or more predefined voltages and maintain the adjusted common mode voltage between two predefined voltages. The amplitude control circuit provides a signal to the charge pump to control the current injected into the transmitter output nodes. The amplitude control circuit also provides a signal to an exemplary timer that measures the voltage change rate.

Abstract: An interface for detecting connected peripheral devices. The interface comprises a jack and a control unit determining the power requirements of peripheral devices, the control unit detecting the potential of two specified nodes upon connection of the device. If power is required, the control unit supplies the power and performs related commands according to device identification received from the connection. If no power is required, the control unit measures a resistor-capacitor (RC) equivalent value inside the peripheral device, and compares the measured RC values with RC values in a database.

Abstract: The present invention relates to systems and methods for configuring a data storage system. One method adds a Fibre Channel device to the loop by beaconing first and second ports, displaying instructions to connect a cable, receiving an indication the cable is connected, enabling the first port, initiating a LIP, and verifying whether the cable is connected. Another method removes a Fibre Channel device from the loop by beaconing the second port, bypassing the first port, initiating a LIP, beaconing the first port, displaying instructions for disconnecting the cable, and receiving an indication the cable is disconnected. A system includes means for displaying instructions to add a Fibre Channel device on the loop and a management controller for beaconing first and second ports, displaying instructions to connect a cable, receiving an indication that the cable is connected, enabling the first port, initiating a LIP, and verifying whether the cable is connected properly.

Abstract: A method and apparatus are provided for operating a hot plug system. A first device may determine whether the system is to operate in one of a parallel mode or a serial mode. A second device may control a mode of the chipset based on the determination of the first device. The second device may include logic, a first multiplexer, a second multiplexer, a first converter and a second converter all provided on the chipset.

Abstract: A method of notifying clients of a change in a USB including a first client requesting notification of a first change in the USB, detecting the first change in the USB, and notifying the first client requesting notification that the first change in the USB occurred.

Abstract: Apparatus and systems, as well as methods and articles, may operate to monitor a flag bit to indicate an occurrence of at least one of a plurality of operational excursions associated with a peripheral card coupled to a bus controller.

Abstract: Each attention button is tied to a presence signal, which is also used to detect the presence of a PCI adapter card within a slot. By comparing HPPC register states, pending due to a system control interrupt (“SCI”), with stored HPPC register states prior to the SCI, the HPPC is able to distinguish between an attention button press and a PCI card insertion or removal and therefore may respond appropriately to the SCI. According to the method, SCIs generated in a computer system by attention buttons are diagnosed and serviced by storing the contents of the HPPC registers. The contents of the registers identify the state of the presence and manually-operated retention latch (“MRL”) signals prior to the occurrence of a SCI and upon receiving a SCI corresponding to a state change for either signal, identify the hot plug controller and the slot where the interrupt occurred.

Abstract: A tape storage emulator provides response data corresponding to a tape storage device and receives a non-media command from a server. The response data is sent to the server in response to the non-media command. A media command is received from the server. The media command is applied to a virtual tape volume configured on a disk storage device.

Abstract: A computer system (10) includes a bus controller (12), a bus (14), a plurality of processing devices (16) and a plurality of enabling switches (18). Each enabling switch (18) corresponds to a separate one of the processing devices (16). Each processing device (16) sends an access request (24) to arbitration logic (22) in the bus controller (12), requesting access to the bus (14). The arbitration logic (22) selects one of the access requests (24) according to a priority protocol. The arbitration logic (22) generates a control signal (20) associated with the selected access request (24). The control signal (20) is provided to the enabling switch (18) corresponding to the processing device (16) that sent the selected access request (24). The enabling switch (18) enables access to the bus (14) for the processing device (16) in response to the control signal (20).

Abstract: An input buffer circuit and associated method operable in a normal mode and a hot-plug mode. In one example, the input buffer has an input and a buffer output, and the input buffer may include a pull-up path coupled between a first circuit supply and the buffer output; a pull-down path coupled between the buffer output and a ground reference voltage; a first transistor coupled between the input and the pull-up path to activate the pull-up path; a second transistor coupled between the input and the pull-down path to activate the pull-down path; and a third transistor for protecting the pull-up path from over-voltage. The input buffer circuit may be configured to prevent an over-voltage condition on each of the plurality of transistors and the input buffer circuit may be configured to allow a hot-plug operation.

Abstract: A method is provided of managing hardware triggered hotplug operations of one or more input/output (I/O) cards of a computer system. The method comprises receiving hardware triggers, each of which relates to a hotplug operation to be carried out on an I/O card associated with a card slot, placing the hardware triggers in a queue, and processing the queue of hardware triggers. The method further comprises processing one or more of said hardware triggers. This comprises analysing a hardware trigger to determine the card slot to which said hardware trigger relates, and consulting a hotplug operation policy to determine whether hotplug operations are enabled for said card slot. If hotplug operations are not enabled for said card slot, this further comprises ignoring said hardware trigger, and if hotplug operations are enabled for said card slot, this further comprise querying said slot to determine whether it contains a card.

Abstract: A USB system includes at least one USB hub, a USB Compound Device, and at least one USB dummy device which is connected to a downstream port of the USB hub. The USB compound device includes an upstream port, a plurality of USB devices and a control unit for setting the states of the plurality of USB devices, wherein when the state of one of the plurality of USB devices is ‘on’ and the USB device has not been assigned an address, the USB device is capable of setting its address according to a received assigning address packet.

Abstract: A Compact Peripheral Component Interconnect (CPCI) system is provided that can map PCI Industrial Computer Manufactures Group (PICMG) states describing the state of a hot-swap CPCI card into Telecommunication Management Network (TMN) plug-in unit states. Specifically, the hardware/Operating System (OS) states for the CPCI card are specified in PICMG states in accordance with the PICMG hot-swap specification. The present system identifies or defines the meaning (e.g., the definition, identification, function, and/or status) of the states on the CPCI card. The system then maps these states into intermediate states. The intermediate states are then mapped into TMN plug-in unit states (e.g., OperationalState and/or AvailiableStatus). The TMN plug-in unit states corresponding to the CPCI card will then comprise the proper identification information for the CPCI card.

Abstract: An information signal processing apparatus connected to a connection control network, has event reception instrument for receiving a predetermined event instruction irrespective of the type of high level protocol, and when the event reception instrument receives an event instruction, an event corresponding to the received instructionis generated.

Abstract: A system and method are provided for initiating peer-to-peer communications via a network bus. The system includes a bus controller in electrical communication with the network bus for controlling communications on the network bus, such as by transmitting commands onto the network bus. The system also includes at least one network device in electrical communication with the network bus, where the network devices collectively comprise at least first and second data channels. The first data channel is configured for Surrogate operation and includes an initiator command and a surrogate command. When the bus controller transmits a command onto the network bus that matches the initiator command of at least the first data channel, at least the second data channel is capable of executing the initiator command and at least the first data channel is capable of executing the respective surrogate command.

Abstract: The present invention provides an extendable computer system including a motherboard for maintaining the functionality of the computer system. The motherboard includes a system chipset and a first extending port electrically connected to the system chipset for extending functionality of the motherboard. The extendable computer system further includes an extended board capable of electrically connecting to the motherboard for extending the functionality of the computer system. The extended board includes a second extending port capable of electrically connecting to the first extending port for electrically connecting the extended board to the system chipset of the computer system, wherein the extending ports consist of a Golden Finger Slot and a matched Golden Finger, and the extended board and the motherboard are aligned in the same plane through the connection of the extending ports.

Abstract: A chassis divides vertically, with front and rear sections of the chassis joined immediately adjacent a midplane printed circuit board that supports interconnectivity of electronic circuits. Wiring within the chassis is eliminated through directed connections of all components to the midplane. Minimal hardware is required for securing the front and rear sections together, and therefore accessing the midplane for assembly and service is convenient. All components except the midplane are installed and removed from either the front or rear of the chassis without opening or disassembling the chassis. The chassis layout and features facilitate effective cooling of the components in the chassis.

Abstract: A remote tester for a radio frequency beacon includes a plug-in module insertable into a cooperating slot in a handheld computing device so as to communicate data between the module and the computing device, wherein the module includes an antenna, at least one radio frequency receiver cooperating with the antenna so as to receive radio frequency signals from the beacon, a processor cooperating with the receiver, and a host interface for coupling in the slot with the computing device for data interchange between the processor in the module and a processor in the computing device.

Abstract: Methods and apparatus are provided for hot swapping a hard disk drive. A gateway is connected between the disk drive and the bus leading to the host adapter. The gateway can isolate the disk drive from the bus prior to a disk drive being removed and can signal to the host adapter when a new drive has been installed. The gateway can de-isolate the newly installed disk drive from the bus to allow the host adapter to communicate with the newly installed disk drive. Additionally, the gateway can remove system power from a disk drive being removed and ramp up power to a newly installed disk drive while system power is uninterrupted for other components of the computer system. An adapter may be provided to connect a disk drive to the gateway, and the gateway and the adapter engage and/or disengage during the hot-swapping of the disk drive.

Abstract: According to embodiments of the present invention, a peripheral component interconnect (PCI) standard hot-plug controller (SHPC) includes a command register to store PCI slot operation commands for one or more target PCI slots and a programmable register that may be programmed with one timing parameter value (e.g., Tpccc, Tpece, Tcebe, Tbkrk, etc.) for a signal sequence for execution of one PCI slot operation command and another timing parameter value for a signal sequence for execution of another PCI slot operation command depending on the particular target PCI slot, the particular PCI slot operation command loaded into the command register, and/or the number of times a particular PCI slot operation command has been loaded into the command register, for example.

Abstract: Modules coupled to multiple connectors can check to see if full connectivity is provided through the connectors. If it is not, for instance because the connectors are mis-seated, the modules can prevent themselves from fully powering up. In a storage environment, a first module is coupled to connectors. The connectors are coupled to corresponding disk drives. Each connector provides a connectivity indication. The module prevents itself from fully powering up if it fails to receive a connectivity indication from a subset of connectors coupled to boot disks.

Abstract: A universal serial bus (USB) connector for connecting a host and a universal serial bus device includes a main body, a first pin disposed in the main body connecting to a power supply, a second pin disposed in the main body transmitting signal D?, a third pin disposed in the main body transmitting signal D+, and a fourth pin disposed in the main body connecting to ground. The third pin is shorter than the second pin by a predetermined length, whereby the host recognizes the universal serial bus device correctly when the universal serial bus device is connected to the host by the universal serial bus connector from the host.

Abstract: A system for interfacing a multi-interface card to a non-standard interface is provided. The system includes a detection module that detects an input signal; and a switching module that operationally couples the multi-interface card to an interface based on the input signal. The switching module operationally couples the multi-interface card to a serial interface, a USB interface, a PCMCIA interface or to any non-PCMCIA interface. The system also provides a docking device that is coupled to a computing device, for interfacing a multi-interface card to non-standard interfaces. The docking device includes an interface that receives the multi-interface card; detection logic for detecting the multi-interface card; and a converter that receives signal from the multi-interface card and converts the signals based on an interface that couples the docking device to the computing system.

Abstract: A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes a task to either the master module for portioning out or to all of the expansion modules. The master module then receives completion signals from all of the active slave modules and then provides only one interrupt to the central processing unit for that task.

Abstract: A GPRS replaceable module communication device includes a motherboard and a daughter board. The motherboard includes necessary components for enabling GPRS module operation and selecting module interface and setting, while the daughter board is a modularized add-on card whose function is determined by a replaceable module. The same GPRS motherboard can be used to accommodate different daughter boards for different functions, and the GPRS motherboard determines either to read the control data on the motherboard, or the control data on the daughter board by the insertion or removal of the daughter board.

Abstract: Improved techniques for rendering a peripheral device removable (e.g., unpluggable) are disclosed. According to one aspect of the invention, the peripheral device is rendered removable from a host computer without preparatory user actions. In effect, the peripheral device can be automatically prepared for removal in the event that its user removes (unplugs) it from its host computer. According to another aspect of the invention, the peripheral device includes a data storage device that is mounted to a file system of the other computer when the other computer desires access to the data storage device. Otherwise, the data storage device is normally unmounted so that if the peripheral device were to be removed (e.g., unplugged) no harm or damage to data stored therein would occur. These aspects of the invention can be utilized alone or in combination with one another.

Abstract: A computer software system is disclosed for facilitating a user's replacement or insertion of devices in a computer server network system. The system allows a user to swap or add peripheral devices while the system is running, or in a “hot” condition, with little or no user knowledge of how the system carries out the “hot swap” or “hot add” functions. The system, which consists of a graphical user interface (GUI) and associated computer software modules, allows the user to select a desired peripheral device location within a server, and then provides the modular software structure to automatically execute a series of steps in the hot swap or hot add process. Each step is prompted by the user from the GUI, to invoke commands to instruct a network server through its operating system and hardware to suspend the appropriate device adapters, if necessary, power down the desired device slot or canister, allow the user to replace or insert a new device, and finally restart the adapters and the slot power.

Abstract: A storage controller configured to adopt orphaned I/O ports is disclosed. The controller includes multiple field-replaceable units (FRUs) that plug into a backplane having local buses. At least two of the FRUs have microprocessors and memory for processing I/O requests received from host computers for accessing storage devices controlled by the controller. Other of the FRUs include I/O ports for receiving the requests from the hosts and bus bridges for bridging the I/O ports to the backplane local buses in such a manner that if one of the processing FRUs fails, the surviving processing FRU detects the failure and responsively adopts the I/O ports previously serviced by the failed FRU to service the subsequently received I/O requests on the adopted I/O ports. The I/O port FRUs also include I/O ports for transferring data with the storage devices that are also adopted by the surviving processing FRU.

Abstract: A method, system, and program product supporting dynamic configuring of a multi-node computer. The system includes a scalability management module directly coupled to each node in the multi-node computer.

Abstract: One embodiment of the invention includes a system for changing a bus configuration of a computing device. The system includes a first bus of the computing device, a second bus, and a third bus. Additionally, a multiplexing module is coupled with the first, second, and third buses. As such, the multiplexing module can selectively couple the first bus with the second bus or the third bus. A configuration module is coupled with the multiplexing module and controls its operation.

Abstract: The present invention enables the use of a single passive adaptor (1500, 1800) for multiple types of flash media cards. The present invention provides this by implementing form factors with a detection scheme (1410, 1610) that notifies a host controller of the type of media card that has been inserted. The form factors and detection scheme can be designed to meet PCMCIA CardBus Plus standards.

Abstract: A semiconductor storage device connected to the host system through the general purpose interface, including a semiconductor storage media module (1) and a controller module (2), in which the controller module (2) consists of a general purpose interface control module (21), a microprocessor and control module (22). Various device class protocols can be realized at the interface application level of the semiconductor storage device, which makes it possible to simulate and realize the storage functions of various storage disks. One or a plurality of storage spaces are opened up in the semiconductor storage media and one or a plurality of storage disks are supported by the same device; furthermore, the device supports hot plug and play and it is removable.

Abstract: Substantial reduction or total elimination of switching transients (glitches) in an information handling system caused by inserting and/or removing hot-pluggable nodes having large power requirements is achieved with a plurality of power supplies having spare power capacity and being configurable into a main power source and an isolated power source. When insertion of a new hot-pluggable node is detected, this newly inserted node is powered from the isolated power source that is not coupled to the other existing operational nodes. When power to the new hot-pluggable node has stabilized and no longer has any detectable transients thereon, the new node is coupled to the main power source which powers the existing nodes of the information handling system. The isolated power source may thereafter be coupled to the main power source for added power supply redundancy. The new node may be detected and made part of or removed from the information handling system without being coupled to the main power source.

Abstract: Provided are a method, system, and program for processing a transmission from a first device to a second device. An identification transmission is received including an interface address from the first device. A determination is made as to whether the identification transmission indicates a recognized vendor identifier. An interface address of a third device is returned to the first device in response to determining that the identification transmission includes one recognized vendor identifier, wherein the third device relays transmissions between the first and second devices.

Abstract: An electronic apparatus according to the present invention comprises a main unit which stops operation when receiving an apparatus control signal S1 specifying a standby state while in a normal state, and then outputs an operating state signal S2 indicating that the main unit is in the standby state; and begins operation when receiving an apparatus control signal S1 for selecting the normal state while in the standby state, and then outputs an operating state signal S2 indicating that the main unit is in the normal state; and a sub-unit which stops operation when, while operating, receiving an IC card detection signal S3 indicating that the reading of an IC card 4 is possible and also receiving the operating state signal S2 indicating that the main unit is in the standby state from the main unit, and brings part of its functional blocks into operation when, while not operating, receiving the operating state signal S2 indicating that the main unit is in the normal state from the main unit.

Abstract: A method and a system for providing a processor to a computer system through a removable CPU module. The processor on the removable CPU module may be shared by multiple computer systems by inserting the module into different computer systems at different times. Upon insertion of the removable CPU module into the computer system, the computer system detects and identifies the module. The computer system may determine a compatibility between the processor and the operating system as well as an access address of the processor, an addressing mode of the processor, a data transfer mode of the processor, etc. The computer system then loads the operating system, informs the operating system of the processors attributes, and initiates execution of the operating system using the processor on the removable CPU module.

Abstract: A computing device maintains coherency while supporting addition and removal of memory caching agents without rebooting the computing device.