Abstract: An architecture and method that enables communication between applications and peripheral devices through use of network-type messaging. The architecture is exemplified by a machine having a mainboard that includes memory and one or more processors. The mainboard also includes one or more expansion slots for receiving various peripheral device cards. The processor(s) is enabled to communicate with peripheral devices via an internet network that includes network interfaces for both the processor and each of the peripheral devices. The network interfaces include a network port and a network address that is bound to the network port by means of a network socket. Socket application program interface (API) and network abstraction layers are provided by software means to enable applications to communicate with the peripheral devices using network messaging and protocols, such as TCP/IP over an Ethernet.

Abstract: The present invention provides systems, methods, and bus controllers (12) for establishing communication with various network systems located on a network system (10). Importantly, the systems, methods, and bus controllers (12) of the present invention are capable recognizing that a new network device (16, 18, 20) has been added to an existing network and assigning it an address such that the added network device is identifiable on the network. Further, the systems, methods, and bus controllers (12) of the present invention may update the operating schedule that outlines communication in the network system between the bus controller (12) and the network devices (16, 18, 20) to include commands for communicating with the added network device. The systems, methods, and bus controllers (12) of the present invention may also detect when a network device (16, 18, 20) has been disconnected from a network system (10) and remove the commands associated with the networked device from the command schedule.

Abstract: Very small non-volatile memory cards are modified to include a connector to which a connector on a separate data input-output card electrically and mechanically mates when pushed together. The input-output card transfers data directly between an external device and the non-volatile memory, without having to go through the host to which the memory card is connected. The input-output card communicates with the external device through a wired or a wireless communication channel.

Abstract: A system includes a storage subsystem capable of being set in at least a first mode and a second mode. When operating the storage subsystem in the first mode, redundant information is stored in a first portion of the storage subsystem in the first mode. An indication is received to indicate that a mode of the storage subsystem is to be changed from the first mode to the second mode. In response to the indication, the mode of the storage subsystem is changed from the first mode to the second mode. In the second mode, non-redundant information is stored in the first portion of the storage subsystem. The mode of the storage subsystem is changed without resetting the system.

Abstract: A selectively transparent interface circuit identified herein as a flow-through register (FTR) is disclosed. The FTR enables one or more devices on a primary bus to communicate with a device on a secondary bus without incurring the latency and performance degradation of conventional bridges. The FTR can also provide Hot Swap capability which allows, for example, a device designed for a regular PCI bus to be plugged into a CompactPCI bus while system power remains on. The synchronous flow-through nature of the FTR eliminates the need for large data buffers that would otherwise result in transaction delays and performance degradation. Unlike other types of non-transparent devices such as PCI-to-PCI bridges, the FTR does not occupy any configuration space and is fully transparent to the host and HBA device driver software during flow-through operation, eliminating the need for costly changes to host and device driver firmware/software.

Abstract: A system and method for scaling a bus based on a location of a device on the bus are disclosed. An information handling system includes a host bridge interfaced between a local bus and a peripheral bus operable to run at a plurality of bus speeds generated by the host bridge. A plurality of expansion slots are coupled to the peripheral bus and a bus switch is coupled to the peripheral bus between at least two of the expansion slots. Control logic is interfaced with the host bridge and the expansion slots. The control logic is operable to enable at least one of the expansion slots based on a signal received from each of the expansion slots by manipulating the bus switches.

Abstract: A switching technique allows multiple interconnect bus devices to be connected to a single bus segment, even if the interconnect bus protocol only allows a one of the interconnect devices to be connected at any time. Each of the interconnect devices is connected to the interconnect bus segment with a switch, such that the interconnect device is electrically isolated from the interconnect bus segment when the switch is open. An interconnect sourcing agent connected to the interconnect bus segment controls the switches, closing the switch for one of the interconnect devices when a transaction is destined for that interconnect device, opening all of the other switches so that only one device is connected to the bus at any time.

Abstract: A single, dual form computing device is provided that incorporates the functionality of a laptop computer with that of a handheld or palm-size computing device, and allows each functionality to be selectively employed. The dual form computing device operates in one of two modes. While operating in a first “instant on” mode, the dual form computing device provides functionality similar to that of a handheld device, whereby a lengthy bootstrap process and operating system load is not required. While operating in a second “non-instant on” mode, the dual form computing device operates substantially like a laptop computer. Additionally, the dual form computing device is equipped to share input and output devices independent of the operation mode it functions in.

Abstract: Methods and apparatus are provided for suspending communications with a hard disk drive in order to transfer data relating to the hard disk drive between the host and an intermediate communications gateway, thereby isolating the hard disk drive from the bus while this data is transferred. The data transferred between the host and the intermediate communications gateway may include control signals transferred from the host to the intermediate communications gateway and status signals transferred from the intermediate communications gateway to the host. In one embodiment, normal communications with an IDE hard disk drive are suspended upon the assertion of the reset line of the AT bus. As such, the state of the reset line may be controlled such that the reset line is no longer merely utilized as a system reset but, instead, is used to define the state of communications between the host and the hard disk drive.

Abstract: A system and method for reducing inrush current in an information handling system includes charging a pre-charge circuit with an elongated pin. The information handling system includes a midplane with at least one power source connector and multiple blade connectors able to connect to blade servers. Each blade connector has an elongated pin for supplying power to a blade server. Each blade server has a power connector for receiving the elongated pin and an integrated pre-charge circuit including a resistor and capacitor.

Abstract: First, two subsystems are connected with each other via a communication cable and then recognize physical connection between the two subsystems. Next, each one of the two subsystems ignores signals from the other subsystem for a predetermined time period after recognition of the physical connection. Then, the two subsystems execute the connection procedure and after that, establish data communication between the two subsystems.

Abstract: Integrated circuits such as programmable logic devices are provided with hotsocket detection circuitry. The hotsocket detection circuitry monitors signals on data pins and power supply voltages. If the data pins become active before the power supply voltages have reached appropriate levels, a hotsocket condition is identified. When a hotsocket condition is identified, driver circuitry on the integrated circuit can be disabled by a hotsocket signal. Conductive paths may be used to share hotsocket detectors among multiple blocks of input-output circuitry.

Abstract: In a network element management method and apparatus, and a network management system where mounting positions of physical components on a network element are unfixed, an external input mounting schedule for a physical component detachable from a network element as mounting plan information including a type of the physical component, a scheduled mounting position within the network element, and a scheduled mounting term is received through a graphical user interface. No overlap with a preliminarily provided mounting schedule for another physical component per each predetermined measure of the scheduled mounting position is confirmed based on the inputted mounting plan information. The mounting plan information is determined to be implementable only when all of the predetermined measures of the scheduled mounting position are confirmed.

Abstract: A hot-pluggable video architecture system is disclosed. The system includes one or more computers, where each of the computers includes a system bus for carrying signals, such as video bus cycles, a hot-pluggable bus, and a hot-pluggable host controller coupled to the system bus and the hot-pluggable bus. According to the present invention, the hot-pluggable host controller includes a video resource controller for reading and converting the video bus cycles on the system bus into signals having a format of the hot-pluggable bus. An external hot-pluggable video subsystem is further provided that can be removably coupled to the hot-pluggable bus of any one of the computers for processing the signals into a format suitable for a display.

Abstract: An interface unit for data transfer between a processor bus and an ISDN-based bus is disclosed. The ISDN-based bus is an IOM-2 bus. The interface unit enables access to all available IOM-2 slots, thereby increasing data transfer rate between the processor and IOM-2 buses.

Abstract: A Hot Plug system includes a PCI bus, an expansion card, a slot for receiving the expansion card, and a Hot Plug controller directly connected to the expansion card and the slot, but only indirectly connected to the PCI bus. An enhanced arbiter monitors and controls the PCI bus on behalf of the Hot Plug controller, thereby allowing the Hot Plug controller to be disconnected from the PCI bus and reducing a critical load on the PCI bus. Because the Hot Plug controller no longer needs to perform monitoring and controlling functions on the PCI bus, the logic within the Hot Plug controller can be significantly simplified. However, the Hot Plug controller still maintains direct control over the expansion slots and associated expansion cards. In one embodiment, the enhanced arbiter with Hot Plug capability is implemented with a bridge on a chipset.

Abstract: Embodiments of the present invention detect a device's ability to run at a particular frequency on a PCI bus operating in a non-inhibit bus mode. In one embodiment, expansion slots are powered on, connected to the PCI bus and reset. The expansion slots are then disconnected from the PCI bus while power is applied. A frequency detection algorithm, which is operable regardless of the inhibit bus connect setting or capability, is executed. The expansion slots are then reconnected to the PCI bus.

Abstract: An extended Secure-Digital (SD) card has a second interface that uses some of the SD-interface lines. The SD card's mechanical and electrical card-interface is used, but 2 or 4 signals in the SD interface are multiplexed for use by the second interface. The second interface can have a single differential pair of serial-data lines to perform Universal-Serial-Bus (USB) transfers, or two pairs of differential data lines for Serial-Advanced-Technology-Attachment (SATA), Peripheral Component Interconnect Express (PCIE), or IEEE 1394 transfers. A card-detection routine on a host can initially use the SD interface to detect extended capabilities and command the card to switch to using the second interface. The extended SD card can communicate with legacy SD hosts using just the SD interface, and extended SD hosts can read legacy SD cards using just the SD interface, or extended SD cards using the second interface. MultiMediaCard and Memory Stick are alternatives.

Abstract: A method and apparatus for communicating general purpose events in-band from a downstream controller is presented.

Abstract: A reconfigurable flash media reader system provides a flash media reader that accepts both asynchronous and synchronous flash media cards. The reader identifies the card type of the inserted flash media card and notifies the host computer of the card type. The host computer has a list of interface information for different types of flash media cards and references the card type in the list and sets the proper baud rate on the reader. If the flash media card is a synchronous card, data that is to written into the flash media card is gathered and converted to the proper card IO strobes for the card type which are interleaved with the proper card clock strobes for the card type into a bit stream in a bulk transfer packet. The reader extracts the data bit stream from said bulk transfer packet and clocks the data bit stream into the flash media card using the baud rate as a reference clock.

Abstract: A server blade is provided with an enclosure. The server blade can be provided with a plurality of processors in the enclosure. The server blade can be configured as a field replaceable unit removably receivable in a carrier of a modular computer system, for example a high density blade server system. The enclosure for such a multiprocessor server blade can be larger that a standard enclosure for a single processor server blade. The carrier can be configured to receive such an oversized server blade enclosure as well as a standard enclosure.

Abstract: A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.

Abstract: A patch panel system including a chassis and a plurality of modules. The chassis includes elongated structures configured to interconnect top, bottom and side portions of the chassis. The elongated structures are also configured to receive and secure a printed circuit board and the plurality of modules to the chassis. The modules include a housing and a module card. The card can include a variety of connections that provide communication to connections located on a back plane of the chassis. The system can include a combination of passive and active modules that are interchangeable to provide a variety of interface configurations.

Abstract: The peripheral bus connector for improved aggregation of resources of a device on the peripheral bus includes a plurality of aggregation pins, in addition to the pins according to the peripheral bus standard. Signals from a controller on an extended peripheral bus adapter sends and receives signals in addition to standard signals of the peripheral bus through the aggregation pins. The aggregated device is hidden from third parties, and its existence is known only to the controller on the extended peripheral bus adapter. In this manner, resources are aggregated across a peripheral bus without needing the addition of another controller and without the need to redefine standard peripheral bus signals. In addition, standard peripheral bus adapters may still be used in the connector if resource aggregation is not desired.

Abstract: A disclosed communication interface for a gaming machine has a main communication board with one or more standard receptor slots for a plurality of “daughter boards,” each daughter board allowing communication between a master gaming controller and a gaming device or between a master gaming controller and a gaming machine network. The daughter boards may be designed to convert between a number of different communication standards or communication formats. Further, the daughter boards may employ a standard connector that allows the daughter board to be plugged into any of the standard receptor slots on the main communication board. Daughter boards may be removed or installed on the main communication board while the main communication board is receiving power. Further, the main communication board with a plurality of standard receptor slots may accommodate many different types of daughter boards and many different combinations of these types of daughter boards.

Abstract: A method and system for controlling the addition of a USB device to a host computer system via a hardware hot plug detector that monitors USB ports. The differential signal lines connecting to the USB device are logically OR'ed together, such that logically high D+ or D? signals from the USB device signal a central processing unit's (CPU) system management interrupt (SMI) line to initiate system management mode (SMM). Entering SMM transfers control of the host computer system to an SMI Interrupt Handler BIOS, which resides in the SMM address space of the hose computer system. The SMM BIOS is loaded into the SMM address space during Power On Self Test (POST) and is secured prior to booting the Operating System (OS). The SMM BIOS code contains instructions as to whether or not the connected USB device should be made visible to the operating system of the computer.

Abstract: An information handling system is disclosed that retires events upon device replacement. The system has several devices of one or more types and each device includes nonvolatile memory. A unique identifier, for devices of that type, is stored in the nonvolatile memory of each device. A first memory segment stores an event log. The event log has entries that identify system events. A second memory segment stores identifiers of devices that correspond to an entry of the event log. At least one of the corresponding devices is removable. The system detects the removal of the devices and, in response, removes any entries in the event log that correspond only to identifiers of one or more devices that have been removed.

Abstract: The specification discloses a server system implementing hot pluggable memory boards in an architecture using X86 processors and off-the-shelf operating system, such as Windows® or Netware, which do not support hot plugging operations. Thus, the specification discloses systems and related methods for hot plugging main memory boards transparent to, and without the help of, the operating system. The operating system need only have the ability to recognize additional memory in order to use it. Moreover, the specification discloses a related set of memory error detection and correction techniques, again which are implementing transparent to, and without the help of, the operating system.

Abstract: A technique for rebalancing performance levels of one or more add-in cards is presented. Rebalancing occurs whenever a hot-plug event occurs and a change in status of a mismatch condition occurs. For example, if an add-in card is inserted that is unable to operate at the current performance level, rebalancing of the performance level occurs. Thus, for an insertion event, the performance level of all cards may be lowered. Alternatively, if an add-in card is removed and a mismatch is resolved, rebalancing of the performance level occurs. Thus, for a removal event, the performance level may be increased. The rebalancing includes disabling any enabled cards and enabling all cards at a different performance level. In one embodiment, the cards are sorted according to highest performance level available and enabled in an order of lowest to highest of the highest performance level available.

Abstract: A method and system for providing a running image of an operating system on a removable operating system module to multiple computer systems. The removable operating system module includes a memory unit for storing the running image of the operating system. Upon insertion of the module into a computer system, a BIOS loads the operating system from the removable operating system module and initiates the execution of the operating system. In response to a request by the user, the BIOS may resume or restart the operating system. The operating system may also discover any available local and remote devices, resume any available previously running applications, and perform tasks requested by the applications and the user. In response to a user's removal request, the state of the operating system is saved on the module and the removable operating system module is removed from the computer system.

Abstract: Circuits and methods for interconnecting a live backplane and at least one I/O card are provided. This invention provides interconnection circuitry that utilizes buffer circuitry to connect the data and clock busses of the backplane to the data and clock busses of the I/O card in a “hot-swappable” fashion. Buffer circuitry also isolates the capacitance associated with the backplane from the capacitance associated with the I/O card. For example, when at least one signal is driven from the backplane to the I/O card, the signal need only overcome the capacitance associate with the backplane. Conversely, when at least one signal is driven from the I/O card to the backplane, the signal need only overcome the capacitance associated with the I/O card. Hence, this capacitive isolation facilitates signal propagation between the backplane and the I/O card.

Abstract: A method for communicating data includes receiving at a main card a first media access control (MAC) address of a first peripheral component interconnect (PCI) card coupled to the main card and determining whether the first peripheral card has been previously used with the main card based on the received first MAC address. The method includes assigning a first previous ID value to the first peripheral card if the first peripheral card has been previously used with the main card and assigning a first new ID value to the first peripheral card if the first peripheral card has not been previously used with the main card. The method also includes storing the first new ID value with the received first MAC address in memory of the main card.

Abstract: A user specifies, in advance, the expansion devices which he/she does not want to remove among the expansion devices which are attachable/detachable with respect to the PC, and the specified expansion devices are excluded from a list displayed later for the user to select an expansion device to remove. Besides, whether to display expansion devices in the list is specified to an BIOS and the information referenced by the BIOS is stored in an NVRAM.

Abstract: A cellular telephone (102) in a vehicle includes a data carrier system comprising a first semi-permanent Subscriber Identity Module (SIM) (200) selectively couplable to the cellular telephone (102) and a second SIM (300) selectively couplable to the cellular telephone (102) in preference to the first SIM (200), the first SIM (200) being arranged to be decoupled from the cellular telephone (102) when the second SIM (300) is coupled to the cellular telephone (102). During a predetermined period of time, the cellular telephone (102) is arranged to be ensured of a supply of power and the second SIM (300) is arranged to be decoupled from the cellular telephone (102), thereby causing the first SIM (200) to be coupled to the cellular telephone (102) for the execution of a task requiring the first SIM (200).

Abstract: A smart switch design in an external data storage or a flash memory reader/writer application that controls a power on/off to both a data storage device and an electronic bridge board inside a interface cable, the external data storage including: an enclosure for protecting interior elements; a switch with first and second ends, the first end connected to a wire of the electronic bridge board for receiving a power signal from a computer via an interface cable, the second end is connected to a power signal pin of the data storage device and an ASIC of the electronic bridge board; when the switch turns on (or the flash memory card insert into said slot) the data storage device (or the flash memory card) and the ASIC of the electronic bridge board gets the power signal from the computer and automatically issues the necessary handshake signals to the computer to establish the electrical communication to the data storage device (or the flash memory card).

Abstract: A computer system is adapted for dynamic replacement of a hot swap controller card. The computer system includes a circuit board, with the computer system comprising a first slot and a second slot coupled to the circuit board. The first slot includes a first connector and the second slot includes a second connector. The first and second connectors each have a column and row arrangement of connector-pins, with the first connector including first, second and third connector-pins and the second connector including fourth, fifth and sixth connector-pins. First, second, third, fourth, fifth and sixth signal lines are connected to the first through sixth connector-pins, respectively. A primary hot swap controller has a first means for simultaneously turning on/off a first plurality of switches, a second means for driving signal lines connected to the first, second, fourth, and fifth connector-pins, and a third means for storing a status information of the signal lines.

Abstract: A computer apparatus and a method of diagnosing are provided that increase reliability and make non-stop operation possible even at a hardware repair, replacement, or addition time. The computer apparatus, which comprises a main OS and a sub OS, may have a peripheral device or an I/O card repaired, replaced, or added with power on. The repaired, replaced, or added hardware component is disconnected from the main OS. With the main OS performing usual processing, the sub OS uses a test/maintenance program to check the operation of the repaired, replaced, or added hardware component and then passes the control of the hardware component to the main OS.

Abstract: A system includes memory slots to receive memory modules. In response to detecting replacement of a first memory module with a second memory module in a first memory slot, a notification is generated to indicate that a new memory module has been added to a second memory slot that is different from the first memory slot.

Abstract: An interface card includes data transmission routes which allow for data transmission in a plurality of data transmission modes and a mode selection switch for selecting a data transmission mode from the plurality of modes. With the interface card, a user is able to select an optimal data transmission mode for the environment.

Abstract: A method and apparatus for detecting the presence of hot-pluggable components in a computer system. The method and apparatus includes an electromagnetic energy source located on a first side of a system board proximate an edge connector, the electromagnetic energy source for generating electromagnetic energy directed at least toward a second opposing side of the system board. The method and apparatus further includes an electromagnetic energy detector located on the second side of the system board, the electromagnetic energy detector for detecting a presence of electromagnetic energy when a hot-pluggable component is not mated to the edge connector and the electromagnetic energy is thereby unobstructed by the hot-pluggable component, the electromagnetic energy detector further for detecting an absence of electromagnetic energy when the hot-pluggable component is mated to the edge connector and the electromagnetic energy is thereby obstructed by the hot-pluggable component.

Abstract: A data processing system that provides hot-plug add and remove functionality for individual, hot-pluggable components without disrupting current operations of the overall processing system. The processing system includes an interconnect fabric that includes hot plug connector at which an external hot-pluggable component can be coupled to the data processing system and logic components include configuration logic and routing and operating logic. When a hot-pluggable component is connected to the hot plug connector, the service element automatically detects the connection and selects the correct configuration file for the extended system. Once the configuration file is loaded and the system checks of the new element indicates the new element is ready for integration, the new element is integrated into the existing system, and the OS allocates workload to the new element. From a customer perspective, the entire process thus occurs without powering down or disrupting the operation of the existing element.

Abstract: The method of management of the hot insertion of an electronic card (11) in a system (10) comprises the successive connection of the card to two supply potentials (U0, Ui) available in a connector (20) so as to obtain transient connection signals (41, 42) during the hot insertion of the card, the detection of the transient signals for providing a binary signal (Vi), one binary state (Vi=1) of which represents the hot insertion of the card, and the use of said state of the binary signal (Vi) for rendering the card operational in the system. The hot insertion detector (37) includes a bistable logic circuit fed during the connection of the card to said potentials and provided with biasing means adjustable depending on the presence or otherwise of the transient signals.

Abstract: A system and method are disclosed for hot plugging an enclosure management system. Enclosure management system is used in the sub-systems within data management and processing systems. The system and method for hot plugging include: a display unit, a detecting unit, and working with data processing system software to provide hot plug capability. The invention will increase the working efficiency for the data processing system.

Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion across on a plurality of memory cartridges each containing a plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). Each memory cartridge includes an independent memory controller and a corresponding control mechanism in the host/data controller to interpret the independent transitioning of each memory cartridge between various states, including a redundant-ready and a powerdown state to facilitate “hot-plug” capabilities utilizing the removable memory cartridges. Fault information may be passed between the individual memory controllers and the host/data controller to facilitate expedient fault isolation.

Abstract: The control logic for a hot-pluggable memory cartridge for use in a redundant memory system. To implement a hot-pluggable memory cartridge in a redundant memory system, control logic to control the sequence of events for powering-up and powering-down a memory cartridge is provided.

Abstract: When a blade and/or interconnect device is inserted into the chassis of a powered or live server the procedure is known as hot-plugging. Before power is applied to the hot-plugged blade and/or interconnect device the fabric type of already installed blades and/or interconnect devices is correlated with fabric types of newly hot-plugged blade and/or interconnect device. Depending upon results of the correlation, power to the hot-plugged blade and/or interconnect device is allowed or denied.

Abstract: The present invention provides for systems and apparatus that support non-hotswappable (non-HA) 64-bit Compact Peripheral Component Interconnect (CPCI) cards so that customers can use their old legacy (non-hotswappable) cards in the node or input/output (I/O) slots of a hotswappable CPCI system. The system controller card in the CPCI system is responsible for configuring the entire CPCI interface including the width of the CPCI interface (i.e., 32-bit or 64-bit). In one embodiment of the present invention, all the radial HA control signals (e.g., BD—SEL#, HEALTHY#, PCI—RST#) to all of the CPCI slots are implemented separately on some other card (or board), such as a system management card (e.g., an alarm card). At the time of system powerup, only the system management card (SMC) powers up and checks the HEALTHY# register where it maintains the healthy status of all the cards in the system. The non-hotswappable card (or board) will assert the HEALTHY# signal to the SMC.

Abstract: The invention is a control system using microprocessors which communicate through a Local Area Network (private LAN) to control operation of both processors and input and output subsystems (IO system) of a multiprocessor computer system. The processors each have memory associated therewith, and each processor has an IO system comprising a plurality of busses such as PCI busses, associated therewith. The processors are cabled together in a mesh arrangement so that messages can be transferred between any of the processors and delivered to memory associated with the destination processor, or delivered to an IO system associated with the destination processor, etc.

Abstract: A filter driver (125) can communicate with the USB stack and controller and with the CardBay, CardBus, and flashmedia stack and controller. This can allow the use of a CardBay card in a CardBus socket in a manner that is transparent to the user.