Entry Replacement Strategy Patents (Class 711/159)
  • Patent number: 11762573
    Abstract: A method of preserving the contiguity of large pages of a workload during migration of the workload from a source host to a destination host includes the steps of: detecting at the destination host, receipt of a small page of zeros from the source host, wherein, at the source host, the small page is part of one of the large pages of the workload; and upon detecting the receipt of the small page of zeros, storing, at the destination host, all zeros in a small page that is part of one of the large pages of the workload.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: September 19, 2023
    Assignee: VMware, Inc.
    Inventors: Arunachalam Ramanathan, Yury Baskakov, Anurekh Saxena, Ying Yu, Rajesh Venkatasubramanian, Michael Robert Stunes
  • Patent number: 11740801
    Abstract: This disclosure provides techniques for managing memory which match per-data metrics to those of other data or to memory destination. In one embodiment, wear data is tracked for at least one tier of nonvolatile memory (e.g., flash memory) and a measure of data persistence (e.g., age, write frequency, etc.) is generated or tracked for each data item. Memory wear management based on these individually-generated or tracked metrics is enhanced by storing or migrating data in a manner where persistent data is stored in relatively worn memory locations (e.g., relatively more-worn flash memory) while temporary data is stored in memory that is less worn or is less susceptible to wear. Other data placement or migration techniques are also disclosed.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: August 29, 2023
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, Alan Chen, Robert Lercari
  • Patent number: 11734113
    Abstract: A solid state disk access method includes: determining, in response to a read error, a first read voltage of the current data block according to a current data storage time interval to which a data storage time of the current data block belongs; performing reread error correction on the data in the current data block based on the first read voltage; determining, if reread error correction of the current data block fails, a second read voltage corresponding to the current data block according to the current data storage time interval and a preset data read rule that is determined based on the data storage time interval and the number of data reads; and performing reread error correction on the data in the current data block based on the second read voltage until the reread error correction of the current data block meets a preset reread error correction condition.
    Type: Grant
    Filed: February 20, 2021
    Date of Patent: August 22, 2023
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Wenhao Shao
  • Patent number: 11734277
    Abstract: An approach is provided for optimizing a database buffer pool. Based on statistics about read and write operations in a range of pages, the range of pages is determined to be a candidate for a hot read range for which locks and latches are avoided in processing operations in the hot read range. Using an on-time trigger or pre-trigger process, the hot read range is created from the range of pages by marking start and end points in the range of pages. Write operation(s) are determined to be included in the hot read range by marking an object control block. The write operation(s) are added to a write pending list. The read operations in the hot read range are performed without a latch or lock. The write operation(s) are merged from the write pending list to the range of pages and the write operation(s) are performed.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: August 22, 2023
    Assignee: International Business Machines Corporation
    Inventors: Shuo Li, Xiaobo Wang, Hong Mei Zhang, Sheng Yan Sun
  • Patent number: 11726963
    Abstract: A data storage system for use with a multi-threaded processing system receives concurrent requests to store data to a common data store, and efficiently and securely swaps an active data store for a new data store while avoiding conflicts arising from multiple threads attempting to swap a same data store and minimizing reliance on operations that re-attempt actions upon failure of an attempted action, thereby improving performance of the data storage system and also the multi-threaded processing system.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: August 15, 2023
    Assignee: Chicago Mercantile Exchange Inc.
    Inventor: Kyle D. Kavanagh
  • Patent number: 11714573
    Abstract: Techniques for storage optimization in a distributed object store are described. A storage optimization service of a provider network monitors changes to data objects in a distributed object store that are part of a data lake and are referenced by a table index. The storage optimization service determines whether particular storage optimizations involving the data objects would be beneficial, prioritizes the ordering of these optimizations with a focus on performing impactful optimizations first, while intelligently scheduling the optimizations to avoid overutilization of available resources.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: August 1, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Shashank Bhardwaj, Roman Gavrilov, Brian Scott Ross, Mehul A. Shah, Benjamin Sowell, Anthony A. Virtuoso, Linan Zheng
  • Patent number: 11693663
    Abstract: Methods and apparatus for managing circular queues are disclosed. A pointer designates an index position of a particular queue element and contains an additional pointer state, whereby two pointer values (split indexes) can designate the same index position. Front and rear pointers are respectively managed by dequeue and enqueue logic. The front pointer state and rear pointer state distinguish full and empty queue states when both pointers designate the same index position. Asynchronous dequeue and enqueue operations are supported, no lock is required, and no queue entry is wasted. Hardware and software embodiments for numerous applications are disclosed.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: July 4, 2023
    Assignee: UT-Battelle, LLC
    Inventors: Narasinga Rao Miniskar, Frank Y. Liu, Jeffrey S. Vetter
  • Patent number: 11687489
    Abstract: A method and system for identifying garbage data, an electronic device, and a storage medium. The method includes: uploading an object to a distributed object storage system; acquiring a head object identifier in an index storage pool of the distributed object storage system; querying a data storage pool for a target data group corresponding to the head object identifier; marking a tail object corresponding to a tail object identifier in the target data group as a target tail object; and marking tail objects in the data storage pool other than the target tail object as garbage data.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: June 27, 2023
    Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD.
    Inventors: Yu Zhao, Yonggang Hu
  • Patent number: 11675411
    Abstract: Systems and methods are disclosed, including, in a storage system comprising control circuitry and a memory array having multiple groups of memory cells, storing a first physical-to-logical (P2L) data structure for a first physical area of a first group of memory cells in a second physical area of the first group of memory cells, such as when resuming operation from a low-power state, including an asynchronous power loss (APL). The first group of memory cells can include a super block of memory cells. A second P2L data structure for the second physical area of the first group of memory cells can be stored, such as in a metadata area of the second physical area and an address of the first P2L data structure can be stored in the second P2L data structure.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe D'Eliseo, Xiangang Luo, Ting Luo, Jianmin Huang
  • Patent number: 11663136
    Abstract: A non-volatile memory device includes a volatile memory, a non-volatile memory, and a controller. The controller is configured to map logical addresses for stored data to physical addresses of the stored data in the non-volatile memory using a logical-to-physical mapping structure stored partially in the volatile memory and at least partially in the non-volatile memory. The controller is configured to perform a storage capacity recovery operation for a region of the non-volatile memory that is selected based at least partially on a number of mappings for the region likely to be stored in the volatile memory for the storage capacity recovery operation.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: May 30, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Hongmei Xie, Dhanunjaya Rao Gorrle, Aajna Karki
  • Patent number: 11656979
    Abstract: A heterogeneous memory system includes a memory device including first and second memories and a controller including a cache. The controller identifies memory access addresses among addresses for memory regions of the memory device; track, for a set period, a number of memory accesses for each memory access address; classify each memory access address into a frequently accessed address or a normal accessed address based on the number of memory accesses in the set period; and allocate the first memory for frequently accessed data associated with the frequently accessed address and the second memory for normal data associated with the normal accessed address.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: May 23, 2023
    Assignee: SK hynix Inc.
    Inventors: Miseon Han, Hyung Jin Lim, Jongryool Kim, Myeong Joon Kang
  • Patent number: 11630766
    Abstract: A memory system includes a plurality of memory chips, including a first memory chip and a second memory chip, and a controller. The controller includes a first central processing unit (CPU) to process a request received from a host, and a plurality of second CPUs to respectively control operations of the plurality of memory chips through a plurality of channels. An importance table is stored in the controller and includes information about a data programming method for data stored in the memory system, the information about the data programming method corresponding to importance information of the data. The second CPUs are configured to program at least some of the data in both the first memory chip and the second memory chip, based on the importance table, so that at least some of the data is stored in both the first memory chip and the second memory chip as same data.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: April 18, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Duck-Ho Bae
  • Patent number: 11630764
    Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. Garbage collection is performed with regard to the memory device on the basis of a first amount of time and a second amount of time, the first amount of time being a period of time between triggering of first garbage collection and triggering of second garbage collection, and the second amount of time being an amount of time necessary to perform the second garbage collection. A ratio of the first amount of time to the second amount of time is determined as a target ratio value, and the second amount of time is determined to be equal to or longer than a minimum garbage collection operation time. Accordingly, efficient garbage collection can be performed, and the optimal time to perform garbage collection can be determined with regard to a configured performance drop value.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: April 18, 2023
    Assignee: SK hynix Inc.
    Inventors: Min Jun Jang, Hyoung Pil Choi
  • Patent number: 11620215
    Abstract: A method and a system for garbage collection on a system. The method includes initiating a garbage collection process on a system by a garbage collector. The garbage collector includes one or more garbage collector threads. The method also includes marking a plurality of referenced objects using the garbage collector threads and one or more application threads during a preemption point. The method includes replicating the referenced objects using the garbage collector threads and marking for replication any newly discovered referenced objects found by scanning the application thread stack from a low-water mark. The method also includes replicating the newly discovered referenced objects and overwriting any reference to the old memory location.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: April 4, 2023
    Assignee: International Business Machines Corporation
    Inventor: Kelvin Don Nilsen
  • Patent number: 11620085
    Abstract: A processing device, operatively coupled with a memory device, performs operations including receiving a write request from a host system at a first time, the write request identifying first data to be stored in a segment of the memory device, determining whether a pre-read voltage level of the write request satisfies a pre-read voltage level criterion pertaining to a write-to-write time interval for the segment, wherein the write-to-write time interval is defined by the first time and a second time corresponding to a last time at which the segment was written, and responsive to determining that the pre-read voltage level satisfies the pre-read voltage level criterion pertaining to the write-to-write time interval, performing a pre-read operation on the segment using the pre-read voltage level to determine second data currently stored in the segment.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: April 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Ying Yu Tai, Jiangli Zhu
  • Patent number: 11604760
    Abstract: Provided are a computer program product, system, and method for dynamic determination of retention periods for digital content. Metadata is generated for instances of digital content including an access pattern of the digital content by a user of the computing device, attributes of the digital content, and a retention period during which the digital content stored is retained in the storage. A machine learning module is trained with input comprising the metadata for instances of the digital content to produce the retention period of the digital content. Input, comprising metadata determined from digital content, received after training the machine learning module, is provided to the machine learning module to produce an output retention period for the digital content received after the training. The output retention period is used to determine when to delete the digital received after the training content from the storage.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: March 14, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Partho Ghosh, Saraswathi Sailaja Perumalla, Divya Mantha, Sunita Rani Nayak
  • Patent number: 11582168
    Abstract: Snapshots of storage volumes and containers of a bundled application may be created and used to rollback or clone the bundled application. Clone snapshots of storage volumes may be gradually populated with data from prior snapshots to reduce loading on a primary snapshot. Components of cloned applications may communicate with one another using addresses of these components in the parent application. Containers of the bundled application may communicate with an open virtual switch (OVS) that implements flows to implement translation between clone and parent addresses. Containers may be modified to execute operation-specific entrypoint functions prior to invoking an entrypoint of an application instance loaded in the containers.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: February 14, 2023
    Assignee: Robin Systems, Inc.
    Inventors: Shravan Kumar Vallala, Ravi Kumar Alluboyina
  • Patent number: 11561787
    Abstract: A computer-implemented method that includes determining that a first version of an operating system (OS) is updated to a second version of the OS. The method further includes determining that an application does not support the second version of the OS. The method further includes associating the first version of the OS with the application as a base OS. The method further includes invoking the application on the base OS by generating an isolated instance running the base OS on a user device, where the user device simultaneously runs the second version of the OS.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: January 24, 2023
    Assignee: International Business Machines Corporation
    Inventors: Sho Ayuba, Mayumi Goto, Timothy Waileong Koh, Nobuyuki Yoshifuji
  • Patent number: 11556275
    Abstract: Methods, systems, and devices for using page line filler data are described. In some examples, a memory system may store data within a write buffer of the memory system. The memory system may initiate an operation to transfer the write buffer data to a memory device, for example, due to a command to perform a memory management operation (e.g., cache synchronization, context switching, or the like) from a host system. In some examples, a quantity of write buffer data may fail to satisfy a data size threshold. Thus, the memory system may aggregate the data in the write buffer with valid data from a block of the memory device associated with garbage collection. The memory system may aggregate the write buffer data with the garbage collection data until the aggregated data satisfies the data size threshold. The memory system may then write the aggregated data to the memory device.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: January 17, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Nicola Colella, Antonino Pollio, Gianfranco Ferrante
  • Patent number: 11556262
    Abstract: Successful storing of extent operations into corresponding records of a transaction log results in acknowledgement of completion of the extent operations being indicated to one or more hosts. In response to determining that the extent operations are unrelated to each other, the extent operations are flushed in parallel from the transaction log to back-end non-volatile data storage. During the flushing, dependencies between the extent operations and other operations stored in the transaction log are maintained. Dependency chains are identified within the transaction log, and at least one tree data structure representing the dependencies between each of the extent operations and the other operations stored in the transaction log may be generated and traversed in order to select the correct operations stored in the transaction log to flush.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: January 17, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Socheavy Heng, William C. Davenport
  • Patent number: 11550711
    Abstract: Devices and techniques for a dynamically adjusting a garbage collection workload are described herein. For example, memory device idle times can be recorded. From these recorded idle times, a metric can be derived. A current garbage collection workload can be divided into portions based on the metric. Then, a first portion of the divided garbage collection workload can be performed at a next idle time.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: January 10, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Deping He, Nadav Grosz, Qing Liang, David Aaron Palmer
  • Patent number: 11543988
    Abstract: A method of preserving the contiguity of large pages of a workload during migration of the workload from a source host to a destination host includes the steps of: detecting at the destination host, receipt of a small page of zeros from the source host, wherein, at the source host, the small page is part of one of the large pages of the workload; and upon detecting the receipt of the small page of zeros, storing, at the destination host, all zeros in a small page that is part of one of the large pages of the workload.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 3, 2023
    Assignee: VMware, Inc.
    Inventors: Arunachalam Ramanathan, Yury Baskakov, Anurekh Saxena, Ying Yu, Rajesh Venkatasubramanian, Michael Robert Stunes
  • Patent number: 11543984
    Abstract: A storage device includes a memory device and a memory controller. The memory device includes a first plane and a second plane, each including data blocks configured to store user data, one or more replacement blocks configured to replace one or more bad blocks, and system blocks configured to store system information. The memory controller is configured to replace, when a bad block is detected in the first plane after all the one or more replacement blocks in the first plane are used to replace previously detected bad blocks, the detected bad block with a target system block selected among the system blocks in the first plane.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: January 3, 2023
    Assignee: SK hynix Inc.
    Inventors: Hoon Choi, Beom Ju Shin
  • Patent number: 11537560
    Abstract: A method for performing hash code calculations may include calculating, during a write operation for a data block, a hash code for an occupied portion of the data block, inserting, during the write operation, a marker into the data block, calculating, during a read operation for the data block, a hash code for the occupied portion of the data block, searching, during the read operation, for the marker in the data block, and terminating the hash code calculation in response to finding the marker. A system may include a first interface configured to receive data blocks, a second interface configured to transmit data blocks, and hash logic coupled between the first and second interfaces, wherein the hash logic is configured to calculate a hash code for the occupied portion of a data block received through the first interface, and insert a marker in an unoccupied portion of the data block.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: December 27, 2022
    Inventors: Jian Zhao, Hui-Juan Li, Rong Zheng
  • Patent number: 11526439
    Abstract: A storage device includes a nonvolatile memory including a plurality of first blocks having memory cells each configured to store one bit of data and a plurality of second blocks having memory cells each configured to multiple bits of data; and a controller configured to determine whether or not a number of use-completed second blocks, each of which has a first threshold number or less of valid pages, among use-completed second blocks of the plurality of second blocks, is equal to or larger than a second threshold number and to select, according to a determination result, a victim block on which garbage collection is to be performed among used-completed first blocks of the plurality of first blocks or the use-completed second blocks each having the first threshold number or less of valid pages.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: December 13, 2022
    Assignee: SK hynix Inc.
    Inventors: Jin Woo Kim, Jin Woong Kim, Hui Jae Yu
  • Patent number: 11507702
    Abstract: Embodiments relate to switching a neural processor circuit between non-secure and secure modes. A security controller of the neural processor circuit indicates that a transition from the non-secure mode to the secure mode is to occur. The security controller waits for a neural task manager of the neural processor circuit to clear out any existing non-secure tasks in queues. After the existing non-secure mode tasks are cleared, the security controller switches the neural processor circuit to the secure mode. While in the secure mode, secure tasks are added to one or more queues and executed, and data for processing in the neural processor circuit is received from a secure source. The neural processor circuit may to transition back to the non-secure mode when all secure mode tasks are completed.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: November 22, 2022
    Assignee: Apple Inc.
    Inventors: Liran Fishel, Zhimin Chen
  • Patent number: 11501838
    Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: November 15, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Seungjune Jeon, Zhenming Zhou, Zhenlei Shen
  • Patent number: 11500590
    Abstract: Techniques for data writing involve: determining an unavailable storage zone in multiple storage zones of a storage area, wherein each storage zone is used to store a zip header and compressed data corresponding to the zip header; acquiring a reference zip header for the unavailable storage zone, wherein the reference zip header includes metadata indicating a zone length of the unavailable storage zone; and generating consecutive write requests for the storage area based at least on target data to be written to the storage area and the reference zip header, so as to write the target data to available storage zones in the multiple storage zones. Accordingly, rewriting of data can be implemented by constructing large consecutive write requests, thus improving the write performance of the storage device.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: November 15, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Leihu Zhang, Chen Gong, Shuo Lv
  • Patent number: 11494276
    Abstract: Processing write requests from clients includes logging the associated data into logs corresponding to the data objects targeted by the write requests. The logs are persisted by combining log entries from each of the logs into one ore more fixed-size data blocks. The fixed-size data blocks are inserted into a data tree stored on a block-based storage device.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: November 8, 2022
    Assignee: VMWARE INC.
    Inventors: Wenguang Wang, Vamsi Gunturu, Eric Knauft
  • Patent number: 11487658
    Abstract: A memory system may include a plurality of dies; and a controller coupled to the plurality of dies through a plurality of data paths, the controller being suitable for transmitting first data received from a host and second data obtained through an internal operation in parallel through the plurality of data paths.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 1, 2022
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 11481133
    Abstract: A method of managing an integrated circuit memory includes having an integrated circuit card with a memory space including memory space regions for storing user profile data. The memory space is partitioned into segments of memory space regions, where the segments of memory space regions includes allocated regions and empty regions. From the empty regions, the biggest empty region of the memory space is selected. The selected biggest empty region is widened by moving memory blocks positioned in a subset of allocated regions that are at boundaries of the selected biggest empty region into other available empty regions.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: October 25, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventor: Francesco Caserta
  • Patent number: 11443479
    Abstract: Techniques are disclosed relating to arbitration for computer memory resources. In some embodiments, an apparatus includes queue circuitry that implements multiple queues configured to queue requests to access a memory bus. Control circuitry may, in response to detecting a first threshold condition associated with the queue circuitry, generate a first snapshot that indicates numbers of requests in respective queues of the multiple queues at a first time. The control circuitry may generate a second snapshot that indicates numbers of requests in respective queues of the multiple queues at a second time that is subsequent to the first time. The control circuitry may arbitrate between requests from the multiple queues to select requests to access the memory bus, where the arbitration is based on snapshots to which requests from the multiple queues belong. Disclosed techniques may approximate age-based scheduling while reducing area and power consumption.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: September 13, 2022
    Assignee: Apple Inc.
    Inventors: Winnie W. Yeung, Leela Kishore Kothamasu, Zelin Zhang, Guanlan Xu, Eddie M. Robinson
  • Patent number: 11422726
    Abstract: Technologies are provided for a storage device data move command. A storage device can be configured to receive a data move (or garbage collection) command and, responsive to receiving the command, move data from one zone of the storage device (or range of storage locations within the storage device) to another zone (or another range of storage locations) within the storage device. The command can comprise a source zone identifier and a target zone identifier. The storage device can read data from a storage zone associated with the source zone identifier and write the data to another storage zone associated with the target zone identifier. The identifiers can include ranges of storage location addresses within the separate storage zones. In at least some embodiments, a host bus adapter can be configured to support the data move (or garbage collection) command for a storage device attached to the host bus adapter.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: August 23, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Keun Soo Jo, Munif M. Farhan, Seth William Markle
  • Patent number: 11409646
    Abstract: A method for releasing memory allocated by a contiguous memory allocator that merges a to-be-released memory page with an adjacent free page to form a memory block that can be released more efficiently than would be the case when releasing a series of un-merged memory pages.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 9, 2022
    Assignee: AMLOGIC (SHANGHAI) CO., LTD.
    Inventor: Tao Zeng
  • Patent number: 11372988
    Abstract: A system deletes and sanitizes files in a distributed file system. The system also randomizes rotation of data in a distributed file system.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: June 28, 2022
    Assignee: Raytheon Company
    Inventors: Nicholas Wayne Barrett, Gregory Andrew Early
  • Patent number: 11360935
    Abstract: An efficient data storage system is described. An agent software application on computing devices in a first tier processes snapshot backups and pushes them to an appliance software application on a server in a second tier. The appliance software application processes archive backups and pushes them to cloud storage in a third tier. A cloud application on a management server receives storage policy specifications from customers and promulgates the policies to the agent software application and the appliance software application. The policy specifications include time periods and retention set information for the backups. When a retention set has been exceeded, the storage system is pruned to remove file references to unneeded files and delete data files no longer referenced in storage sets in the retention set.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 14, 2022
    Assignee: Aparavi Software AG
    Inventor: Rod Christensen
  • Patent number: 11341091
    Abstract: Customers in regulated industries face demanding compliance regulations, including content immutability. While broadened to allow software-based solutions, the regulations for immutability require content preservation to prevent overwriting, erasure or alteration of the content, where the preservation must be implemented through irrevocable features. Embodiments are directed to provision of an administrative user experience to enable customers to create a preservation policy that defines item(s) to be preserved. After detecting enablement of the policy, the item(s) may be preserved, a preservation lock on the policy may be initiated by disabling controls associated with the policy, and an attribute may be set to the policy to identify the policy as locked.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 24, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Julian Zbogar-Smith, Kamal Janardhan, Sanjay Ramaswamy, Le-Wu Tung
  • Patent number: 11294806
    Abstract: The disclosed embodiments provide a method, apparatus, and system for selecting, based on feedback from previous garbage collections, a portion of a referenced memory area for garbage collection within a time window. During the execution of a software program, the system selects a given portion of a referenced memory area on which garbage collection can be completed within the given time window and attempts to complete garbage collection on at least the given portion of the referenced memory area before the end of the given time window. Next, the system selects, based on the results of the garbage collection performed during the given time window, a subsequent portion of the referenced memory area on which garbage collection can be completed within the subsequent time window and attempts to complete garbage collection on at least the subsequent portion of the referenced memory area before the end of the subsequent time window.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: April 5, 2022
    Assignee: Oracle International Corporation
    Inventors: Thomas Schatzl, Nils Mikael Gerdin, Erik Gustav Helin
  • Patent number: 11281374
    Abstract: An apparatus includes a processing device configured to receive a request to change a given storage network from a first to a second configuration, the given storage network being associated with a heterogeneous storage cluster comprising a plurality of storage targets and initiators having first network addresses in the first configuration. The processing device is also configured to generate a shadow storage network comprising second network addresses having the second configuration, to assign the second network addresses to a subset of a plurality of storage targets and initiators affected by the request to change the given storage network from the first to the second configuration, and, responsive to validating connectivity of the subset of the plurality of storage targets and initiators, to apply the requested change by unassigning ones of the first network addresses assigned to the subset of the plurality of storage targets and initiators.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: March 22, 2022
    Assignee: EMC IP Holding Company LLC
    Inventor: Dmitry Vladimirovich Krivenok
  • Patent number: 11249851
    Abstract: A new snapshot of a storage volume is created by instructing computing nodes to suppress write requests. Storage nodes create a new snapshot for the storage volume by allocating a new segment to the new snapshot and finalizes and performs garbage collection with respect to segments allocated to the previous snapshot. Subsequent write requests to the storage volume are then performed on the segments allocated to the new snapshot. A segment maps segments to a particular snapshot and metadata stored in the segment indicates storage volume addresses of data written to the segment. The snapshots may be represented by a storage manager in a hierarchy that identifies an ordering of snapshots and branches to clone snapshots. A non-snapshot volume may be converted to a snapshot volume at any point after creation.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: February 15, 2022
    Assignee: ROBIN SYSTEMS, INC.
    Inventors: Dhanashankar Venkatesan, Jagadish Kumar Mukku, Ripulkumar Hemantbhai Patel
  • Patent number: 11232090
    Abstract: In one aspect, there is provided a method. The method may include accessing a multi-version concurrency control block providing row state for a block of rows in a table of a database, the multi-version concurrency control block including a header portion and a data portion, the header portion including a type indicator indicating whether all of the rows of the block are visible to a plurality of threads at a database management system or invisible to the plurality of threads at the database management system. Related systems, methods, and articles of manufacture are also disclosed.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: January 25, 2022
    Assignee: SAP SE
    Inventors: Amarnadh Sai Eluri, Vimal Chandran Satheesh, Mihnea Andrei, Prateek Basavapur Swamy
  • Patent number: 11216365
    Abstract: This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.
    Type: Grant
    Filed: March 28, 2020
    Date of Patent: January 4, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Andrey V. Kuzmin, James G. Wayda
  • Patent number: 11210209
    Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: December 28, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Jian-Dong Du, Pi-Ju Tsai, Tsung-Chieh Yang
  • Patent number: 11210213
    Abstract: Provided is an operation method of a controller which controls a memory device including a plurality of memory blocks. The operation method may include calculating a number of extended free blocks in the memory device based on valid page counts of the respective memory blocks, when a number of substantive free blocks in the memory device is less than a first threshold value, and performing a garbage collection operation when the number of extended free blocks is less than a second threshold value.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: December 28, 2021
    Assignee: SK hynix Inc.
    Inventor: Gi-Pyo Um
  • Patent number: 11194666
    Abstract: Time addressable storage in a content addressable storage system includes providing a log volume having an index and a journal. For each snapshot, an identifier is entered in the index and a corresponding journal offset is increased. For each write transaction received for a volume, an aspect includes recording a time, address, and hash handle as entries in the journal. Upon receiving a point in time (PIT) for one of the volumes, an aspect includes identifying a most recent snapshot (S) created before the PIT, taking a snapshot (S?) of snapshot (S), identifying a journal corresponding to the snapshot (S) in the index, and reviewing entries of the identified journal up to the PIT. An aspect further includes updating the snapshot (S?) with a corresponding hash handle for each address appearing in the entries until all write transactions before the PIT are contained in the snapshot (S?).
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: December 7, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: David Meiri, Anton Kucherov
  • Patent number: 11188229
    Abstract: In some examples, a system may include at least one class of storage that is configured for having freed storage space reclaimed to enable reuse of the freed storage space. For instance, the system may determine whether a volume corresponding to the at least one class of storage is used to store system data or user data. If the volume is used to store user data, then the system may determine whether any of the user data has been deleted from the volume. If data has been deleted from the volume, the system may determine whether an available capacity of the volume is less than a remaining capacity threshold before performing reclamation on the at least one storage device corresponding to the volume. Alternatively, if the volume is used to store system data, the system may perform reclamation based on an elapsed period of time since the last reclamation.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 30, 2021
    Assignee: HITACHI VANTARA LLC
    Inventors: Yury Kats, Sowmya Manjanatha
  • Patent number: 11182097
    Abstract: A computer-implemented method includes receiving a plurality of storage requests to store a plurality of objects in a dispersed storage network. The computer-implemented method further includes transforming each object in the plurality of objects into a set of error encoded slices. The computer-implemented method further includes dispersing each error encoded slice in each set of error encoded slices to a memory zone of a distinct storage unit. The computer-implemented method further includes co-locating two or more error encoded slices in a common memory zone of a storage unit based, at least in part, on an expiry time associated with the two or more encoded slices. The computer-implemented method further includes logically deleting the common memory zone of the storage unit after all error encoded slices stored in the common memory zone have expired.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Praveen Viraraghavan, Ethan Wozniak, Amit Lamba
  • Patent number: 11163679
    Abstract: Memory systems and components thereof execute an improved garbage collection (GC) strategy in the case of multiple sudden power offs (SPOs). Such a memory system comprises a memory device including single-level cell (SLC) memory blocks grouped into super blocks (SLC SBs) and multi-level cell (MLC) memory blocks grouped into SBs (MLC SBs); and a memory controller to execute a flash translation layer (FTL) to perform a garbage collection (GC) operation. The memory controller executes the GC operation after a sudden power off (SPO) by determining each MLC SB with user data opened before the SPO to be an unsafe super block (UB), copying data from pages in a select one of the UBs to pages in the SLC SBs, and copying data from the pages in the SLC SBs to pages in a select MLC SB not determined to be a UB.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: November 2, 2021
    Assignee: SK hynix Inc.
    Inventors: Igor Novogran, Andrei Konan
  • Patent number: 11157483
    Abstract: Embodiments of the present disclosure provide methods, systems, apparatuses, and computer program products for digital content auditing in a group based communication repository, where the group based communication repository comprises a plurality of enterprise-based digital content objects organized among a plurality of group-based communication channels. In one embodiment, a computing entity or apparatus is configured to receive an enterprise audit request, where the enterprise audit request comprises an audit credential and digital content object retrieval parameters. The apparatus is further configured to determine if the audit credential satisfies an enterprise authentication protocol.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: October 26, 2021
    Assignee: Slack Technologies, LLC
    Inventors: Brenda Jin, Britton Jamison
  • Patent number: 11157365
    Abstract: A solution for processing a stripe in a storage device is provided. Where at least one stripe unit not requiring garbage collection from each stripe of at least two stripes in the storage device is determined, each of the at least two stripes comprises a stripe unit requiring garbage collection and a stripe unit not requiring garbage collection; parity data of data in the determined stripe units not requiring garbage collection is computed and stored into a first idle stripe unit, where the first idle stripe unit and the determined stripe units not requiring garbage collection are in a new stripe in the storage device.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: October 26, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Mingchang Wei, Suhong Wu, Guoyan Huang