Entry Replacement Strategy Patents (Class 711/159)
  • Publication number: 20150106579
    Abstract: Computer-implemented methods and systems for managing data in one or more data storage media are provided. An example method may comprise creating a data structure within the data storage media. The data structure includes a plurality of memory pages, each page comprising a plurality of sessions, and each session comprising a header and a plurality of data objects. The method also comprises enabling writing data to the data storage medium, in response to routine requests, such that the data is recorded to the one or more data objects nearest the current location of a virtual cursor. When a data management operation is performed, the virtual cursor is moved within a single page in a single direction.
    Type: Application
    Filed: October 16, 2013
    Publication date: April 16, 2015
    Applicant: Exablox Corporation
    Inventor: Frank E. Barrus
  • Patent number: 9009412
    Abstract: An information processing apparatus includes a first arithmetic processing unit, a second arithmetic processing unit that is connected to a main storage, and a third arithmetic processing unit. The first arithmetic processing unit includes a cache memory that retains therein data. The second arithmetic processing unit includes a processing unit that notifies, when a read request for the data from the third arithmetic processing unit is not being executed when the replacement request is received, the first arithmetic processing unit of a completion notification indicating that the data has been written back to the main storage and the replacement process is completed and that notifies, when the read request is being executed when the replacement request is received, the first arithmetic processing unit of the completion notification after the read request has ended.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: April 14, 2015
    Assignee: Fujitsu Limited
    Inventors: Go Sugizaki, Naoya Ishimura
  • Patent number: 9009409
    Abstract: A method to store objects in a memory cache is disclosed. A request is received from an application to store an object in a memory cache associated with the application. The object is stored in a cache region of the memory cache based on an identification that the object has no potential for storage in a shared memory cache and a determination that the cache region is associated with a storage policy that specifies that objects to be stored in the cache region are to be stored in a local memory cache and that a garbage collector is not to remove objects stored in the cache region from the local memory cache.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: April 14, 2015
    Assignee: SAP SE
    Inventors: Galin Galchev, Frank Kilian, Oliver Luik, Dirk Marwinski, Petio G. Petev
  • Publication number: 20150100730
    Abstract: Freeing memory safely with low performance overhead in a concurrent environment is described. An example method includes creating a reference count for each sub block in a global memory block, and each global memory block includes a plurality of sub blocks aged based on respective allocation time. A reference count for a first sub block is incremented when a thread operates a collection of data items and accesses the first sub block for a first time. Reference counts for the first sub block and a second sub block are lazily updated. Subsequently, the sub blocks are scanned through in the order of their age until a sub block with a non-zero reference count is encountered. Accordingly, one or more sub blocks whose corresponding reference counts are equal to zero are freed safely and with low performance overhead.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Applicant: Sybase, Inc.
    Inventor: Vivek Kandiyanallur
  • Patent number: 9003103
    Abstract: A storage set (e.g., an array of hard disk drives) may experience a failure, such as a loss of power, a software crash, or a disconnection of a storage device, while writes to the storage set are in progress. Recover from the failure may involve scanning the storage set to detect and correct inconsistencies (e.g., comparing mirrors of a data set or testing checksums). However, lacking information about the locations of pending writes to the storage set during the failure, this “cleaning” process may involve scanning the entire storage set, resulting in protracted recovery processes. Presented herein are techniques for tracking writes to the storage set by apportioning the storage set into regions of a region size (e.g., one gigabyte), and storing on the nonvolatile storage medium descriptors of “dirty” regions comprising in-progress writes. The post-failure recovery process may then be limited to the regions identified as dirty.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: April 7, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Emanuel Paleologu, Karan Mehra, Darren Moss
  • Publication number: 20150095559
    Abstract: A system for storing data comprises a performance storage unit and a performance segment storage unit. The system further comprises a determiner. The determiner determines whether a requested data is stored in the performance storage unit. The determiner determines whether the requested data is stored in the performance segment storage unit in the event that the requested data is not stored in the performance storage unit.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 2, 2015
    Inventor: R. Hugo Patterson
  • Patent number: 8996814
    Abstract: The described implementations relate to computer memory. One implementation provides a technique that can include providing stealth memory to an application. The stealth memory can have an associated physical address on a memory device. The technique can also include identifying a cache line of a cache that is mapped to the physical address associated with the stealth page, and locking one or more other physical addresses on the memory device that also map to the cache line.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: March 31, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Marcus Peinado, Taesoo Kim
  • Patent number: 8996796
    Abstract: A first portion of an asymmetric memory is configured as temporary storage for application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory. A portion of the remaining asymmetric memory is configured as a reconciled storage for application data units with varying sizes. A first application data unit is received for writing to the asymmetric memory. Based on computing the size of the first application data unit as corresponding to the small memory block, the first application data unit is written to the temporary storage. Upon determining that a threshold is reached, a memory write operation is performed for writing the application data units from the temporary storage to the reconciled storage. The application data units written to the reconciled storage are removed from the temporary storage.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 31, 2015
    Assignee: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Ashish Singhai, Shibabrata Mondal, Swamy Gowda
  • Publication number: 20150089169
    Abstract: A method according to one embodiment includes selecting, by a processor, one of a WORM logical data object and a read-write logical data object for reuse as a new WORM logical data object, said processor maintaining data attributes bound to said selected logical data object until it is determined that said selected logical data object is available for reuse. At least one temporary data attribute is assigned to said selected logical data object while maintaining said data attributes bound to said selected logical data object The selected logical data object is mounted and a write command to beginning of logical data object is received to bind at least one data attribute to said selected logical data object to replace data attributes and data associated with said selected logical data object to reuse said selected logical data object as said new WORM logical data object.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 26, 2015
    Inventors: Thomas W. Bish, Erika M. Dawson, Jonathan W. Peake, Joseph M. Swingler, Michael W. Wood
  • Patent number: 8990510
    Abstract: A method, system and computer program product for managing requests for deferred updates to shared data elements while minimizing grace period detection overhead associated with determining whether pre-existing references to the data elements have been removed. Plural update requests that are eligible for grace period detection are buffered without performing grace period detection processing. One or more conditions that could warrant commencement of grace period detection processing are monitored while the update requests are buffered. If warranted by such a condition, grace period detection is performed relative to the update requests so that they can be processed. In this way, grace period detection overhead can be amortized over plural update requests while being sensitive to conditions warranting prompt grace period detection.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Paul E. McKenney, Orran Y. Krieger, Jonathan Appavoo, Dipankar Sarma
  • Patent number: 8990504
    Abstract: A cache page management method can include paging out a memory page to an input/output controller, paging the memory page from the input/output controller into a real memory, modifying the memory page in the real memory to an updated memory page and purging the memory page paged to the input/output controller.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Tara Astigarraga, Michael E. Browne, Joseph Demczar, Eric C. Wieder
  • Patent number: 8990531
    Abstract: Activity level of memory pages is classified in virtual machine environment, so that processes such as live VM migration and checkpointing, among others, can be carried out more efficiently. Because each such hypervisor-based service may desire classification of activity levels of memory pages at different frequencies and different time granularities, the hypervisor supports methods to classify activity levels of memory pages for a plurality of time intervals.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: March 24, 2015
    Assignee: VMware, Inc.
    Inventor: Irfan Ahmad
  • Publication number: 20150081992
    Abstract: The disclosure involves a method for saving data from webpages. The method can be realized through the following steps: when the request of saving data from a target webpage is received, whether assigned saving space is big enough for storing all the data from a target webpage is judged in the beginning; if the assigned saving space is not big enough to store all the data from the target webpage, estimate the number of page views of the current collection of webpages in the next pre-set circle and the current collection of webpages is correspondent to webpage data saved in the saving space; based on the estimated amount of page view, eliminate webpage data saved in the saving space in order to make the saving space have the ability to save all the webpage data of the collection of the webpages mentioned above; and then all the webpage data of the collection of the webpages mentioned above is saved in the space. The disclosure also provides a device for storing webpage data.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Applicant: Tencent Technology (Shenzhen) Company Limited
    Inventor: Bing CAI
  • Publication number: 20150081991
    Abstract: Upon receipt of an instruction to access a logical address of a storage medium, an information processing apparatus controls access to its corresponding physical address of the storage medium. A management unit manages mapping between a continuous series of logical addresses and discrete physical addresses skipping a predetermined number of replacement areas. A controller identifies to which physical address the received logical address is mapped, and controls access to the storage medium using the identified physical address. When a defect occurs in a storage area indicated by a physical address, the information processing apparatus remaps its corresponding logical address to a replacement area adjacent to the defective physical address.
    Type: Application
    Filed: November 20, 2014
    Publication date: March 19, 2015
    Inventor: Akihito HIDAKA
  • Patent number: 8984240
    Abstract: Page faults during partition migration from a source computing system to a destination computing system are reduced by assigning each page used by a process as being hot or cold according to their frequency of use by the process. During a live partition migration, the cold or coldest (least frequently used) pages are copied to the destination server first, followed copying the warmer (less frequently used) and concluded by copying the hottest (most frequently used) pages. After all dirtied pages have been refreshed, cutover from the instance on the source server to the destination server is made. By transferring the warm and hot pages last (or later) in the migration process, the number of dirtied pages is reduced, thereby reducing page faults subsequent to the cutover.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: March 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Vishal C. Aslot, Adekunle Bello, Brian W. Hart
  • Publication number: 20150074361
    Abstract: Systems and methods for identification of data stored in memory are provided. A data packet is received and a first packet byte within the data packet is compared to a first memory byte within a memory. A mismatch is determined between the first packet byte and the first memory byte. A memory location is accessed that contains a second memory byte that is non-consecutive with the first memory byte. A packet location accessed that contains a second packet byte that is non-consecutive with the first packet byte. The second packet byte is compared to the second memory byte. A retrieval instruction is generated based at least in part on a result of the comparison between the second packet byte and the second memory byte. Various embodiments may be included in a network memory architecture to allow for faster data matching and instruction generation in a central appliance.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 12, 2015
    Inventors: David Anthony Hughes, Zhigang Yin, John Burns
  • Patent number: 8977826
    Abstract: A method, system, and computer program product for ordering a plurality of data IO captured at a primary site to be applied at a secondary site, comprising removing the one or more extent level portions from the captured data IO, determining if the one or more extent level portions are time sequenced to overwrite a portion of data of the data IO, based on a determination that the portion data is to be overwritten, removing the overwritten portion of data from the plurality of the data IO and ordering the one or more extent level portions to be applied at the secondary site before the captured data IO.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: March 10, 2015
    Assignee: EMC Corporation
    Inventors: David Meiri, Dan Arnon, Benjamin W. Yoder, Mark J. Halstead, Assaf Natanzon
  • Patent number: 8966196
    Abstract: A method for managing memory of a device is disclosed. A computer system collects information about use, by the device, of data in the memory of the device. The information collected by the computer system includes a time and a location for which each portion of the data is used by the device. The computer system identifies patterns of use, by the device, of each portion of the data based on the information collected. The computer system then selects one or more portions of the data that are not needed in the memory of the device based on the patterns of use by the device.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Al Chakra, John A. Feller, Trudy L. Hewitt, Francesco C. Schembari
  • Patent number: 8966195
    Abstract: A system and method is illustrated for identifying an Input/Output (I/O) driver module, using a hypervisor, to receive a read command to read a virtual memory page from a remote memory location. Further, the system and method includes reading the remote virtual memory page, using the I/O driver module, into a memory buffer managed by the I/O driver module. Additionally, the system and method includes storing the virtual memory page in the memory buffer to a persistent storage device. The system and method also includes identifying a remote super page, using a hypervisor, the remote super page including a remote sub page. Additionally, the system and method includes identifying a local super page, using the hypervisor, the local super page including a local sub page. Further, the system and method includes swapping the local sub page for the remote sub page, using the hypervisor, the swapping occurring over a network.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: February 24, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Kevin Lim, Partha Ranganathan
  • Patent number: 8966213
    Abstract: Provided are a computer program product, system, and method for granting and revoking supplemental memory allocation requests. Supplemental memory allocations of memory resources are granted to applications following initial memory allocations of the memory resources to the applications. In response to determining that available memory resources have fallen below an availability threshold, determining a weighting factor for each supplemental memory allocation based on at least one of an amount of the memory resources allocated to the supplemental memory allocation and a measured duration during which the memory resources have been allocated. At least one of the supplemental memory allocations is selected to revoke based on the determined weighting factors of the supplemental memory allocations.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Derek Logan Erdmann, David C. Reed, Thomas C. Reed, Max D. Smith
  • Publication number: 20150046667
    Abstract: A method includes computing, in a local storage system having a local volume with a plurality of local regions, respective local checksum signatures over the local regions, and computing, in a remote storage system having a remote volume with remote regions in a one-to-one correspondence with the local regions, respective remote checksum signatures over the remote regions. A given remote region is identified, the given remote region having a given remote signature and a corresponding local region with a given local signature that does not match the given remote signature. The data in the given remote region is then replaced with data from the corresponding local region.
    Type: Application
    Filed: October 24, 2014
    Publication date: February 12, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ram ELRON, Ehood GARMIZA, Haim HELMAN, Assaf NITZAN
  • Publication number: 20150046666
    Abstract: A memory system includes: a memory controller configured to change data to be stored in memory cells according to an address of a weak cell in order to store changed data having a lower program level than a highest program level among a plurality of program levels in peripheral cells adjacent to the weak cell; and a memory device configured to execute a program loop in order to store the changed data in a selected page.
    Type: Application
    Filed: October 25, 2013
    Publication date: February 12, 2015
    Applicant: SK hynix Inc.
    Inventors: Yun Kyoung LEE, Jung Ryul AHN
  • Patent number: 8954692
    Abstract: A file protecting method and system and a memory controller and a memory storage apparatus using the same are provided. The file protecting method includes performing a file protection enabling procedure for a file to generate an entry value backup according to at least one entry value corresponding to at least one cluster storing the file, which is recorded in a file allocation document, store the entry value backup in a secure storage area and change the entry value corresponding to the cluster storing the file in the file allocation document, wherein the file cannot be read according to the changed entry value. Accordingly, the file stored in the memory storage apparatus the can be effectively protected from being accessed by an un-authorized person.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: February 10, 2015
    Assignee: Phison Electronics Corp.
    Inventor: Chien-Fu Lee
  • Patent number: 8954789
    Abstract: Method and system for performing recovery for a replicated copy of a storage space presented as a logical object is provided. An attribute associated with the logical object for enabling the recovery is set and when the storage space is replicated the attribute is stored as metadata for the replicated copy of the storage space. Based on the attribute, a clone of the logical object is presented as a writable option to write to the first replicated copy. After the write operation where information is written to the clone, a second replicated copy with the clone information is created. The clone is deleted after the second copy is generated.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: February 10, 2015
    Assignee: NetApp, Inc.
    Inventors: Muralidharan Rangachari, Anagha Barve, Vineeth Karinta
  • Patent number: 8949556
    Abstract: An apparatus and computer program product for managing memory of a device is disclosed. A computer system collects information about use, by the device, of data in the memory of the device. The information collected by the computer system includes a time and a location for which each portion of the data is used by the device. The computer system identifies patterns of use, by the device, of each portion of the data based on the information collected. The computer system then selects one or more portions of the data that are not needed in the memory of the device based on the patterns of use by the device.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Al Chakra, John A. Feller, Trudy L. Hewitt, Francesco C. Schembari
  • Patent number: 8943269
    Abstract: A data block storage management capability is presented. A file system includes a plurality of data blocks which are managed using a first storage service and a second storage service, where the first storage service has a lower storage cost and a higher input-output cost than the second storage service. The data blocks stored using the second storage service have associated therewith respective expected storage durations indicative of respective lengths of time for which the data blocks are to be stored using the second storage service (which may be the same or different across the ones of the data blocks stored using the second storage service). The expected storage durations of the data blocks are modified based on a comparison of an expected hit rate of the second storage service and a current hit rate of the second storage service or current hit rates of the data blocks.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: January 27, 2015
    Assignee: Alcatel Lucent
    Inventors: Krishna P. Puttaswamy Naga, Murali Kodialam
  • Patent number: 8943276
    Abstract: A plurality of tracks is examined for meeting criteria for a discard scan. In lieu of waiting for a completion of a track access operation, at least one of the plurality of tracks is marked for demotion. An additional discard scan may be subsequently performed for tracks not previously demoted. The discard and additional discard scans may proceed in two phases.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 27, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael T. Benhase, Lokesh M. Gupta, Carol S. Mellgren, Kenneth W. Todd
  • Patent number: 8935460
    Abstract: A memory apparatus includes first memory chip and second memory chip; and a control unit configured to manage a global reserved area, a first virtual area for the first memory chip, and a second virtual area for the second memory chip, wherein the first virtual area includes a first user area and a first reserved area, the second virtual area includes a second user area and a second reserved area, the global reserved area includes a first plurality of reserved blocks corresponding to the first reserved area and a second plurality of reserved blocks corresponding to the second reserved area, and the control unit is configured to assign a second virtual block included in the global reserved area to the first user area if the control unit detects a first virtual block included in the first user area is a bad block.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-ho Park, Seong-jun Ahn, Min-cheol Kwon
  • Patent number: 8930630
    Abstract: The present disclosure relates to a cache memory controller for controlling a set-associative cache memory, in which two or more blocks are arranged in the same set, the cache memory controller including a content modification status monitoring unit for monitoring whether some of the blocks arranged in the same set of the cache memory have been modified in contents, and a cache block replacing unit for replacing a block, which has not been modified in contents, if some of the blocks arranged in the same set have been modified in contents.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: January 6, 2015
    Assignee: Sejong University Industry Academy Cooperation Foundation
    Inventor: Gi Ho Park
  • Patent number: 8930653
    Abstract: Technologies for eliminating duplicate data within a storage system. De-duplication may be performed done at physical chunk level, where the data is not copied or moved to different location. A logical mapping is modified using a thin de-duplication kernel module that resides between a distributed volume manager (DVM) and a logical disk (LD). De-duplication is achieved by changing pointers in the mapping to land at a physical location. De-duplication is performed as post-process feature where duplicates are indentified and the duplicates are marked in the mapping table, thereby claiming free space through de-duplication. Block-level de-duplication in accordance with the above can co-exist with existing storage architectures for thin provisioning and snapshot management.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: January 6, 2015
    Assignee: American Megatrends, Inc.
    Inventors: Narayanan Balakrishnan, Senthilkumar Ramasamy, Anandh Mahalingam, Udita Chatterjee
  • Publication number: 20150006793
    Abstract: Provided are a host device, a storage device, a storage system and operating methods thereof. The host device includes a duplicated information updater configured to update pre-stored duplicated information in response to a write request or a delete request for duplicated data, and a transferor configured to transfer the updated duplicated information to a storage device in which the same data as the duplicated data is stored.
    Type: Application
    Filed: June 30, 2014
    Publication date: January 1, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-jung SHIN, Jung-Min SEO, Ju-Pyung LEE
  • Patent number: 8924673
    Abstract: A method in one embodiment for operating a virtual server supporting at least one Write Once Read Many (WORM) logical data object and at least one read-write logical object includes initializing a logical data object from a common pool of the logical data objects, the logical data object bound with a member of a media type group, the member of the media type group comprising a WORM logical data object and a read-write logical data object; and reusing one of the logical data objects as the member of the media type group without ejection and reinsertion by mounting the logical data object with a write from beginning of logical data object to bind at least one data attribute to the member of the media type group to replace any previous attribute and data associated with the logical data object.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: December 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Thomas W. Bish, Erika M. Dawson, Jonathan W. Peake, Joseph M. Swingler, Michael W. Wood
  • Patent number: 8924664
    Abstract: The presently disclosed subject matter includes a method and system for enabling the deletion of logical objects characterized by an object identifier (OID). Upon restart following a system interruption, one or more logical objects are identified, each object being addressed by an interrupted delete request. For each identified logical object performing a deletion, the deletion including: reading one or more physical blocks stored in a physical storage space, wherein the one or more physical blocks were linked to the identified logical object before the system interruption, each of the physical blocks includes an OID stored therein indicating a logical object currently linked to the respective physical block; obtaining OIDs stored respectively in the one or more physical blocks; and freeing those physical blocks from among the one or more physical blocks, which store an OID identical to the respective OID of the identified logical object.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: December 30, 2014
    Assignee: Infinidat Ltd.
    Inventor: Israel Gold
  • Patent number: 8924663
    Abstract: The storage system includes a first auxiliary storage device, a second auxiliary storage device, and a main storage device, and also includes a data management unit which stores and keeps, in the main storage device, index data based on feature data by referring to the feature data of storage target data stored in the first auxiliary storage device, and if the index data stored and kept in the main storage device reaches a preset amount, stores and keeps, in the second auxiliary storage device, the index data stored and kept in the main storage device, and deletes the index data stored and kept in the second auxiliary storage device from the main storage device.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: December 30, 2014
    Assignee: NEC Corporation
    Inventors: Jerzy Szczepkowski, Michal Welnicki, Cezary Dubnicki
  • Patent number: 8924677
    Abstract: Memory management techniques that permit an executing process to store content in memory and later retrieve that content from the memory, but that also permit a memory manager to discard that content to address memory pressure. A process executing on a computing device may notify a memory manager of the computing device that first memory space allocated to the process contains first content that is available for discard. If the memory manager detects the computing device is experiencing memory pressure, the memory manager may address the memory pressure by selecting memory space available for discard and discarding the content of the memory space. Before a process reuses content made available for discard, the process may notify the memory manager of the intent to reuse and, in response, receive empty memory and an indication that the content was discarded or receive an indication that the content is still available for use.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: December 30, 2014
    Assignee: Microsoft Corporation
    Inventors: Steve Pronovost, Maxwell Abernethy, Rudolph Balaz, Ameet Chitre
  • Patent number: 8924662
    Abstract: A method for controlling data flow to a pair of storage devices includes receiving at least one new entry to store in a first storage device or a second storage device in the pair of storage devices and determining a number of entries made to the first and second storage devices out of the at least one new entry. The method also includes calculating a difference between available space in the first storage device and the second storage device, and calculating a number of credits used by the at least one new entry based on the numbers of entries to the first and second storage devices and on the difference in available space.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: December 30, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Brian William Hughes
  • Patent number: 8918601
    Abstract: Processing within a multiprocessor computer system is facilitated by: logically clearing a data page by setting, in association with invalidate page table entry or set storage key processing, a page initialize bit for the data page to a clear data value without physically clearing data from the data page; and subsequent to the setting of the page initialize bit, physically clearing data from the page in central storage responsive to a first access to the page with the page initialize bit set to the clear data value, thereby minimizing overall time required to both clear and subsequently access cleared page data. Setting of the page initialize bit may include setting a line clear bit for each page line to the clear data value, and allocating a state machine to clear each line responsive to the line being first accessed with the its line clear bit set.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventor: Gary A. Woffinden
  • Patent number: 8918602
    Abstract: A TTL value for a data object stored in-memory in a data grid is dynamically adjusted. A stale data tolerance policy is set. Low toleration for staleness would mean that eviction is certain, no matter the cost, and high toleration would mean that the TTL value would be set based on total cost. Metrics to report a cost to re-create and re-store the data object are calculated, and the TTL value is adjusted based on calculated metrics. Further factors, such as, cleanup time to evict data from a storage site, may be considered in the total cost.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Snehal S. Antani, Kulvir S. Bhogal, Nitin Gaur, Christopher D. Johnson, Todd E. Kaplinger
  • Publication number: 20140372715
    Abstract: A memory is made up of multiple pages, and different pages can have different priority levels. A set of memory pages having at least similar priority levels are identified and compressed into an additional set of memory pages having at least similar priority levels. The additional set of memory pages are classified as being the same type of page as the set of memory pages that was compressed (e.g., as memory pages that can be repurposed). Thus, a particular set of memory pages can be compressed into a different set of memory pages of the same type and corresponding to at least similar priority levels. However, due to the compression, the quantity of memory pages into which the set of memory pages is compressed is reduced, thus increasing the amount of data that can be stored in the memory.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 18, 2014
    Inventors: Yevgeniy M. Bak, Mehmet Iyigun, Landy Wang
  • Publication number: 20140372716
    Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. One method for performing an input/output (I/O) request includes mapping an address for at least a first page associated with a virtual I/O request to an entry in a virtual TCE table and identifying a plurality of physical adapters required to service the virtual I/O request. For each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in a physical TCE table corresponding to the physical adapter. This method may also include, in parallel, issuing physical I/O requests to the physical adapters.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Andrew T. KOCH, Kyle A. LUCKE, Nicholas J. ROGNESS, Steven E. ROYER
  • Patent number: 8914593
    Abstract: Embodiments of the invention relate to counter-based entry invalidation for a metadata previous write queue (PWQ). An aspect of the invention includes writing an address into an entry in the metadata PWQ, the address being associated with an instance of metadata received from a pipeline and setting a valid tag associated with the entry in the metadata PWQ to valid. Another aspect of the invention includes initializing a counter to zero and incrementing the counter based on receiving a count signal from the pipeline until the counter is equal to a threshold. Yet another aspect of the invention includes setting the valid tag to invalid based on the counter being equal to the threshold.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: James J. Bonanno, Brian R. Prasky
  • Patent number: 8909880
    Abstract: Method, apparatus, and systems employing novel delayed dictionary update schemes for dictionary-based high-bandwidth lossless compression. A pair of dictionaries having entries that are synchronized and encoded to support compression and decompression operations are implemented via logic at a compressor and decompressor. The compressor/decompressor logic operatives in a cooperative manner, including implementing the same dictionary update schemes, resulting in the data in the respective dictionaries being synchronized. The dictionaries are also configured with replaceable entries, and replacement policies are implemented based on matching bytes of data within sets of data being transferred over the link. Various schemes are disclosed for entry replacement, as well as a delayed dictionary update technique. The techniques support line-speed compression and decompression using parallel operations resulting in substantially no latency overhead.
    Type: Grant
    Filed: October 1, 2011
    Date of Patent: December 9, 2014
    Assignee: Intel Corporation
    Inventors: Ilan Pardo, Ido Y. Soffair, Dror Reif, Debendra Das Sharma, Akshay G. Pethe
  • Patent number: 8909879
    Abstract: Embodiments of the invention relate to counter-based entry invalidation for a metadata previous write queue (PWQ). An aspect of the invention includes writing an address into an entry in the metadata PWQ, the address being associated with an instance of metadata received from a pipeline and setting a valid tag associated with the entry in the metadata PWQ to valid. Another aspect of the invention includes initializing a counter to zero and incrementing the counter based on receiving a count signal from the pipeline until the counter is equal to a threshold. Yet another aspect of the invention includes setting the valid tag to invalid based on the counter being equal to the threshold.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: December 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: James J. Bonanno, Brian R. Prasky
  • Patent number: 8909877
    Abstract: Provided are techniques for managing an amount of real storage used by a database management system. A value of a real storage management parameter is received, wherein the real storage management parameter indicates conditions under which one or more virtual storage pages are analyzed to identify one or more unused, virtual storage pages that are to be discarded. The database management system and consumption of real storage and auxiliary storage is monitored. In response to determining that the value of the real storage management parameter is set to on, the one or more unused virtual storage pages are discarded. In response to determining that the value of the real storage management parameter is set to auto and that paging has occurred, the one or more unused, virtual storage pages are discarded. Health values are recorded.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: December 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jerome P. Kenyon, Nigel G. Slinger, John B. Tobler
  • Patent number: 8904033
    Abstract: Media content is downloaded on a media device. Portions of the media content are buffered successively during the download in a buffer on the device. During the buffering, the buffered portions are read for playback. In the buffer, a non-write buffer region trails behind a current playback read position. Upon the buffering reaching an end of the buffer, the buffering of media content is continued between a buffer beginning and the non-write buffer region.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: December 2, 2014
    Assignee: Adobe Systems Incorporated
    Inventor: Samuli Tapio Kekki
  • Patent number: 8904090
    Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Publication number: 20140351531
    Abstract: A data block storage management capability is presented. A cloud file system management capability manages storage of data blocks of a file system across multiple cloud storage services (e.g., including determining, for each data block to be stored, a storage location and a storage duration for the data block). A cloud file system management capability manages movement of data blocks of a file system between storage volumes of cloud storage services. A cloud file system management capability provides a probabilistic eviction scheme for evicting data blocks from storage volumes of cloud storage services in advance of storage deadlines by which the data blocks are to be removed from the storage volumes. A cloud file system management capability enables dynamic adaptation of the storage volume sizes of the storage volumes of the cloud storage services.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Applicant: ALCATEL LUCENT
    Inventors: Krishna P. Puttaswamy Naga, Thyagarajan Nandagopal, Muralidharan S. Kodialam
  • Publication number: 20140351530
    Abstract: Embodiments relate to a linked list for memory allocation. An aspect includes maintaining a linked list of address ranges in a computer memory that are available for allocation. Another aspect includes receiving a request for allocation of a first address range, the request comprising a size of the first address range. Another aspect includes traversing the linked list to determine an available address range having a size that is greater than or equal to the size of the first address range. Another aspect includes determining whether there is interference in the linked list. Another aspect includes, based on determining that there is no interference in the linked list, removing determined address range from the linked list. Another aspect includes, based on determining that there is interference in the linked list, restarting the traversing of the linked list.
    Type: Application
    Filed: May 22, 2013
    Publication date: November 27, 2014
    Applicant: International Business Machines Corporation
    Inventors: Daniel J. Dietterich, Maged M. Michael
  • Patent number: 8898389
    Abstract: A mechanism is provided for managing a high speed memory. An index entry indicates a storage unit in the high speed memory. A corresponding non-free index is set for a different type of low speed memory. The indicated storage unit in the high speed memory is assigned to a corresponding low speed memory by including the index entry in the non-free index. The storage unit in the high speed memory is recovered by demoting the index entry from the non-free index. The mechanism acquires a margin performance loss corresponding to a respective non-free index in response to receipt of a demotion request. The mechanism compares the margin performance losses of the respective non-free indexes and selecting a non-free index whose margin performance loss satisfies a demotion condition as a demotion index and selects an index entry from the demotion index to perform the demotion operation.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Xue D. Gao, Chao G. Li, Yang Liu, Yi Yang
  • Patent number: 8898405
    Abstract: A method for static wear leveling in non-violate storage device is disclosed. Use the method to balance all blocks' erasure counts to avoid most blocks having smaller erasure count and several blocks having larger erasure count to shorten the life time of the device.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: November 25, 2014
    Assignee: Storart Technology Co. Ltd
    Inventor: Yen Chih Nan