Entry Replacement Strategy Patents (Class 711/159)
  • Patent number: 9740628
    Abstract: A method includes identifying, by a processor, a first page table entry (PTE) of a page table for translating virtual addresses to main storage addresses, the page table comprising a second page table entry contiguous with the second page table entry, determining with the processor whether the first PTE may be joined with the second PTE, the determining based on the respective pages of main storage being contiguous, and setting a marker in the page table for indicating that the main storage pages of identified by the first PTE and second PTEs are contiguous.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: August 22, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Bybell, Michael K. Gschwind
  • Patent number: 9727257
    Abstract: A request to delete a snapshot of a virtual machine may be received. The snapshot may be in a volume chain that may include a first storage volume, a second storage volume associated with the snapshot, and a third storage volume. The first storage volume may include a first storage reference. The second storage volume may include a second storage reference. The third storage volume may include a third storage reference relative to the second storage reference. The second storage volume may be merged with the first storage volume preceding the second storage volume in the volume chain. The third storage reference may be updated to be relative to the first storage reference in view of the second storage reference. The snapshot and the second storage volume may be deleted.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: August 8, 2017
    Assignee: Red Hat, Inc.
    Inventors: Adam Litke, Federico Simoncelli
  • Patent number: 9723587
    Abstract: Embodiments of the present invention provide a movement information processing method and system, a user equipment, and an access network device. In one embodiment, a UE measures a characteristic parameter of a cell to be measured, and then obtains movement information of the UE according to a change of the characteristic parameter within a predetermined time. In this way, the UE can send the movement information to an access network device and the access network device executes a movement-related operation according to the movement information.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: August 1, 2017
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wei Quan, Yuhua Chen, Yi Jiang
  • Patent number: 9690487
    Abstract: Upon receipt of an I/O request instructing storage of data in a storage device 106 from a host apparatus, a storage apparatus 100 selects a de-duplication process method to be applied to the received data, based on at least any of influence on processing performance of the storage apparatus 100 to be performed by execution of a first de-duplication process method (inline method) in which the de-duplication process is performed on the data immediately after the receipt of the I/O request, influence on the processing performance of the storage apparatus 100 to be performed by execution of a second de-duplication process method (post-process method) in which the de-duplication process is performed on the data at later timing, and the size of a temporary storage device 106b to be required for the processing of the data by the second de-duplication process method.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: June 27, 2017
    Assignee: HITACHI, LTD.
    Inventors: Mitsuo Hayasaka, Koji Yamasaki
  • Patent number: 9690802
    Abstract: Stream locality delta compression is disclosed. A previous stream indicated locale of data segments is selected. A first data segment is then determined to be similar to a data segment in the stream indicated locale.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: June 27, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Mark Huang, Philip Shilane, Grant Wallace, Nitin Garg, Edward K. Lee, Ming Benjamin Zhu, Kai Li
  • Patent number: 9684679
    Abstract: Aspects for conservative garbage collecting are disclosed. In one aspect, root objects included in a call stack are identified, which comprise integers and pointers. Integer representations are tagged and distinguishable from untagged pointer representations. Root objects are traced to corresponding memory locations such that a subsequent tracing is performed on the pointer representations and skipped on the integer representations. Memory allocated to objects unreachable by the call stack is then freed. In another aspect, an object graph associated with a call stack is tagged, and a heap is generated comprising objects included in an executed portion of the call stack. Objects included in an unexecuted portion of the call stack are traced to corresponding memory locations on the heap such that a subsequent tracing is only performed on the untagged pointer representations. Memory locations corresponding to heap objects unreachable by the unexecuted portion of the call stack are then cleared.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: June 20, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventors: Steven Lucco, Curtis Cheng-Cheng Man
  • Patent number: 9665478
    Abstract: A non-volatile memory is divided into logical zones by the card controller in order reduce the size of the data structures it uses for address translation. Zone boundaries are adjusted to accommodate defects allowed by memory test to improve card yields and to adjust boundaries in the field to extend the usable lifetime of the card. Firmware scans for the presence of defective blocks on the card. Once the locations of these blocks are known, the firmware calculates the zone boundaries in such a way that good blocks are equally distributed among the zones. Since the number of good blocks meets the card test criteria by the memory test criteria, defects will reduce card yield fallout. The controller can perform dynamic boundary adjustments. When defects occur, the controller can perform the analysis again and, if needed, redistributes the zone boundaries, moving any user data.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: May 30, 2017
    Assignee: INNOVATIVE MEMORY SYSTEMS, INC.
    Inventor: Kevin M. Conley
  • Patent number: 9665603
    Abstract: A database management system provides row based filtering of data at a database level by evaluating content of at least one record of a write data request received from an application for a particular table from among at least one table of a database, against at least one filter rule specified for the particular table. The database management system selects, for the at least one record, whether to store the at least one record of the write data request as a separate row in the particular table based on a separate action triggered for the at least one record when evaluated against the at least one filter rule specified for the particular table, each record not selected for storage being silently discarded.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: May 30, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Karla Bester, Allan T. Chandler, Mark A. Shewell, Stephen J. Yates
  • Patent number: 9665497
    Abstract: A storage device made up of multiple storage media is configured such that one such media serves as a cache for data stored on another of such media. The device includes a controller configured to manage the cache by consolidating information concerning obsolete data stored in the cache with information concerning data no longer desired to be stored in the cache, and erase segments of the cache containing one or more of the blocks of obsolete data and the blocks of data that are no longer desired to be stored in the cache to produce reclaimed segments of the cache.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: May 30, 2017
    Assignee: NIMBLE STORAGE, INC.
    Inventor: Umesh Maheshwari
  • Patent number: 9645637
    Abstract: Embodiments include method, systems and computer program products for searching a social network for media content. Aspects include identifying one or more available resources for execution by the processor, determining a maximum number of resources the processor can utilize in executing an instruction group, and grouping the one or more available resources into one or more resource groups, wherein each of the one or more resource groups has a size equal to the maximum number. Aspects also include receiving a request from a decode logic for a number of resources for execution and dispatching one of the one or more resource groups in response to the request by providing the number of resources for execution to the processor and sending remaining resources in the one of the one or more resource groups to a recycle queue.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: May 9, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory W. Alexander, Brian D. Barrick
  • Patent number: 9632928
    Abstract: Embodiments of the invention provide a method and system for dynamic memory management implemented in hardware. In an embodiment, the method comprises storing objects in a plurality of heaps, and operating a hardware garbage collector to free heap space. The hardware garbage collector traverses the heaps and marks selected objects, uses the marks to identify a plurality of the objects, and frees the identified objects. In an embodiment, the method comprises storing objects in a heap, each of at least some of the objects including a multitude of pointers; and operating a hardware garbage collector to free heap space. The hardware garbage collector traverses the heap, using the pointers of some of the objects to identify others of the objects; processes the objects to mark selected objects; and uses the marks to identify a group of the objects, and frees the identified objects.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: David F. Bacon, Perry S. Cheng, Sunil K. Shukla
  • Patent number: 9582385
    Abstract: In one embodiment, a method may include performing a copy-on-write in response to a write error from a first system, where the copy-on-write copies to a second system. The method may further include receiving a write request at the first system from a third system. The method may additionally include storing the data from the write request in a cache. The method may also include reporting successful execution of the write request. The method may further include writing data from the write request to a drive in the first system. The method may additionally include receiving the write error from the drive. In an additional embodiment, performing the copy-on-write may use the data stored in the cache.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: February 28, 2017
    Assignee: Dell Products L.P.
    Inventors: Bernard Abraham Rozmovits, Jeffrey R. Curless, Damon Hsu-Hung
  • Patent number: 9575816
    Abstract: A microprocessor includes a main processor and a service processor. The service processor is configured to detect and break a deadlock/livelock condition in the main processor. The service processor detects the deadlock/livelock condition by detecting the main processor has not retired an instruction or completed a processor bus transaction for a predetermined number of clock cycles. In response to detecting the deadlock/livelock condition in the main processor, the service processor causes arbitration requests to a cache memory to be captured in a buffer, analyzes the captured requests to detect a pattern that may indicate a bug causing the condition and performs actions associated with the pattern to break the deadlock/livelock. The actions include suppression of arbitration requests to the cache, suppression of comparisons cache request addresses and killing requests to access the cache.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: February 21, 2017
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Rodney E. Hooker, Douglas R. Reed
  • Patent number: 9569476
    Abstract: Approaches for routing data to storage are provided. An approach includes determining implicit metadata from explicit metadata received with a request from a user to store a file. The approach also includes determining a storage resource based on the explicit metadata, the implicit metadata, and a registry of storage resources. The approach additionally includes routing data of the file to the determined storage resource.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: February 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ryan G. Dejana, Lisa Seacat Deluca, Brian D. Goodman, Daniel C. Krook
  • Patent number: 9558112
    Abstract: A data storage device includes multiple flash memory devices with each of the flash memory devices being arranged into multiple blocks having multiple pages for storing data. The data storage device includes a memory controller operationally coupled with the flash memory devices. The memory controller is configured to mark one or more of the pages of the flash memory devices as available for deletion and maintain the marked pages as available for being read until deleted during garbage collection.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: January 31, 2017
    Assignee: Google Inc.
    Inventor: Albert T. Borchers
  • Patent number: 9542233
    Abstract: Embodiments include method, systems and computer program products for searching a social network for media content. Aspects include identifying one or more available resources for execution by the processor, determining a maximum number of resources the processor can utilize in executing an instruction group, and grouping the one or more available resources into one or more resource groups, wherein each of the one or more resource groups has a size equal to the maximum number. Aspects also include receiving a request from a decode logic for a number of resources for execution and dispatching one of the one or more resource groups in response to the request by providing the number of resources for execution to the processor and sending remaining resources in the one of the one or more resource groups to a recycle queue.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 10, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gregory W. Alexander, Brian D. Barrick
  • Patent number: 9529706
    Abstract: A system, method, and computer program product are provided for performing software application operations concurrently with memory compaction operations. In use, one or more memory blocks to optimize utilizing a memory compaction operation are identified. Additionally, one or more data objects associated with the one or more memory blocks are identified, the one or more data objects being a portion of a plurality of data objects in a memory capable of being access by a software application. Further, the memory compaction operation is initiated utilizing a request including business related information associated with the one or more data objects.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: December 27, 2016
    Assignees: Amdocs Software Systems Limited, Amdocs Development Limited
    Inventors: Victoria Boriskovsky, Michael Goltsman, Vladimir Polonsky
  • Patent number: 9524233
    Abstract: A technique for efficient swap space management creates a swap reservation file using thick provisioning to accommodate a maximum amount of memory reclamation from a set of one or more associated virtual machines (VMs). A VM swap file is created for each VM using thin provisioning. When a new block is needed to accommodate page swaps to a given VM swap file, a block is removed from the swap reservation file and a block is added to the VM swap file, thereby maintaining a net zero difference in overall swap storage. The removed block and the added block may be the same storage block if a block move operation is supported by a file system implementing the swap reservation file and VM swap files. The technique also accommodates swap space management of resource pools.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: December 20, 2016
    Assignee: VMware, Inc.
    Inventors: Rajesh Venkatasubramanian, Ishan Banerjee, Kiran Tati, Philip Peter Moltmann
  • Patent number: 9514838
    Abstract: Memory controllers can include a switch and non-volatile memory control circuitry including channel control circuits coupled to the switch. The channel control circuits can coupled to logical units including blocks. Volatile memory and memory management circuitry including local memory can be coupled to the switch. The memory management circuitry can be configured to store health and status information for each of the blocks in a block table in the volatile memory, store a candidate block table that identifies a candidate block for a particular operation based on criteria in the local memory, update the health and status information for a particular block in the block table, compare the updated health and status information for the particular block with the candidate block according to the criteria, and update the candidate block table to identify the particular block in response to the comparison indicating that the particular block better satisfies the criteria.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: December 6, 2016
    Assignee: Micron Technology, Inc.
    Inventor: A. Kent Porterfield
  • Patent number: 9501314
    Abstract: A system and method for reducing the number of aborts caused by a runtime helper being called during the execution of a transaction block. When a runtime helper is called during the execution of a transaction block while a program using hardware transactional memory is running, the runtime helper passes ID information indicating the type of runtime helper to an abort handler. When there is an abort caused by a call to a runtime helper, the abort handler responds by acquiring the ID information of the runtime helper that caused the abort, disables the transaction block with respect to a specific type of runtime helper, executes the non-transactional path corresponding to the transaction block, and re-enables the transaction block when predetermined conditions are satisfied.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: November 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jose G. Castanos, Takuya Nakaike, Rei Odaira, Peng Wu
  • Patent number: 9495191
    Abstract: Systems and methods for implementing lazy disk I/O in virtual machine live migration. An example method may comprise: determining, by a first computer system, that contents of a memory page mapped into an address space of a virtual machine undergoing live migration from a second computer system to the first computer system is stored on a network-accessible virtual disk; storing, in a memory data structure, a mapping of an address of the memory page to an identifier of a location of the memory page on the virtual disk; and responsive to detecting an access to the memory page by the virtual machine, storing in a memory mapped into the address space of the virtual machine the memory page retrieved from the location of the memory page on the virtual disk.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: November 15, 2016
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 9471507
    Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 18, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideki Yoshida, Tatsunori Kanai, Masaya Tarui, Yutaka Yamada
  • Patent number: 9449032
    Abstract: Embodiments provide a multi-buffering system in an application layer to support unified read/write access to different data source types of an underlying database layer. In a particular embodiment, the database layer comprises both a multi-dimensional data source (e.g. a cube), and another data source type (e.g. a Data Store Object—DSO). An abstract buffer component of the multi-buffering system is specialized into a delta buffer configured to read/write data of the cube, and into an after image buffer configured to read/write data of the DSO. A storage mechanism component of the multi-buffering system is specialized into a cache store configured to read/write data of the cube, and a calculation scenario store configured to read/write data of the DSO. The after image buffer may support certain aggregation rules during a DSO read/write operation. The calculation scenario store may leverage capabilities of an in memory database during a DSO read/write operation.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: September 20, 2016
    Assignee: SAP SE
    Inventors: Martin Friedt, Hans-Georg Beuter, Helidon Dollani, Michael Wilking, Gregor Dieckmann, Ingo Raasch, Stefan Dipper
  • Patent number: 9448871
    Abstract: An information processing device includes a memory, and a plurality of processors coupled to the memory and including cache memories, and configured to select a processor where a capacity of the cache memory is the smallest among the plurality of processors, the selected processor executes memory dump processing for the memory.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: September 20, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Yasuo Suzuki
  • Patent number: 9424114
    Abstract: Systems and methods are disclosed for processing an input/output (I/O) operation. An example system includes a kernel interface that receives a notification of a page fault. The page fault is responsive to an application attempting to perform an operation on a memory region that is set to a first access mode. When the memory region is set to the first access mode, the application does not have permission to perform the operation on the memory region. The system also includes a handler that responsive to the notification (i) sets the memory region to a second access mode and (ii) spawns a kernel thread to drain data from the memory region. When the memory region is set to the second access mode, the application has permission to perform the operation on the memory region. The system further includes an I/O module that stores the data in the memory region for processing.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: August 23, 2016
    Assignee: Red Hat, Inc.
    Inventor: Neil Horman
  • Patent number: 9417977
    Abstract: In one embodiment the present invention includes a system for transaction recovery in a distributed computing environment. The system includes a transaction log server, application servers, and resource servers. The transaction log server stores a shared transaction log. The application servers implement a distributed transaction application and accesses the shared transaction log when performing a transaction using the distributed transaction application. The resource servers store data and that operate with the application servers to access the data according to the transaction. If one of the application servers fails, another application server assumes responsibility for a portion of the shared transaction log that was previously accessed by the failed application server.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 16, 2016
    Assignee: SAP SE
    Inventors: Thomas H. Walter, Ralf Kuersch, Nikolai D. Tankov, Peter H. Peshev
  • Patent number: 9418003
    Abstract: In accordance with embodiments, there are provided mechanisms and methods for conditionally performing garbage collection. These mechanisms and methods for conditionally performing garbage collection include identifying a predetermined portion of memory within a system, comparing one or more aspects of the predetermined portion of memory to a threshold, and conditionally performing garbage collection on the predetermined portion of memory, based on the comparison.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: August 16, 2016
    Assignee: salesforce.com, inc.
    Inventors: Charles J. Hunt, Kiran Paul
  • Patent number: 9405561
    Abstract: A system and method for implementing memory overlays for portable pointer variables. The method includes providing a program executable by a heterogeneous processing system comprising a plurality of a processors running a plurality of instruction set architectures (ISAs). The method also includes providing a plurality of processor specific functions associated with a function pointer in the program. The method includes executing the program by a first processor. The method includes dereferencing the function pointer by mapping the function pointer to a corresponding processor specific feature based on which processor in the plurality of processors is executing the program.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: August 2, 2016
    Assignee: NVIDIA Corporation
    Inventor: Olivier Giroux
  • Patent number: 9401212
    Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: July 26, 2016
    Assignee: Apple Inc.
    Inventors: Avraham Poza Meir, Eyal Gurgi, Naftali Sommer, Yoav Kasorla
  • Patent number: 9400605
    Abstract: Various embodiments for managing a virtual tape library cluster are provided. A virtual tape library system is enhanced by representing virtual tape resources in cluster nodes with a unique serial number. A least utilized cluster node is determined. One of the virtual tape resources represented within the least utilized cluster node is selected.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: July 26, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nils Haustein, Thorsten Krause, Ulf Troppens, Daniel James Winarski
  • Patent number: 9396513
    Abstract: Methods and systems may provide for detecting an end of execution of a process on a graphics processor and providing a group page fault descriptor to a page miss handler of an operating system (OS) in response to the end of execution of the process, wherein the group page fault descriptor may indicate to the page miss handler that no further page fault requests will be generated by the graphics processor until one or more outstanding page fault requests are satisfied. Additionally, a response to the group page fault descriptor may be received from the page miss handler. In one example, a process identifier is incorporated into the group page fault descriptor, wherein the process identifier is shared by the group page fault descriptor and the one or more outstanding page fault requests.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventor: Altug Koker
  • Patent number: 9390025
    Abstract: Embodiments are disclosed for replacing one or more pages of a memory to level wear on the memory. In one embodiment, a system includes a page fault handling function and a memory address mapping function. Upon receipt of a page fault, the page fault handling function maps an evicted virtual memory address to a stressed page and maps a stressed virtual memory address to a free page using the memory address mapping function.
    Type: Grant
    Filed: December 29, 2012
    Date of Patent: July 12, 2016
    Assignee: Rambus Inc.
    Inventors: Trung Diep, Eric Linstadt
  • Patent number: 9384158
    Abstract: Embodiments include a system for dynamic universal port mode assignment for a general purpose computer system. A host bridge with a mixed mode request router receives requests over a universal peripheral component interconnect express (PCIe) port from PCIe adapters utilizing different operating modes. An aspect includes a general purpose host computer with one or more PCIe universal ports allowing the computer to connect to a wide range of external peripheral devices, such as a local area networks, storage area networks, printers, scanners, graphics controllers, game systems, and so forth. PCIe is a modern universal port protocol for parallel ports that allows peripherals utilizing different operating modes to connect to a standard PCIe parallel port. The mixed mode request router supports converged PCIe adapters, which support multiple functions utilizing different PCIe modes converged onto the same mixed mode adapter.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: July 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David F. Craddock, Thomas A. Gregg, Eric N. Lais
  • Patent number: 9372880
    Abstract: Provided are techniques for reclamation of empty pages in database tables. In response to receiving a plurality of records for insertion into a database table, the plurality of records are inserted into one or more contiguous pages. In response to at least some of the plurality of records being deleted from the database table, the one or more contiguous pages are reclaimed by: relocating any records from the plurality of records remaining in the one or more contiguous pages and releasing the one or more contiguous pages.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Frank-Martin Haas, Nelson Hop Hing, Matthew A. Huras, Catherine S. McArthur, Sean W. McKeough, Keriley K. Romanufa, Torsten W. E. Ziegler
  • Patent number: 9361254
    Abstract: A packaged memory device includes a semiconductor interposer, a first memory stack, a second memory stack, and a buffer chip that are all coupled to the semiconductor interposer. The first memory stack and the second memory stack each include multiple memory chips that are configured as a single stack. The buffer chip is electrically coupled to the first memory stack via a first data bus, electrically coupled to the second memory stack via a second data bus, and electrically coupled to a processor data bus that is configured for transmitting signals between the buffer chip and a processor chip. Such a memory device can have high data capacity and still operate at a high data transfer rate in an energy efficient manner.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: June 7, 2016
    Assignee: NVIDIA Corporation
    Inventor: Alok Gupta
  • Patent number: 9348752
    Abstract: Processes are disclosed for embodiments of a caching system to utilize a snapshot file or other limited size data structure to store a portion of the data stored in a cache. The snapshot file can be stored on persistent or otherwise non-transitory storage so that, even in case of a restart, crash or power loss event, the data stored in the snapshot file persists and can be used by the caching system after starting up. The snapshot file can then be used to restore at least some data into the cache in cases where the cached data in the cache is lost. For example, in cases of a cold-start or restart, the caching system can load data from the snapshot file into the empty cache. This can increase the number of cache hits since the cache is repopulated with useful data at startup.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: May 24, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Vishal Parakh, Antoun Joubran Kanawati
  • Patent number: 9344273
    Abstract: Provided is a cryptographic device implementing an S-Box of an encryption algorithm using a many-to-one binary function. The cryptographic device includes: arrays of first logic gates including I first logic gates which each receive 2 bits of an input signal; 2N second logic gates which each receive corresponding J bits from among I bits output from the arrays of the first logic gates; and L third logic gates which each receive K bits from among 2N bits output from the second logic gates, wherein there is a many-to-one correspondence between the N bits of the input signal and the K bits input to each of the third logic gates, and wherein the N, I, J, K, and L are positive integers. Because a signal output from each array includes only one active bit, current is always consumed constantly to prevent internal data from leaking out to a hacker.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Mook Choi, Xingguang Feng
  • Patent number: 9336066
    Abstract: A method and apparatus for hybrid validation for a Software Transaction Memory (STM) is herein described. During execution of a transaction, when acquiring ownership of meta-data associated with a data element, the meta-data is updated with an ownership reference to a transaction to enable efficient subsequent ownership tests. However, during validation, for some conditions, meta-data is updated from the ownership reference to a write entry reference to enable efficient validation.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: May 10, 2016
    Assignee: Intel Corporation
    Inventors: Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai
  • Patent number: 9317224
    Abstract: The contributions of a virtual storage unit to the utilization of a data storage system may be quantified. A utilization score may be determined for each virtual storage unit for one or more functional components of the data storage system, for example, a front-end adapter, back-end adapter or interface physical storage unit. A utilization score may be determined for the data storage system as a whole by combining the component utilization scores of the virtual storage unit. Component and/or system utilization scores may be visually presented to a user in a manner that enables the user to assess the relative contributions of the virtual storage units to utilization of the component or overall system, respectively. What-if scenarios may be considered using the utilization scores to determine the consequences of moving one or more virtual storage units from one data storage system to another, and a live migration may result.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: April 19, 2016
    Assignee: EMC Corporation
    Inventors: Dan Aharoni, Hui Wang, Marik Marshak, Amnon Naamad, John A. Adams
  • Patent number: 9311085
    Abstract: A method and apparatus for handling low power and high performance loads is herein described. Software, such as a compiler, is utilized to identify producer loads, consumer reuse loads, and consumer forwarded loads. Based on the identification by software, hardware is able to direct performance of the load directly to a load value buffer, a store buffer, or a data cache. As a result, accesses to cache are reduced, through direct loading from load and store buffers, without sacrificing load performance.
    Type: Grant
    Filed: December 30, 2007
    Date of Patent: April 12, 2016
    Assignee: Intel Corporation
    Inventors: Tingting Sha, Chris Wilkerson, Herbert Hum, Alaa R. Alameldeen
  • Patent number: 9298724
    Abstract: A computer-implemented method for preserving deduplication efforts after backup-job failures may include (1) identifying a deduplicated data system that reduces redundant data storage by storing and referencing a plurality of deduplicated data segments and reclaims storage space by deleting unreferenced data segments from the deduplicated data system, (2) identifying a backup job that backs up data to the deduplicated data system, causes the deduplicated data system to store at least one new data segment available to be referenced within the deduplicated data system, and fails after the deduplicated data system stores the new data segment within the deduplicated data system causing the new data segment to be unreferenced within the deduplicated data system, and (3) causing the deduplicated data system to retain the new data segment until the backup job is retried despite the new data segment being unreferenced. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: March 29, 2016
    Assignee: Symantec Corporation
    Inventors: Deepak Patil, Vishal Bajpai
  • Patent number: 9274951
    Abstract: A cache memory controller in a computer system, such as a multicore processing system, provides compression for writes to memory, such as an off-chip memory, and decompression after reads from memory. Application accelerator processors in the system generate application data and requests to read/write the data from/to memory. The cache memory controller uses information relating location parameters of buffers allocated for application data and sets parameters to configure compression and decompression operations. The cache memory controller monitors memory addresses specified in read requests and write requests from/to the first memory. The requested memory address is compared to the location parameters for the allocated buffers to select the set of parameters for the particular application data. Compression or decompression is applied to the application data in accordance with the selected set of parameters. The data size of the data transferred to/from memory is reduced.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: March 1, 2016
    Assignee: Altera Corporation
    Inventors: Allan M Evans, Curtis M Williams
  • Patent number: 9250991
    Abstract: Methods and apparatuses for reduction of Read Disturb errors in a NAND FLASH memory system comprise a controller configured to organize FLASH memory devices into blocks, each block having a plurality of pages, and each page defining an individually addressable physical memory location. The controller is further configured to accumulate a Block READ Count corresponding to the number of times any pages in a first block of pages have been read since the first block was last erased. Once the READ count reaches a predetermined number, the controller responds to subsequent READ requests for pages within the first block by moving data associated with a requested page to a page in a second, different block without moving data associated with other pages in the first block, and modifying a logical-to-physical translation table to associate the moved data with the physical address of the page in the second block.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Holloway H. Frost, Charles J. Camp, Timothy J. Fisher, James A. Fuxa, Lance W. Shelton
  • Patent number: 9207882
    Abstract: A method is provided in one example embodiment and includes instantiating a virtual adapter on a network device connected to a storage array, the virtual adapter capable of communicating with the storage array; determining storage configuration properties for the network device; and provisioning a portion of the storage array to the network device in accordance with the determined storage configuration properties. The method may further comprise associating the network device with a service profile, where the storage configuration properties are specified in the service profile. Still further, the method may comprise configuring the network device in accordance with the associated service profile, where the instantiating is also performed in accordance with the associated service profile.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 8, 2015
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Sebastien T. Rosset, Brian Y. Uchino, Sesidhar Baddela
  • Patent number: 9189533
    Abstract: Embodiments described herein may involve enabling applications to cooperate with a system-level sync framework. The sync framework may provide system synchronization of files between user devices and a cloud storage service. Arbitrary applications on a user computing device can communicate with the sync framework to temporarily suspend synchronization of a specified file by the sync framework. The application can register functions with the sync framework that the sync framework can invoke in relation to suspending synchronization, continuing to provide system-level access to the file for arbitrary applications, and resuming synchronization.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: November 17, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Marc Wautier, Daniel Fiordalis, Miko Arnab S. Bose, Scott Hoogerwerf, Oded Shekel, Simon Clarke, Chris Guzak, Balaji Balasubramanyan, Michael Novak
  • Patent number: 9189640
    Abstract: In a computer-implemented method for re-provisioning a server of a data center, and while the server is provisioned to a first virtual network of the data center, the server is provided 1) a pseudo-random data stream, and 2) instructions on how to overwrite substantially all of its data storage volumes using the pseudo-random data stream. Upon completion of the overwrite, the server is powered down, then moved to a second virtual network of the data center, and then caused to initiate a network boot from within the second virtual network. After the network boot of the server, one or more indications of the data stored at a number of addresses of the server's data storage volumes are requested from the server via the second virtual network. It is then determined whether the server is in a compromised state by, remotely from the server, comparing the provided indication(s) to one or more expected indications.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: November 17, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Timothy G. Barry
  • Patent number: 9183130
    Abstract: A data control system comprises a communication interface, a processing system, and a storage system. The communication interface is configured to receive a request to retrieve data from a primary storage volume that includes a secondary storage volume. The storage system is configured to store the primary storage volume that includes the secondary storage volume. The processing system is configured to identify changed segments of a plurality of segments in the primary storage volume and identify allocated segments of the changed segments. The communication interface is further configured to transfer the allocated segments in response to the request.
    Type: Grant
    Filed: April 19, 2014
    Date of Patent: November 10, 2015
    Assignee: Quantum Corporation
    Inventors: Gregory L. Wade, J. Mitchell Haile
  • Patent number: 9176804
    Abstract: Reducing memory dump data size by: (i) receiving a memory dump data including a set of stack(s), including at least a first stack which includes a current stack portion; (ii) removing from the memory dump data a first removed data portion that comes from a portion of the first stack to yield an optimized memory dump data; (iii) determining respective ranking values for a plurality of ranked data portions from the set of stacks; and (iv) selecting a ranked data portion from the current stack portion of the first stack to be a first removed data portion based, at least in part, upon the ranking values.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Franziska Geisert, Jakob C. Lang, Angel Nunez Mencias, Jochen Schweflinghaus
  • Patent number: 9176805
    Abstract: Reducing memory dump data size by: (i) receiving a memory dump data including a set of stack(s), including at least a first stack which includes a current stack portion; (ii) removing from the memory dump data a first removed data portion that comes from a portion of the first stack to yield an optimized memory dump data; (iii) determining respective ranking values for a plurality of ranked data portions from the set of stacks; and (iv) selecting a ranked data portion from the current stack portion of the first stack to be a first removed data portion based, at least in part, upon the ranking values.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: November 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Franziska Geisert, Jakob C. Lang, Angel Nunez Mencias, Jochen Schweflinghaus
  • Patent number: 9177352
    Abstract: Systems and methods for processing user-interface animations are disclosed. The method may include processing a first frame of a user-interface animation with a first processing core, monitoring a processing time of the first frame of the user-interface animation relative to a first synchronization pulse, and processing, if the elapsed processing time exceeds a threshold, a first portion of the user-interface animation with the first processing core and a second portion of the user-interface animation with a second processing core. Processing of a next frame of the user-interface animation may be initiated with the first processing core while the second processing core is processing the second portion of the user-interface animation.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: November 3, 2015
    Assignee: Qualcomm Innovation Center, Inc.
    Inventors: Premal Shah, Omprakash Dhyade