Abstract: The present invention provides for the expansion of a virtual storage device. Expansion of the virtual storage device includes adding one or more additional storage device units to an existing virtual storage device. Blocks or strips included in an added storage device unit are assigned addresses, to allow the added storage capacity to be accessed immediately. In order to reestablish a pattern of data storage addresses from the original storage device units of the pre-expanded virtual storage device across all of the storage device units of the post-expanded virtual storage device, temporary storage is provided. In particular, as a strip of data is relocated to its proper post-expand location, the data occupying that location is placed in a temporary storage buffer. Data in the temporary storage buffer is then written to the proper post-expand location for that data, with displaced data being written to a second temporary storage buffer.

Abstract: In the computer system, a storage system provides a storage level virtual volume based on thin provisioning technology, to a physical server on which a virtual machine is defined. The storage system releases the area of the logical volume corresponding to the storage level virtual volume accessed by a virtual machine which is specified to be deleted, on the basis of storage level virtual volume conversion information which is managed by the storage system.

Abstract: The present invention aims at preventing the access performance of a distributed memory system by accessing via cross-over ownership a track mapping information formed as a hierarchical memory. In the process of assigning a real data storage area to a virtual volume, at first, a page from a pool is assigned, and thereafter, a track is assigned from said page. The page is composed of multiple tracks into which track data assigned at host write operation timings are stored sequentially from the top. A mapping information of the virtual volume and the page is stored in a control information page that differs from the track data, and the mapping information is stored in the control information page which could only be accessed by a microprocessor having the ownership of the virtual volume.

Abstract: Embodiments of archival storage system are disclosed. The archival storage system includes one or more removable disk drives that provide random access and are readily expandable. In embodiments, some or all of the data within the removable disk drive(s) is immutable. The archiving system creates a designation for the data representing the data as having Write Once Read Many (WORM) protection. Actions associated with the data may be received and determined to be read accesses. If the actions are something other than a read access, the archiving system, in embodiments, prevents the action on the data.

Abstract: A data writing method for a flash memory and a control circuit and a storage system using the same are provided. The data writing method includes determining whether the size of data to be stored by a host system is smaller than a predetermined value according to a write command received from the host system, when the size of the data is smaller than the predetermined value, the data is written into a corresponding buffer physical block or a corresponding spare buffer physical block. The data writing method further includes combining valid data belonging to the same logical block during the executions of several write commands. Accordingly, the response time during the execution of each write command is shortened, and the problem of timeout is avoided.

Abstract: There are a plurality of storage apparatuses including a first storage apparatus and a second storage apparatus. The first storage apparatus has a virtual volume composed of a plurality of virtual segments. At least the second storage apparatus has a pool composed of a plurality of real pages (real storage areas). The plurality of storage apparatuses each manage one or more pools including at least the pool in the second storage apparatus as one virtual pool. The virtual pool is composed of a plurality of virtual pages, and each virtual page corresponds to any of the real pages. The first storage apparatus receives a write command that specifies an address belonging to an unallocated virtual segment to which no virtual page is allocated, allocates a free virtual page from the virtual pool to the unallocated virtual segment, and writes data accompanying the write command to the real page corresponding to the allocated virtual page.

Abstract: A method and apparatus for managing the caching of data on an auxiliary memory of a computer. Pages of data may be cached on an auxiliary memory, such as a flash memory, at a virtual level using an identifier that does not involve a physical address of the pages on a memory. Pages may be cached on auxiliary memory that may be removable from the computer, e.g., by unplugging the memory from the computer. Page data may be encrypted and/or compressed on the auxiliary memory. An authentication indicator may be used to verify the accuracy of cached data in the case of an interrupted connection to the auxiliary memory, e.g., as a result of computer power down, hibernation, removal of the memory from the computer, etc.

Abstract: Methods, media, and servers are provided for maintaining persistent sessions for a network device and providing quick authorization to a user of the network device. The network server maintains persistent sessions with network devices based on a usage profile associated with the network devices. The persistent sessions are maintained during time periods when the network device experience peak transaction activity. Additionally, during these time periods, the network device may provide quick authorizations to users of the network device. Quick authorizations allow a transaction to complete on the network device without waiting for authorization if the user is identified as a returning user.

Abstract: A system including a register and a controller. The register is configured to store a map relating distinct regions of a memory to respective mapping modes. Each of the mapping modes identifies a predetermined order of dimensions of a respective region of the memory. Each of the dimensions of the regions of the memory is identified as a row, a bank, or a column. The mapping modes include (i) a first mapping mode having a first predetermined order of dimensions, and (ii) a second mapping mode having a second predetermined order of dimensions that is different from the first predetermined order of dimensions associated with the first mapping mode. The controller is configured to control access to the distinct regions of the memory according to the map stored in the register, including controlling access to a first region of the memory according to the first mapping mode while controlling access to a second region of the memory according to the second mapping mode.

Abstract: Functionality can be implemented in a virtual memory manager (VMM) to allow small pages (e.g., 4 KB) to be coalesced into large pages (e.g., 64 KB), so that a single free list can be maintained for the large pages (“maintained pages”). When a process requests a small page, the VMM can associate a maintained page with a memory segment accessible by the process. Then, the maintained page can be divided to form a set of small pages (“fragments”). The fragments can become available pages in a broken page list. The VMM can satisfy the request by allocating one of the fragments in the broken page list. If the process requests additional small pages, the additional requests can be satisfied from the broken page list. When the process terminates, the fragments in the broken page list become a maintained page and can be returned to the free list.

Abstract: There is provided a storage arrangement and a method of operating thereof. The storage arrangement comprises a first storage system and one or more second storage systems operatively coupled to the first storage system. First control layer is operable to handle a first logical address space comprising a first logical group characterized by a plurality of logical block addresses; first control layer comprises a first mapping module handling a first mapping structure associated with first logical group. Each second control layer comprises, respectively, a second mapping module handling a second mapping structure associated with first logical group.

Abstract: A method and a memory device are provided for accessing a storage location. The method includes storing an extended address value in a register in a non-volatile memory device. The method further includes subsequently receiving multiple addresses and combining the stored extended address value with each of the multiple received addresses to produce multiple combined addresses. The method further includes accessing multiple storage locations within the non-volatile memory device based, at least in part, on the multiple combined addresses.

Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.

Abstract: A memory device has a plurality of dedicated data blocks for storing only user data and a plurality of dedicated overhead blocks for storing only overhead data that comprises ECC data that is used for error checking with respect to the user data in the dedicated data blocks. The dedicated data blocks can be erased without erasing the ECC data that is used for error checking with respect to the user data in the dedicated data blocks.

Abstract: A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving at least one update data, wherein the update data belongs to at least one logical page of a first logical block, and the first logical block is mapped to a first physical block. The method also includes when a physical page of a second physical block that is corresponding to the logical page already stores data, selecting a third physical block from a free area, writing the update data into the third physical block, serving the third physical block as the child physical block of the first physical block, and executing an erasing operation on the second physical block, wherein the second physical block is currently a child physical block of the first physical block. Thereby, the method can effectively reduce the number of operations for merging data and increase the data writing speed.

Abstract: A method to locate, resolve, and invoke software functions, wherein the method forms a request comprising a resource identifier, resolves the request to an endpoint, evaluates the request by the endpoint to generate a resource representation.

Abstract: A file system layout apportions an underlying physical volume into one or more virtual volumes (vvols) of a storage system. The underlying physical volume is an aggregate comprising one or more groups of disks, such as RAID groups, of the storage system. The aggregate has its own physical volume block number (pvbn) space and maintains metadata, such as block allocation structures, within that pvbn space. Each vvol has its own virtual volume block number (vvbn) space and maintains metadata, such as block allocation structures, within that vvbn space. Notably, the block allocation structures of a vvol are sized to the vvol, and not to the underlying aggregate, to thereby allow operations that manage data served by the storage system (e.g., snapshot operations) to efficiently work over the vvols.

Abstract: A method for writing and reading data memory cells, comprising: defining in a first memory zone erasable data pages and programmable data blocks; and, in response to write commands of data, writing data in erased blocks of the first memory zone, and writing, in a second memory zone, metadata structures associated with data pages and comprising, for each data page, a wear counter containing a value representative of the number of times that the page has been erased.

Abstract: System for controlling data transfer between a host system and storage devices. A virtualization controller implements the data transfer and includes first ports for connection with the storage devices, a second port for connection with the host system, a processor, and a memory configured to store volume mapping information which correlates first identification information used by the host system to access a first storage area in one of the storage devices, with second identification information for identifying the first storage area, the correlation being used by the processor to access the first storage area. When data stored in the first storage area is transferred to a second storage area, the processor correlates the first identification information with a third identification information for identifying the second storage area and registers the first identification information and the third identification information in the volume mapping information.

Abstract: In a computer system with a disk array that has physical storage devices arranged as logical storage units and is capable of carrying out hardware storage operations on a per logical storage unit basis, a switch is provided to offload storage operations from a file system to storage hardware. The switch translates primitives used for performing storage operations into commands executable by the physical storage devices so that the data moving portion of the storage operations can be offloaded from the file system to the storage devices.

Abstract: A storage system and method are provided including physical storage devices controlled by storage control devices constituting a storage control layer operatively coupled to the physical storage devices and hosts. The storage control layer includes: a first virtual layer interfacing with the hosts, operable to represent a logical address space characterized by logical block addresses, characterized by an Internal Virtual Address Space (IVAS) and operable, responsive to I/O requests addressed to logical block addresses, to provide protocol-dependent translation of said logical block addresses into IVAS addresses; and a second virtual layer interfacing with the physical storage space, and operable to represent available physical space to said hosts and characterized by a Physical Virtual Address Space (PVAS). Each address in PVAS having a corresponding address in IVAS.

Abstract: A storage device able to make a redundant write operation of unselected data unnecessary and able to optimize an arrangement of pages to a state having a high efficiency for rewriting, wherein the storage device has a first memory unit, a second memory unit having a different access speed from the first memory, and a control circuit, wherein the control circuit has a function of timely moving the stored data in two ways between the first memory unit and the second memory unit having different access speeds in reading or rewriting.

Abstract: A system, a controller, and a method for transmitting and distributing a data stream from a host to a storage device having a non-volatile memory and a chip are provided. A specific mark is added into a data stream which is transmitted from the host to the storage device, such that the data stream can be dispatched to the chip by transmitting a write command. Then, a response message generated by the chip can be received inerrably by executing a plurality of read commands.

Abstract: Embodiments of the present invention provide a wear-leveling method, a storage device, and an information system, where a storage region is divided into a plurality of storage sub-regions of the same size. The method includes: recording the accumulated number of write operations of each storage sub-region; and when the accumulated number of write operations of any one storage sub-region of the plurality of storage sub-regions reaches a predetermined remapping rate, mapping a logical address of the storage sub-region to a remapping physical address. With the wear-leveling method, the storage device, and the information system in the embodiments of the present invention, a logical address of a local data block on which too many write operations are performed may be evenly mapped to an overall physical storage region, thereby avoiding that local data is too hot and prolonging a service life of a storage medium.

Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

Abstract: Administering registered virtual addresses in a hybrid computing environment that includes a host computer and an accelerator, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerator adapted to one another for data communications by a system level message passing module, where administering registered virtual addresses includes maintaining, by an operating system, a watch list of ranges of currently registered virtual addresses; upon a change in physical to virtual address mappings of a particular range of virtual addresses falling within the ranges included in the watch list, notifying the system level message passing module by the operating system of the change; and updating, by the system level message passing module, a cache of ranges of currently registered virtual addresses to reflect the change in physical to virtual address mappings.

Abstract: A platform and method for secure handling of events in an isolated environment. A processor executing in isolated execution “IsoX” mode may leak data when an event occurs as a result of the event being handled in a traditional manner based on the exception vector. By defining a class of events to be handled in IsoX mode, and switching between a normal memory map and an IsoX memory map dynamically in response to receipt of an event of the class, data security may be maintained in the face of such events.

Abstract: A multi-core online patching method and an apparatus for mapping patch data to a patch area of a shared memory are disclosed. A method of the embodiment of the present invention includes: separating shared global variables and private global variables defined in a patch; mapping the shared global variables to a shared data segment in a patch area by using a mapping mode of a direct memory address, and mapping the private global variables to private data segments in the patch area by using a mapping mode of a variable address specified by a user. The embodiments of the present invention may be used in a multi-core DSP system of telecom-grade software.

Abstract: A method to generate and save a resource representation recited by a request encoded in a computer algorithm, wherein the method receives from a requesting algorithm an Unresolved resource request. The method resolves the resource request to an endpoint and evaluates the resolved resource request by the endpoint to generate a resource representation. The method further generates and saves in a cache at least one Unresolved request scope key, a resolved request scope key, and a cache entry comprising the resource representation. The method associates the cache entry with the resolved request scope key and with the at least one Unresolved request scope key using a mapping function encoded in the cache.

Abstract: Machine-reading media and method for managing data in a non-volatile memory. The method comprises the steps: a plurality of first logical offsets may be assigned to a plurality of first fragments of a first memory block, a first fragment of the plurality of first fragments may store data; a plurality of second logical offsets may be assigned to a plurality of second fragments of a second memory block, a second fragment of the plurality of second fragments may be associated with the first fragment, a second logical offset assigned to the second fragment may be identical to a first logical offset assigned to the first fragment; then, data may be copied from the first fragment to the second fragment.

Abstract: This invention provides an information processing method and apparatus, which can set all extent sizes of data divisionally recorded on a disk to be equal to or larger than the minimum recording unit, and can guarantee continuous reproduction of the divisionally recorded data. Of data divisionally recorded on a recording medium (5), data which corresponds to an end portion of that data and cannot be recorded as a recording area equal to or larger than a minimum recording unit specified in the recording medium (5) due to the presence of a recording area (6) of another data, that has already been recorded on the recording medium (5), is re-recorded on a recording area equal to or larger than the minimum recording unit. At this time, new data is generated by combining data less than the minimum recording unit, and data recorded in another recording area, and the new data is re-recorded on a new recording area.

Abstract: Various embodiments include apparatus, systems, and methods having multiple dice arranged in a stack in which a defective cell may be replaced by a spare cell on the same die or a different die. Other embodiments are described.

Abstract: A system, method, and medium for implementing I/O fencing in a virtual machine cluster sharing virtual storage objects. A volume manager driver receives access requests from virtual machines directed to a virtual storage object such as a volume. The volume manager driver then translates the access request to point to a storage device underlying the volume. The access request includes keys and/or other group reservation data required to implement an I/O fencing method so as to prevent access to shared data by malfunctioning or non-responsive virtual machines.

Abstract: A solid state drive that uses over-provisioning of NAND flash memory blocks as part of housekeeping functionality, including deduplication and coalescence of data for efficient usage of NAND flash memory devices and maintaining sufficient numbers of erased blocks to promote write performance.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the local page address linking table includes linking relationships between physical page addresses and logical page addresses of a plurality of pages; and building a global page address linking table of the memory apparatus according to the local page address linking table. More particularly, the step of providing the block with the local page address linking table further includes: building a temporary local page address linking table for the local page address linking table corresponding to programming/writing operations of the memory apparatus; and temporarily storing the temporary local page address linking table in a volatile memory of the memory apparatus, and updating the temporary local page address linking table when needed.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: building at least one local page address linking table containing a page address linking relationship between a plurality of physical page addresses and at least a logical page address, wherein the local page address linking table includes a first local page address linking table containing a first page address linking relationship of a plurality of first physical pages, and a second local page address linking table containing a second page address linking relationship of a plurality of second physical pages that are different from the first physical pages; building a global page address linking table according to the local page address linking table; and accessing the memory apparatus according to the global page address linking table.

Abstract: A method and storage device are disclosed for card-based management of discardable files, where discardable files are tracked in a discardable file system on a storage device and are invisible to a host file system, which only tracks user files and free space. The method includes the storage device detecting currently free logical clusters corresponding to at least a portion of free space in the storage area and determining whether addresses associated with a subsequent user file write request are in a range of free clusters managed in the discardable file system by the storage device. When addresses in a host write request overlap the addresses of space managed by the discardable file system, the storage device discards discardable files as necessary and removes the newly freed clusters from the discardable file system, such that the discardable file system data structure is resized when room for user files is needed.

Abstract: Memory management methods and computing apparatus with memory management capabilities are disclosed. One exemplary method includes mapping an address from an address space of a physically-mapped device to a first address of a common address space so as to create a first common mapping instance, and encapsulating an existing processor mapping that maps an address from an address space of a processor to a second address of the common address space to create a second common mapping instance. In addition, a third common mapping instance between an address from an address space of a memory-management-unit (MMU) device and a third address of the common address space is created, wherein the first, second, and third addresses of the common address space may be the same address or different addresses, and the first, second, and third common mapping instances may be manipulated using the same function calls.

Abstract: An electronic device with improved flash memory compatibility and a method corresponding thereto are disclosed. The electronic device has a NAND flash, a processing unit and a program memory. The program memory stores application software and codes of an operating system, to be retrieved and executed by the processing unit. The application software requests for NAND flash access in accordance with a specific page size. The operating system acts as an intermediary between the application software and the NAND flash and provides a device driver which allocates a number of physical pages of the NAND flash to each virtual page of the specific page size for responding to NAND flash access requests from the application software by referring to the virtual pages.

Abstract: This disclosure provides a method for assigning data in an information handling system including a plurality of physical storage resources comprising a first tier and a second tier which has a lower performance and cost relative to capacity than the first tier. A tier manager may be hosted on the information handling system and in electronic communication with the plurality physical storage resources. The tier manager may, for each page: determine a seek distance value, determine an operation rate, determine an operation size value, determine an elapsed time value, and calculate a relative randomness value using the seek distance value, operation rate, operation size value, and elapsed time value determined for each page. A classification module may assign a physical location for each page such that the relative randomness value for each page in the first tier is greater than in the second tier.

Abstract: A method and system writes data to a memory device including writing data to varying types of physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. Depending on whether the quantity of valid data in the memory device meets a predetermined criteria, the data is written to a specific chaotic block, a general chaotic block, or a mapped block. The mapped block is assigned for writing data for the LBA range, the specific chaotic block is assigned for writing data for contiguous LBA ranges including the LBA range, and the general chaotic block is assigned for writing data for any LBA range. Lower fragmentation and write amplification ratios may result by using this method and system.

Abstract: A method for managing software modules of at least two operating systems sharing physical resources of a computing environment, but running in different partitions separated by a virtualization boundary comprises accumulating module information in a virtualization subsystem that directs the creation and management of the partitions. The accumulated module information is used across the virtualization boundary to manage the use of the software modules. Also, a method for managing software modules comprises making at least two operating systems aware that they are being hosted in a virtualized computing environment.

Abstract: A data storage device is disclosed comprising a non-volatile memory comprising a plurality of memory segments. When a write command comprising a logical block address (LBA) is received, a number of consecutive memory segments to access in response to the write command is determined. When the number of consecutive memory segments to access is greater than a threshold, a new run-length mapping entry in a run-length mapping table (RLMT) is created. When the number of memory segments to access is not greater than a threshold, at least one new single address mapping entry in a single address mapping table (SAMT) is created.

Abstract: Methods and apparatuses for enhanced protection of data stored in a FLASH memory system involve a controller capable of using variable size page stripes in the memory system. The controller is configured to store data such that each page stripe comprises a plurality of data pages, with each data page in the page stripe being stored in a different FLASH memory chip. The controller is also configured to maintain one or more buffers containing information reflecting blocks of memory within the FLASH memory chips that have been erased and are available for information storage, and to dynamically determine the number of data pages to be included in a page stripe based on the information in the one or more buffers such that a first page stripe and a second page stripe can have different numbers of data pages.

Abstract: An aspect of the invention relates to a method of managing data location of plural files in a storage system having a mixed volume which includes plural pages having a fixed page size, the pages belonging to different tiers. The method comprises mapping pages of different tiers to storage devices of different speeds in the storage system, the storage devices including at least a high speed storage device corresponding to a high tier page and a low speed storage device corresponding to a low tier page; and for each file that is a large file which is larger in size than the page size, performing sub-file tiered management on the large file to assign the large file among pages of different tiers according to access characteristics of different portions of the large file by matching the access characteristics of each portion of the large file with a corresponding tier of the assigned page of the mixed volume.

Abstract: Embodiments of the invention generally pertain to memory devices and more specifically to reducing the write amplification of memory devices without increasing cache requirements. Embodiments of the present invention may be represented as a modified B+ tree in that said tree comprises a multi-level tree in which all data items are stored in the leaf nodes of the tree. Each non-leaf node in the tree will reference a large number of nodes in the next level down from the tree. Modified B+ trees described herein may be represented as data structures used to map memory device page addresses. The entire modified B+ tree used to map said pages may be stored on the same memory device requiring limited amounts of cache. These embodiments may be utilized by low cost controllers that require good sequential read and write performance without large amounts of cache.

Abstract: An electronic device receives satellite signals from positioning information satellites and acquires positioning information and time information. A stored data table comprises a first block of data having a first array of time difference data and a second block of data having a second array of time difference data that is different than the first array of time difference data. A stored memory address table stores the memory address of each of the first and second blocks of data, at least one the blocks of data being stored a plurality of times in the memory address table. The data block corresponding to the acquired positioning information is identified, the memory address corresponding to that data block is read, the data block data indicated by the memory address is acquired, and the time difference data for the segment corresponding to the positioning information is acquired from the data block.

Abstract: Systems, methods and computing components are provided for dynamically reallocating a plurality of computing components among one or more logical partitions. A first computing component that is allocated to a first partition may have a management processor. A second computing component may be allocated to a second partition. The management processor of the first computing component may be configured to reallocate the first computing component to a third partition without affecting the second computing component.

Abstract: A device for recording information on a record carrier (11) is arranged for formatting a multilayer record carrier. The device has formatting means (16) for formatting the record carrier according which formatting includes de-icing by, in the event that locations in the user data area have not yet been recorded, writing dummy data (60) on the locations. The formatting means (16) determine a first radial position (50) and a first layer (40), which first radial position is indicative of a location on the first layer on which user data will be recorded first according to a predefined recording format. Subsequently said de-icing is started by writing of dummy data on a second layer (41) of the record carrier at the first radial position, opposite the location of the first user data (55). Hence a de-iced area (58) is created opposite the user data (55).

Abstract: A method of mapping system addresses to physical addresses associated with a physical memory device receives memory requirements associated with an application, allocates a region of the physical memory device to the application (wherein the region is a contiguous portion of the physical addresses that does not overlap with any other region and is associated with a memory mapping mode), determines a memory mapping scheme for the region (wherein the memory mapping scheme defines the mapping between system addresses and the region and is based at least on the memory mapping mode) and modifies a mapping register to reflect the region. In one implementation, the method modifies the mapping register to reflect the memory mapping scheme. In another implementation, the memory requirements comprise an application type, and the memory mapping mode is determined based on the application type.