Abstract: A method of arranging data in a directory, the directory being adapted to interface with disk storage, the method includes arranging data of a directory in a format that is configured to enable the directory data to be mapped by an operating system. The data of the directory is stored in computer-readable storage. The method also includes associating a first portion of a non-persistent computer-readable memory with the data of the directory at least in part by calling a memory map function of the operating system. The memory map function returning a pointer corresponding to the first portion of the non-persistent computer-readable memory. The method further includes synchronizing the associated first portion of the non-persistent computer-readable memory with the data of the directory stored in the computer-readable storage.

Abstract: Methods, apparatus, and products are disclosed for balancing computer memory among a plurality of logical partitions on a computing system, the computing system having installed upon it a hypervisor, the hypervisor having allocated computer memory and computer storage to each of the logical partitions, that include: receiving, in a memory balancing module, a storage identifier for each logical partition, the storage identifier specifying a portion of a logical partition's allocated computer storage to be used for caching data contained in the logical partition's allocated computer memory; monitoring, by the memory balancing module for each logical partition, a storage usage rate for the portion of that logical partition's allocated computer storage specified by that logical partition's storage identifier; and instructing, by the memory balancing module, the hypervisor to reallocate the computer memory for two or more of the logical partitions in dependence upon the storage usage rates.

Abstract: A storage controller of the present invention can input and output data even when the track size, which is the host management unit, is not consistent with the block size of the storage device. A boundary correction unit adds gap data corresponding to a gap size to data in a buffer memory so that the boundary of the track and boundary of the block inside the storage device match. A guarantee code is added to each logical block received from the host, and these guarantee code-appended blocks are stored in a cache memory. By providing a gap in the storage device every 116 extended logical blocks, the start position of the lead block of a track matches up with the start position of the logical blocks of the storage device.

Abstract: An information handling system includes a processor having access to a system memory. The system is operable to detect a thermal alert and identify an associated portion of system memory. The system may then modify memory allocation information used by an operating system to allocate system memory. When the thermal alert indicates a rising memory module temperature that exceeds a specified threshold, the modification of the memory allocation information causes the memory to appear to be more “distant” from the system processor(s) and thereby allocated less preferentially than other memory. If the temperature continues to rise beyond a higher threshold, a second modification of the memory allocation information is performed to simulate a “hot eject” of the memory module. As the memory module cools, the memory allocation information can be restored to simulate a hot add of the memory module and to restore the proximity of the memory module.

Abstract: A storage system stores data in at least one partition of a physical storage media in accordance with file system information specifying a plurality of logical blocks having logical block addresses within the partition. The logical blocks include excess logical blocks that are not mapped to space in the physical storage media by the mapping employed by the storage system. Unusable block data marks those excess logical blocks as unusable. This makes it easy to adjust the data storage capacity of the storage system by changing the mapping to map more or less logical block addresses to space in the physical storage media and thereby destroy or create excess logical blocks, and by changing the unusable block data to correspondingly change the excess logical blocks marked as unusable.

Abstract: An integrated memory controller (IMC) which includes data compression and decompression engines for improved performance. The memory controller (IMC) of the present invention preferably sits on the main CPU bus or a high speed system peripheral bus such as the PCI bus and couples to system memory. The IMC preferably uses a lossless data compression and decompression scheme. Data transfers to and from the integrated memory controller of the present invention can thus be in either two formats, these being compressed or normal (non-compressed). The IMC also preferably includes microcode for specific decompression of particular data formats such as digital video and digital audio. Compressed data from system I/O peripherals such as the hard drive, floppy drive, or local area network (LAN) are decompressed in the IMC and stored into system memory or saved in the system memory in compressed format.

Abstract: The storage control apparatus of the present invention saves a table for managing a virtual volume in a pool and keeps the state of the table in the latest state. A first dynamic mapping table (DMT) that manages a first virtual volume is saved in a first pool. Upon receipt of a write command relating to an unused virtual slot from a write command issuing device, a first virtual volume control unit assigns an unused real slot in the first pool to the virtual slot and updates the first DMT. The first virtual volume control unit discriminates the validity of the received data and, in cases where “0” data are received, releases the assigned real slot, updates the first DMT once again, and discards the received data. In cases where the received data are valid data, de-staging is performed following a DMT update.

Abstract: A data processing device (D) comprises an external memory (EM) for storing data defining at least part of a program in an Endian form, and an integrated circuit (IC), connected to the external memory (EM), via a memory bus (MB) having an N-bit width, and comprising i) an embedded processor (EP) adapted to run the program, ii) an internal memory (IM) for storing at least a bootstrap code of this program, iii) an external memory interface (EMI) connected to the memory bus (MB), and iv) a processor bus (PB) connecting the internal memory (IM) and the external memory interface (EMI) to the embedded processor (EP). The external memory (EM) also stores, at a chosen address, an N-bit data word (C) having a value representative of its size (equal to N/8 bits) and of the Endian form of the stored program data.

Abstract: There is a journal area and one or more logical volumes comprising a first logical volume. The journal area is a storage area in which is stored a journal data element, which is a data element that is stored in any storage area of a plurality of storage areas configuring a logical volume, or a data element that is written to the storage area. A controller has a size receiver that receives a write unit size, which is the size of a write data element received from a computer, and a size setting unit that sets the received write unit size in a memory for one or more logical volumes. The size of a journal data element stored in a journal area based on the set write unit size is the write unit size.

Abstract: A memory device is disclosed, and includes an array of memory cells and a partitioning system configured to address a first portion of the array in a single level cell mode, and a second portion of the array in a multi-level cell mode.

Abstract: In accordance with one or more aspects, compressed storage management in a system includes determining which of multiple data units stored in an uncompressed portion of the storage resource are to be compressed and stored in a compressed portion of the storage resource. The management can further include returning one or more regions of the compressed portion for use in the uncompressed portion in response to storage resource pressure in the system, as well as compacting regions in the compressed portion to fill empty gaps in the compressed portion.

Abstract: A control apparatus connected to different types of storage devices include a performance-information storing section that stores performance information on the storage devices; a list storing section that stores a list of data on the storage devices; a monitoring section that monitors the load statuses of the storage devices and the control apparatus; a detecting section; an estimating section; and a determining section.

Abstract: Memory is divided up during the gathering of histogram data so that a portion of the memory is configured for storing the high counts expected at the minimum and maximum codes/addresses, and at least one other portion is configured for storing the lower counts expected at other codes/addresses. By configuring memory portions in this manner, memory can be more efficiently allocated.

Abstract: A virtual storage technique is provided to manage a cell pool or a set of cell pools which can be used to satisfy variable-size storage requests. The algorithm uses no locks and relies on an atomic compare-and-swap instruction to serialize updates to the fields that can be simultaneously requested by multiple threads or processes. A free chain is used to manage cells which have already been obtained and freed, while there is an active extent that is used to hand out cells which have not previously been obtained. The algorithm is based on all cell pool extents being the same size, which allows the control information for the extent to be easily located on the extent boundary (e.g. at a 1 MB boundary). Control information for each cell is stored independently of the cell storage in a control array that resides at the head of the extent, along with other control information. This avoids cell overrun from damaging the cell pool control information.

Abstract: A method and apparatus for formatting a portable storage device, which are capable of performing formatting optimized for a non-volatile memory of the portable storage device. The method includes: detecting whether file system information is initialized when formatting of the non-volatile memory is started; if the initialization of the non-volatile memory is detected, detecting a cluster size and cluster start position of a storage space of the portable storage device; and if the detected cluster size and the cluster start position information do not match a size and a staring position of a minimum recording unit of the storage space, performing a re-formatting operation of the portable storage device.

Abstract: For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.

Abstract: A storage manager application implemented in a first computational device maintains a virtual logical volume having a plurality of segments created by the storage manager application, wherein space is reserved at the end of a physical volume corresponding to the virtual logical volume, and wherein the physical volume comprises a linear storage medium. A request is received to write data, at the first computational device, from a second computational device. The data is written to the reserved space, wherein the writing of the data causes new segments to be created in the reserved space.

Abstract: A method, a system and a computer program product are provided to auto configure a drive list. When information is received for a drive, the key manager compares the information to drive information on a drive list. If the drive is not on the drive list the drive list is auto configured by adding the drive to the drive list. By adding the drive to the drive list the drive is able to obtain keys from the key manager to perform encryption and decryption.

Abstract: Intelligent Platform Management Interface (IPMI) systems are disclosed, in which a baseboard management controller (BMC) is coupled to a first memory device and a server system, such that the BMC accesses the first memory device to provide a first set of functions and accesses a second memory device from the server system to provide a second set of functions.

Abstract: A method for data storage, including configuring in a data storage system a volume storage pool as data storage resources available for allocation of volumes in the data storage system. The method also includes defining a threshold value for the volume storage pool. When the allocation of the volumes causes the threshold value to be crossed, the method includes performing an action for managing the volume storage pool.

Abstract: The invention provides a system and method for tracking memory information associated with dynamically loaded kernel modules with the help of a tracking system. The tracking system defines its own kernel memory allocation functions. Whenever, a dynamic kernel module is loaded/unloaded into/from the kernel space, these newly defined functions are called in response to kernel memory allocation/de-allocation requests from the kernel module. The newly defined functions are responsible for allocating and de-allocating kernel memory, as well as, keeping track of information relating to the kernel memory allocations/de-allocations. The tracked information may be used to identify the source of kernel memory leaks.

Abstract: A method, system and computer program product for dynamically composing processor cores to form logical processors. Processor cores are composable in that the processor cores are dynamically allocated to form a logical processor to handle a change in the operating status. Once a change in the operating status is detected, a mechanism may be triggered to recompose one or more processor cores into a logical processor to handle the change in the operating status. An analysis may be performed as to how one or more processor cores should be recomposed to handle the change in the operating status. After the analysis, the one or more processor cores are recomposed into the logical processor to handle the change in the operating status. By dynamically allocating the processor cores to handle the change in the operating status, performance and power efficiency is improved.

Abstract: An apparatus, system, and method are disclosed for selecting a source cluster in a distributed storage configuration. A measurement module measures system factors for a plurality of clusters over a plurality of instances. The clusters are in communication over a network and each cluster comprises at least one tape volume cache. A smoothing module applies a smoothing function to the system factors, wherein recent instances have higher weights. A lifespan module calculates a mount-to-dismount lifespan for each cluster from the smoothed system factors. A selection module selects a source cluster for accessing an instance of a specified volume in response to the mount-to-dismount lifespans and a user policy.

Abstract: A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

Abstract: A data processing system (2) is provided including a local memory (4) and a main memory (6). The local memory (4) is accessed by a data engine (8) using local-memory physical addresses. The main memory (6) is accessed by a microprocessor (10) using main-memory addresses. A translation store (16) serves to store physical address TAGs indicating the mapping between data stored within the local memory (4) and corresponding data stored within the main memory (6). A coherency management mechanism (18) serves to use MESI coherency control data to manage the coherency between data values stored both in the local memory (4) and the main memory (6).

Abstract: A memory device can be directly mounted on a motherboard supporting DDR3 SDRAM, and then the memory device have advantages of the fly-by bus topology and the T branch topology established by the joint electron device engineering council (JEDEC). Thus, the system performance of a desktop computer in a unit interval can be enhanced.

Abstract: In one embodiment a method is disclosed for allocating memory for a processor unit in a group of processing units. The method can include receiving a memory allocation request where the request can indicate a number of binary segments to be stored. The method can determine if the number indicates a nonstandard allocation, and locate an unallocated memory address based on a multiple of the number if the number indicates a nonstandard allocation. The method can also include locating an unallocated memory address from a pool of memory addresses, where the pool of addresses includes the integer multiples of the binary segments and excludes addresses that are two times the number of binary segments such that the address can be utilized to determine the allocation.

Abstract: A method, a system and a computer program for determining device criticality during SAN reconfiguration operations comprising the steps of building the SAN connectivity graph and mapping the reconfiguration on SAN connectivity graph; locating the affected host systems; and determining the device criticality for each of the affected host systems. The hosts systems may also be provided with impact analysis agents to generate device criticality on host systems and a central agent to aggregate the device criticality from impact analysis agent and provide feedback to data center administrator.

Abstract: The invention relates to an apparatus and method of processing data of a non-volatile memory, and more particularly, to an apparatus and method of processing data of a non-volatile memory that is capable of applying a writing unit operation to a plurality of sectors. An apparatus for processing data of a non-volatile memory according to an aspect of the invention includes a non-volatile memory having a plurality of blocks, an operation processing unit writing, when a write operation is requested from a user, data in the blocks and allowing the blocks, where the data is written, to become collectively effective, and a block managing unit managing statuses of the blocks to correspond to the operation process performed by the operation processing unit.

Abstract: Methods and apparatus, including computer program products, for block compression of tables with repeated values. In general, value identifiers representing a compressed column of data may be sorted to render repeated values contiguous, and block dictionaries may be generated. A block dictionary may be generated for each block of value identifiers. Each block dictionary may include a list of block identifiers, where each block identifier is associated with a value identifier and there is a block identifier for each unique value in a block. Blocks may have standard sizes and block dictionaries may be reused for multiple blocks.

Abstract: A solution for restoring operation of a storage device based on a flash memory is proposed. The storage device emulates a logical memory space (including a plurality of logical blocks each one having a plurality of logical sectors), which is mapped on a physical memory space of the flash memory (including a plurality of physical blocks each one having a plurality of physical sectors for storing different versions of the logical sectors). A corresponding method starts by detecting a plurality of conflicting physical blocks for a corrupted logical block (resulting from a breakdown of the storage device). The method continues by determining a plurality of validity indexes (indicative of the number of last versions of the logical sectors of the corrupted logical block that are stored in the conflicting physical blocks). One ore more of the conflicting physical blocks are selected according to the validity indexes. The selected conflicting physical blocks are then associated with the corrupted logical block.

Abstract: Provided is a method of partitioning a storage area of a recording medium and a recording medium using the method, and a method of accessing a recording medium and a recording device using the method, capable of storing partition information used for partitioning a predetermined storage area included in the recording medium into a number of storage sub-areas in a first storage sub-area of the recording medium, and storing authority information which indicates whether an access instruction for accessing one of the partitioned storage sub-areas has authority to access the storage sub-area in a second storage sub-area. Accordingly, on a user's point, a read-only memory (ROM) area and a random access memory (RAM) area may be simultaneously provided to a NAND flash memory. On a content provider's point, desired contents are prevented from being deleted, and an additional space for storing added contents can be guaranteed.

Abstract: An information processing apparatus having a virtualization function for creating a virtual disk based on a logical volume selected from a plurality of storage areas comprises a host device for performing information processing on a storage device, and a virtualization switch for connecting the host device to the storage device via a path. The host device includes a controller which computes information necessary for virtualization by acquiring information concerning the physical configuration of the storage device and information concerning the path from an information storing unit provided in a virtualization switch, selects specific logical volumes that match a pre-specified logical volume selection criterion, registers the selected logical volumes into a virtual storage pool, and creates the virtual disk by selecting a logical volume from the virtual storage pool. There is provided a method of virtualization which is implemented using the information processing apparatus, etc.

Abstract: Disclosed herein is an information processing apparatus, including: setting means for setting, a maximum transfer size; calculation means for subtracting a second data amount from a first data amount to calculate a third data amount; boundary determination means for determining whether this transfer will involve a page boundary being extended across; buffer boundary determination means for determining whether this transfer will involve a buffer size being exceeded; transfer size determination means for determining whether or not the third data amount is equal to or less than the maximum transfer size; and determination means for determining a data amount of data to be transferred within limits of the third data amount, based on a first determination made by the boundary determination means, a second determination made by the buffer boundary determination means, and a third determination made by the transfer size determination means.

Abstract: The invention relates to a method and apparatus for reconfiguring a portion of a storage area network by establishing one or more auxiliary data paths, configuring the storage area network to re-route communications from the portion of the storage area network to be reconfigured to the one or more auxiliary data paths and reconfiguring the portion of the storage area network while the communications are being re-routed.

Abstract: A memory controller includes a page configure module that communicates with a memory array comprising B memory blocks each including P pages. The page configure module selectively configures memory cells in the P pages of each of the B memory blocks to store from 1 to T bits per cell. The page configure module also generates a memory map based on the configuration. B, P, and T are integers greater than 1. At least one of a write module selectively writes data to the memory array based on the memory map or a read module selectively reads data from the memory array based on the memory map.

Abstract: The invention relates to a safety module for the electronic data processing, with a safety core comprising a core processor, and connected therewith, a core memory and a core interface, the core processor being adapted to import via the core interface, to verify and with successful verification to store and to activate programs/data sets in the core memory.

Abstract: In some embodiments, a storage controller comprises a first input/output port that provides an interface to a host computer, a second input/output port that provides an interface a storage device, a processor that receives input/output requests generated by the host computer and, in response to the input/output requests, generates and transmits input/output requests to the storage device, and a memory module communicatively connected to the processor. The memory module comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to receive, from the host computer, a write input/output request that identifies a logical volume; compare an amount of storage space available in the logical volume with an amount of storage space required to complete the write operation, and allocate additional storage space to the logical volume if the amount of storage space available in the logical volume is insufficient to complete the write operation.

Abstract: In a system and method for examining the configuration of a storage area network using a browser application, linking to the storage area network using a browser application, obtaining data from a device on the storage area network, parsing the data into records, eliminating redundancies in the records, storing the records in a database, and providing access to the database to a user through the browser.

Abstract: A method for configuring a memory space, the method including reading a piece of configuration information in the memory space, determining a division of at least one part of the memory space into memory banks according to the configuration information read; and allocating to each of the memory banks an access number to be used to access a data location in the memory bank, in combination with a logic address of the location in the memory bank.

Abstract: A partition manager includes an I/O reconfiguration mechanism and a logical partition suspend/resume mechanism that work together to perform autonomic I/O reconfiguration in a logically partitioned computer system. When I/O reconfiguration is required, the affected logical partitions are suspended, the I/O is reconfigured, and the affected logical partitions are resumed. Because the logical partitions are suspended during I/O reconfiguration, any ghost packet that may occur when the I/O is reconfigured is ignored.

Abstract: The correspondence between logical addresses and physical addresses is determined so that the logical addresses in ascending order may be assigned to the physical addresses in ascending order with the physical addresses of defective blocks in a memory skipped. Then, the physical addresses of the defective blocks in ascending order are sequentially stored into the second blocks in ascending order of the physical addresses of the second blocks, respectively. To obtain a physical address from a logical address, a target block is retrieved out of a plurality of second blocks on the basis of the logical address, and the physical address of the target block is added to the logical address to obtain the physical address. Thus, it is possible to reduce the required capacity of a reserve storage region used for conversion of logical addresses into physical addresses without deteriorating the access speed.

Abstract: A method of data migration for independent storage device expansion and adaptation is disclosed. The method migrates user data of a first storage unit being pre-expanded or pre-adapted to relevant regions of a second storage unit being post-expanded or post-adapted in multiple batches and includes the following steps. A number corresponding to a start data stripe of the first storage unit is provided in each batch. A data stripe migration quantity is determined. Data stripe user data of the determined data stripe migration quantity subsequent to and including the start data stripe of the first storage unit is duplicated and stored in relevant regions of the second storage unit. Subsequent to duplicating and storing each batch, the original user data of data stripes of the determined data stripe migration quantity subsequent to and including the start data stripe of the first storage unit remains undamaged.

Abstract: Wireless headphones receive music and video from media devices via different wireless transmission methods such as using Bluetooth. However, wireless headphones suffer from limitations despite the convenience they offer to users. Some such wireless headphones allow one user to share the music experience by passing one side of the wireless headphone to a third party. The third party does not however get to experience and enjoy the full stereo experience of the music. In addition, sharing of music by transfer of media files from one storage medium to other storage medium often infringes upon third party intellectual property rights. An embodiment of the invention describes a method and a system that enable wireless sharing of audio sounds among a plurality of users.

Abstract: A system and method for reducing memory overhead of a page table in a dynamic logical partitioning (LPAR) environment are provided. Each LPAR, upon its creation, is allowed to declare any maximum main memory size for the LPAR as long as the aggregate maximum main memory size for all LPARs does not exceed the total amount of available main memory. A single page table is used for all of the LPARs. Thus, the only page table in the computing system is shared by all LPARs and every memory access operation from any LPAR must go through the same page table for address translation. As a result, since only one page table is utilized, and the aggregate size of the main memory apportioned to each of the LPARs is limited to the size of the main memory, the size of the page table cannot exceed the size of the main memory.

Abstract: A data management apparatus and method. The data management apparatus includes an input unit to receive a request to update information included in a predetermined master BAT (block allocation table) block of a plurality of master BAT blocks; and an update unit to record updated information to the predetermined master BAT block based on the update request.

Abstract: A data storage system and a method for managing a data storage system are provided. A storage controller is programmed with a disk configuration for each of one or more logical disk arrays and a protection level k. The available storage space from one or more disk drives in the data storage system is merged into a single virtual address space and the merged storage space is divided into storage segments. Next, the storage segments are allocated among the logical disk arrays and a configuration table is generated indicating the number of storage segments in each logical disk array and the physical location of each storage segment on a disk drive. The configuration table is stored in the storage controller and k copies of data may then be stored on the logical disk arrays. Multiple storage controller nodes may be accommodated to provide at least primary and secondary storage.

Abstract: A signal processing apparatus includes a processing selection section (102), a processing execution section (103), a buffer (107) and a buffer size setting section (108A). The processing selection section (102) selects, from a plurality of signal processings, processing to be performed to input data. The processing execution section (103) executes signal processing selected by the processing selection section (102). The buffer (107) has a variable buffer size and buffers data processed by the processing execution section (103). The buffer size setting section (108A) sets the buffer size of the buffer (107) based on a selection result of the processing selection section (102).

Abstract: Embodiments of apparatuses, methods, and systems for guest to host address translations for devices to access memory in a partitioned system are disclosed. In one embodiment, an apparatus includes an interface, partitioning logic, first address translation logic, and second address translation logic. The interface is to receive a request from a device to access memory in a partitioned system. The partitioning logic is to determine whether the device is assigned to a first partition or a second partition. The first address translation logic is to translate a first guest address to a first host address in the first partition. The second address translation logic is to translate a second guest address to a second host address in the second partition.

Abstract: An apparatus comprising a memory controller including therein a configuration register, a communication channel coupled to the memory controller, and first and second memory partitions coupled to the communication channel, wherein configuration parameters in the configuration register are set so that the memory controller recognizes one partition at a time. A process comprising setting configuration parameters in a configuration register of a memory controller so that the memory controller recognizes a first memory partition coupled to the memory controller by a communication channel instead of a second memory partition coupled to the memory controller by the communication channel and re-setting the configuration parameters so that the memory controller recognizes the second memory partition instead of the first memory partition.