Abstract: Exemplary embodiments provide high-speed memory devices such as high-speed DRAM resources in a storage system for external computers. In accordance with an aspect of the invention, a computer system comprises: a computer which includes an internal memory and an external memory, the external memory being provided by a storage system coupled to the computer; and a controller operable to manage a virtual memory space provided by the internal memory and the external memory. The controller is operable to add a logical unit provided by the storage system, to the external memory included in the virtual memory space, based on a usage level of the virtual memory space. The controller is operable to release a logical unit provided by the storage system, from the external memory included in the virtual memory space, based on the usage level of the virtual memory space.

Abstract: A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs and NAND-, NOR- and AND-type Flash memories) having associated device type information is serially interconnected. A serial input (SI) containing a device type (DT) and a device identifier (ID) is fed to one device of the serial interconnection. Upon a match between the fed DT matches the DT of the device, the fed ID is latched in a register of the device and an ID for another device is generated, which is then transferred to the next device in the serial interconnection. Otherwise, ID generation is skipped. These steps are performed in all devices. Thus, sequential IDs are generated for the different device types and also the total number of each device type is recognized. If the fed DT is “don't care”, sequential IDs are generated for all devices and the total number of the devices is recognized.

Abstract: A nonvolatile memory having a non-power of two memory capacity is disclosed. The nonvolatile memory device includes at least one plane. The plane includes a plurality of blocks with each of the blocks divided into a number of pages and each of the blocks defined along a first dimension by a first number of memory cells for storing data, and along a second dimension of by a second number of memory cells for storing data. The nonvolatile memory has a non-power of two capacity proportionally related to a total number of memory cells in said plane. The nonvolatile memory also includes a plurality of row decoders. An at least substantially one-to-one relationship exists, in the memory device, for number of row decoders to number of pages. Each of the row decoders is configured to facilitate a read operation on an associated page of the memory device.

Abstract: A nonvolatile storage device includes a controller and a nonvolatile memory. The controller has: a logical-physical address conversion part for converting a logical address designated by a host device into a physical address; and a boot code address conversion part for converting boot code address information designated by the host device into a physical address. After the power-on and before the logical-physical address conversion part becomes usable, a boot code is read from a part of region which can be accessed by designating a logical address from the host device by designating the boot code address information from the outside. Thus, it is possible to rapidly start the nonvolatile memory system after the power-on. In the state where the logical-physical address conversion part can be used, data-reading and data-writing are carried out by designating a logical address from the host device.

Abstract: A workload-aware distributed data processing apparatus and method for processing large data based on hardware acceleration are provided. The data processing apparatus includes a memory buffer including partitions. The data processing apparatus further includes a partition unit configured to distribute a mapping result to the partitions based on a partition proportion scheme. The data processing apparatus further includes a reduce node configured to receive content of a corresponding one of the partitions, and perform a reduction operation on the content to generate a reduce result.

Abstract: Example embodiments described herein may relate to memory devices, and may relate more particularly to configurable address space for non-volatile memory devices.

Abstract: A system on chip includes electrical components and a first memory including memory blocks. A method of operating the system on chip includes generating an assignment of the memory blocks to the electrical components. The generating includes, initially, during a development phase of the system on chip, generating the assignment so that selected memory blocks of the memory blocks are assigned to first selected electrical components of the electrical components as emulated read-only memory. The generating includes, subsequently, during an operational phase of the system on chip, modifying the assignment so that one or more of the selected memory blocks are re-assigned to second selected electrical components of the electrical components as cache memory. The method also includes, according to the assignment, dynamically creating electrical connectivity between the memory blocks and the electrical components.

Abstract: Embodiments of the invention relate to providing configuration options for optimizing storage extent placement in multi tiered storage systems. In one aspect of the invention, In one embodiment, a configuration adviser provides configuration options for a multi-tiered storage system that includes a number of different storage tiers, each of which include storage devices of a particular storage type. Data access information for storage extents to be stored in the storage system are received. Resource information for available storage tiers in the storage system to place the storage extents on are also received. A cost incurred by the storage system for placing each of the storage extents on each of the storage tiers is determined. Each storage extent is assigned to a particular one of the storage tiers that would incur the lowest cost to the storage system for storing the storage extent.

Abstract: Described herein is a method and apparatus to interface a processor with a heterogeneous dual in-line memory module (DIMM). The method comprises determining an identity of a DIMM having data lanes; mapping the data lanes based on the determining of the identity of the DIMM; training input-output (I/O) transceivers in response to the mapping of the data lanes; and transferring data to and from the DIMM after training the I/O transceivers.

Abstract: A method for storing a vector of process data elements (D1, . . . , D8) that have a size of n bits from a register file (RF) into a memory (M) is described. The memory is arranged for storage of a vector of storage data elements in locations (M1, . . . , M5) having a size of m bits, wherein m>n. The method comprises the steps of: exchanging bits (S2) between process data elements in the vector stored in mutually subsequent register elements, the exchanging resulting in a vector of modified data elements (DmI, . . . , Dm8), shuffling (S3) groups of k subsequent bits in the resulting vector, —storing (S4) the resulting shuffled vector of modified data elements as a vector of storage data elements in the memory (M).

Abstract: A snapshots data structure provides compilers and other tools with snapshots of a buffer at different points in time. Snapshot heads identify trees within a directed acyclic graph (DAG) of nodes. Leaf nodes of a given tree collectively hold data elements representing information that was resident in the buffer at a particular point in time regardless of subsequent editing of the buffer. During buffer editing operations a new tree is created in the DAG with leaf nodes holding data elements that match one-to-one a subsequence of data elements held by leaf nodes of an existing tree.

Abstract: A control apparatus connected to different types of storage devices include a performance-information storing section that stores performance information on the storage devices; a list storing section that stores a list of data on the storage devices; a monitoring section that monitors the load statuses of the storage devices and the control apparatus; a detecting section; an estimating section; and a determining section.

Abstract: A method and device for switching over in a memory for a control device, a first storage area in the control unit being overlaid by a second storage area; the second storage area including at least one memory page, and each of the memory pages being able to overlay the first storage area; switching over being able to be performed between the memory pages and the overlaying being able to be switched on/switched off, and the switching over of the memory pages and the switching on/switching off of the overlaying of the second storage area being automatically carried out and/or triggered by the software of the control unit.

Abstract: The system utilizes a plurality of layers to provide a robust storage solution. One layer is the RAID engine that provides parity RAID protection, disk management and striping for the RAID sets. The second layer is called the virtualization layer and it separates the physical disks and storage capacity into virtual disks that mirror the drives that a target system requires. A third layer is a LUN (logical unit number) layer that is disposed between the virtual disks and the host. By using this approach, the system can be used to represent any number, size, or capacity of disks that a host system requires while using any configuration of physical RAID storage.

Abstract: Provided is a computer system, in which a storage system includes a first control module for logically dividing first resources of the storage system and operating them as independent virtual storage systems. A computer includes a second control module for logically dividing second resources of the computer and operating them as independent virtual machines. The computer system holds first information indicating a correlation among the virtual machine, the virtual storage system, and the first resources. The first control module specifies the first resource allocated to the virtual storage system whose power is cut based on the first information, and powers off the specified first resource. Thus, system power consumption can be reduced by managing power of the storage system shared by a plurality of virtual machines in a virtualization environment.

Abstract: The present invention provides a method for estimating a capacity usage status of a storage unit, where the storage unit includes a plurality of sectors. The method includes: estimating capacity usage statuses of a portion of sectors; and utilizing a controller to estimate the capacity usage status of the storage unit according to the estimated capacity usage statuses of the portion of sectors in a situation of not estimating capacity usage statuses of all of the sectors of the storage unit.

Abstract: An object is to enable efficient shredding of recording media in association with migration. An information processing device (a server device 3) receives a data input/output request in a unit of a file transmitted from a client device 2, and performs writing and reading of data to and from a storage system 10 having a recording medium (hard disk drive 171) in which a file entity specified in the received data input/output request is stored in units of data blocks. The information processing device is communicatively coupled to a different storage device which is a migration destination of data. In the case where after the migration of certain data, different data is written in a data block of the certain data in an overlapped manner, the data block is not shredded if the data block is already shredded related to either of the overlapped certain and the different data after the migration.

Abstract: A management device obtains, from the plurality of storage nodes, information of accesses which are made to the actual storage areas included in the storage nodes, generating load information of the actual storage areas based on the access information, and storing the generated load information in a load information storage unit. The device changes, based on the load information stored in the load information storage unit, the assignment relations of the actual storage areas with respect to the virtual storage areas such that loads of the storage nodes are leveled. The device instructs the plurality of storage nodes to move the data in the actual storage areas depending on change in the assignment of the actual storage areas to the virtual storage areas.

Abstract: A memory allocator assigns temporary memory limits to each of a plurality of processes requiring memory. Thereafter, at least one assigned temporary memory limit is changed during execution of a corresponding process. Related apparatus, systems, techniques and articles are also described.

Abstract: A method and computer-readable memory device that enable processing of a first memory image comprising a plurality of compressed sub-blocks and uncompressed sub-blocks to produce a second memory image comprising contents of the first memory image arranged as a plurality of memory blocks. The memory blocks of the second memory image may be independently decompressible, to enable more efficient updating of an electronic device.

Abstract: Examples disclose partitioning a volatile memory into a high performance partition and a low performance partition. Further the example discloses retrieving an application with a high performance data and a low performance data from a non-volatile memory to place the high and the low performance data in the high and low performance partitions, respectively. Additionally, the example also discloses receiving a request to decrease power and in response, reduce an amount of power to the high performance partition and maintaining an amount of power provided to the low performance partition.

Abstract: A memory system architecture is provided in which a memory controller controls operations of memory devices in a serial interconnection configuration. The memory controller has an output serial interface for sending memory commands and an input serial interface for receiving memory responses for those memory commands requisitioning such responses. Each memory device includes a memory, such as, for example, flash memory (e.g., NAND- and NOR-type flash memories). In an initialization phase, the memory devices are assigned with consecutive number addresses. The memory controller sends a target address and can recognize the type of the targeted memory device. A data path for the memory commands and the memory responses is provided by the interconnection.

Abstract: Storage scalability management is provided by adding storage in a data processing environment. A new storage subsystem is added automatically to an available storage provider only if doing so will not reduce the performance of the storage provider to an unacceptable level. If no such storage provider is available, a new storage provider is added automatically. The new storage provider is added automatically to the server and operating system that is best able to handle the additional work. Thus, a new storage subsystem is added automatically in a data processing environment in a manner that provides for system scalability while minimizing any adverse impact on system performance.

Abstract: Methods and systems are disclosed for relocating data in a physical storage pool comprising a plurality of storage tiers having differing performance characteristics, the physical storage pool being mapped into one or more logical units, each logical unit comprising a plurality of logical slices of data storage. The methods and systems can involve receiving a relocation list, the relocation list including, for each of a plurality of logical slices, a slice identifier, a temperature value, and a current physical location, determining a destination tier for each logical slice on the relocation list, evaluating for each logical slice on the relocation list a performance gain expected to be achieved by moving the logical slice from its current physical location to a new location in the destination tier, and relocating data in a logical slice from its current physical location to the new location based on the evaluation.

Abstract: An information system comprises: a storage system including a processor, a memory, and a plurality of virtual volumes to be allocated pages from a storage pool of volumes; and a metadata server which, upon receiving from a client a write request containing file data to be written to a virtual volume in the storage system, returns the write request to the client with parallel information which is added to a data layout of the file data to be written in the virtual volume. The storage system, upon receiving the write request with the parallel information, allocates, based on the parallel information, pages from the storage pool to the virtual volume for writing the file data, so that the data layout is striped and the allocated pages fit striped data access according to the striped data layout.

Abstract: A method dynamically configures resources in a storage device. The method includes determining a requirement for supplementary resources for processing upcoming storage specific commands associated with at least one of a plurality of logical unit in the storage device. The method also includes identifying type of supplementary resources required for the logical unit. Furthermore, the method includes determining whether unused resources of the identified resource type present in a common pool of resources shared between a plurality of logical units, and dynamically configuring the common pool of resources among the plurality of logical units such that the unused resources of the identified resource type present in the common pool of resources are allocated to the logical unit as supplementary resources for processing the upcoming storage specific commands.

Abstract: A method of allocating resources in a data processing system is disclosed. The method includes an application designing a page reallocation scheme and sending said page reallocation scheme from said application to a kernel service that is responsible for allocation of storage locations.

Abstract: Storage management systems and methods are presented. In one embodiment, a method comprises: performing a hierarchical configuration information process, including accessing information regarding hierarchical relationships of components associated with a storage environment; performing a storage resource consumption detection process, including detecting consumption of storage resources included in the storage environment; and performing a coordinated consumption analysis process in which at least part of an analysis of the consumption of the storage resources is coordinated across multiple levels of an active spindle hierarchy. In one embodiment, a reaction process is performed. The reaction process can include performing an automated consumption notification process and an automated reclamation process based upon results of the storage resource consumption detection process.

Abstract: A storage device set may allocate capacity for spaces (e.g., logical volumes) according to an allocation strategy, e.g., allocating capacity from the storage device having the greatest available capacity, or maximizing the distribution of allocated capacity across the storage devices. However, such allocation strategies may be inefficient (e.g., limiting the capability of the storage device set to satisfy subsequent requests with constraints such as a minimum distribution of capacity across several storage devices). The techniques presented herein achieve efficient allocation by first allocating capacity on storage devices having ample available capacity using a round-robin technique, and if such storage devices do not satisfy the capacity request, allocating capacity on storage devices having limited available capacity.

Abstract: A method for initializing a memory subsystem (212) of a management controller (200) includes, with an additional memory initialization module (206) of the management controller (200), initializing the memory subsystem (212) of the management controller (200) in response to the memory subsystem (212) not being properly initialized. A management controller (200) includes a memory subsystem (212) including a memory controller (214) and a memory (216); firmware (208) able to initialize the memory subsystem (212); and a memory initialization module (206) to initialize the memory subsystem (212) if the memory subsystem (212) is not properly initialized.

Abstract: A method of operation of a storage control system includes: partitioning logical addresses into a number of subdrives, the logical addresses associated with a memory device; and monitoring a data write measure of one of the subdrives.

Abstract: According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes a first memory, a control circuit and a second memory. The first memory is configured to contain a data area for storing data, and a table area containing the key-value data. The control circuit is configured to perform write and read to the first memory by addressing, and execute a request based on the key-value store. The second memory is configured to store the key-value data in accordance with an instruction from the control circuit. The control circuit performs a set operation by using the key-value data stored in the first memory, and the key-value data stored in the second memory.

Abstract: Implementations and techniques for flash memory-type hash tables are generally disclosed.

Abstract: Described are techniques for partitioning memory. A plurality of boards is provided. Each of the plurality of boards includes a physical memory portion and a set of one or more processor. The physical memory portion in each of said plurality of boards is partitioned into a plurality of logical partitions including a global memory partition accessible by any processor on any of the plurality of boards and one or more other memory partitions configured for use by one or more processors of said each board. Each of the one or more other memory partitions not being accessible to a processor on a board other than said each board.

Abstract: In a data storage system, a controller schedules I/Os to storage devices so that each one substantially performs only reads or only writes, thereby increasing performance. At least one storage device is designated as a current write device. The remainder of the devices are designated current read devices. Host write data is stored in a buffer memory. Storage device reads occur only from the current read devices. Storage device writes occur only to the current write device(s). In response to a triggering event, the designations are updated so that a different storage device is designated the current write device, and the remainder of the storage devices are designated the current read devices. A triggering event may include but not be limited to a time period, number of writes, cache size, device wear, environmental conditions, application requirements, or combination.

Abstract: The storage system includes a data storage controlling unit that stores a plurality of units of block data, generated by dividing storage target data, in a distributed manner in a plurality of storage devices, and performs duplicate storage elimination. The data storage controlling unit stores a plurality of continuous units of block data of the storage target data, generated by dividing the storage target data, in a particular storage device among the plurality of storage devices, stores, in the particular storage device, feature data based on the data content of the block data and storing position information representing the storing position in the particular storage device of the block data in association with each other as a storing position specifying table, and stores storage device identifying information for identifying the particular storage device and the feature data of the block data stored in the particular storage device in association with each other as a storage device specifying table.

Abstract: In the case of adding an arbitrary hard disk drive, the hard disk drive is operated in a specific operation mode suited for that hard disk drive. As triggered by the attachment of a hard disk drive to a disk adapter, a processor operates the hard disk drive in a predetermined operation mode based on predetermined parameter information that has been prepared in advance. The hard disk drive stores, in advance, particular parameter information including information about the specific operation mode suited for operation. The processor reads the particular parameter information from the hard disk drive in the predetermined operation mode and operates the hard disk drive in the specific operation mode based on the particular parameter information.

Abstract: The computer system has a plurality of physical server devices, a plurality of physical storage devices, and a management server device, and when migrating at least one of a plurality of first virtual server devices to another physical server device, the management server device compares at least one physical server device in which the plurality of first virtual server devices are disposed after the migration, with at least one physical server device in which a plurality of second virtual server devices are disposed, to calculate a first evaluation value, and also compares at least one physical server device in which the plurality of first virtual server devices are disposed after the migration, with at least one physical server device in which a plurality of third virtual server devices are disposed, to calculate a second evaluation value.

Abstract: A system comprises a plurality of storage systems, which provides different storage functions, and is controlled by a management server. The management server determines whether to change the control of the storage controller between the storage systems, or to mount the target volume as an external volume and keep the storage controller under control so that the storage function provided to the source volume is maintained even after the configuration change between the storage systems. After the determination, the management server instructs the storage system to perform according to the determination.

Abstract: A host device is configured to read and write information from and into a card and to supply a supply voltage that belongs to a first voltage range or a second voltage range which is lower than the first voltage range, and issues a voltage identification command to the card. The voltage identification command includes a voltage range identification section, an error detection section, and a check pattern section. The voltage range identification section includes information indicating which one of the first voltage range and the second voltage range the supply voltage belongs. The error detection section has a pattern configured to enable the card which has received the voltage identification command to detect errors in the voltage identification command. The check pattern section has a preset pattern.

Abstract: A storage device 101 includes: a plurality of division processing parts 120, each configured so as to correspond to a characteristic of data to be written, for dividing the data in accordance with a previously set criterion; and a data writing part 117 for writing division data obtained by division by the division processing part into a storage device. The storage device also includes: a reception buffer 111 for receiving data to be written and temporarily storing as reception data; a division process selecting part 113 for detecting a characteristic of the reception data stored by the reception buffer and selecting the division processing part configured so as to correspond to the detected characteristic of the reception data; and a data transmitting part 114 for transmitting the reception data stored by the reception buffer, to the division processing part selected by the division process selecting part.

Abstract: Disclosed is a computer system for reliably running a plurality of programs performing garbage collection with less physical memory than in the past. For this purpose, there is disclosed a memory management method that releases unneeded areas in a plurality of memory areas that have been used by each of a plurality of programs stored in memory and executed on a processing unit, the processing unit acquires an index for determining the start of releasing a memory area, compares the index with a predetermined threshold, and when the index exceeds the threshold, selects one of the plurality of programs, collects unneeded areas of the memory areas used by the selected program, and releases the collected areas.

Abstract: Processes may be assigned heap memory within locally accessible memory banks in a multiple processor NUMA architecture system. A process scheduler may deploy a process on a specific processor and may assign the process heap memory from a memory bank associated with the selected processor. The process may be a functional process that may not change state of other memory objects, other than the input or output memory objects defined in the functional process.

Abstract: A system on chip comprises N components, where N is an integer greater than one, and a storage module. The storage module comprises a first memory, a control module, and a connection module. The first memory includes M blocks of static random access memory, where M is an integer greater than one. The control module generates a first assignment of the M blocks to the N components during a first period and generates a second assignment of the M blocks to the N components during a second period. The first and second assignments are different. The connection module dynamically connects the M blocks to the N components based on the first and second assignments.

Abstract: For optimizing data placement in a multi-tiered storage system, system configuration data and system performance data is collected. A plurality of data movement plans are generated, based in part on the system configuration data and the system performance data. A conflict between the plurality of data movement plans are arbitrated to form an execution plan. The data movement plans are performed according to the execution plan.

Abstract: A software-based RAID system is provided that enables configuration conflicts to be detected and resolved between a PD that is logically present but physically missing, and a PD that is physically and logically present. In accordance with the invention, a determination is made as to whether such a configuration conflict exists, and if so, the logically-present, but physically missing, reference identifier associated with the PD is remapped to a port number that currently is not in use.

Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes a storage for storing a resource discovery table, and programmed I/O (PIO) configuration registers corresponding to hardware resources. A system processor may allocate the plurality of hardware resources to one or more functions, and to populate each entry of the resource discovery table for each function. The processing units may execute one or more processes. Given processing units may further execute OS instructions to allocate space for an I/O mapping of a PIO configuration space in a system memory, and to assign a function to a respective process. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.

Abstract: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with the type of access. Accordingly, when an application with specific memory access needs is initiated, the memory access profile that is most optimized for that particular access need is utilized to configure access to the memory device. The configuration may be effected for a portion of the memory device, a partition of the memory device, or even one single access location on the memory device.

Abstract: There is provided a storage control system and a method in which various controls to a plurality of storage controllers connected to each other can be effectively performed. The storage control system and method controls first and second storage controllers, in which a second storage controller is connected to a first storage controller to which a host system is connected. With reference to a memory in which a table defining correspondence relationships between internal logical volumes and a host logical volume of the second storage controller is stored, a channel adapter of the first storage controller controls power supplies of driving mechanisms of storage devices corresponding to the internal logical volumes.

Abstract: A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.