Abstract: The disclosure relates to a method for providing hardware reset in an electronic device having at least one non-physical key and the electronic device thereof, and an operating method of the electronic device may include detecting a current amount supplied to a processor, detecting whether wireless power is input, generating a hardware reset signal based on the detected current amount and the wireless power input, and transmitting the generated hardware reset signal to the processor.

Abstract: An apparatus includes a plurality of processor cores, a cache memory that includes a plurality of banks, and a power management circuit. The power management circuit is configured to maintain a power credit approach for the apparatus that includes tracking a total number of currently available power credits, and to store a plurality of threshold values. Each threshold value is associated with one or more of a plurality of throttling actions. In response to the total number of currently available power credits reaching a particular threshold value of the plurality of threshold values, the power management circuit performs the one or more throttling actions associated with the particular threshold value. The plurality of throttling actions includes selectively throttling one or more of the plurality of processor cores, and selectively throttling one or more of the plurality of banks in the cache memory.

Abstract: A system loading detecting device and method are provided. The system loading detecting device includes a processing device, a detection circuit and a controller. The detection circuit detects whether an adapter is unplugged from the system loading detecting device to generate a detection signal. When the adapter is unplugged from the system loading detecting device, the detection signal is changed from a first level to a second level. The controller is coupled to the detection circuit and the processing device. In addition, the controller receives the detection signal and determines whether to trigger the generation of a throttling signal according to the detection signal to enable a throttling mechanism to reduce system loading.

Abstract: A method, electronic device, and computer-readable medium for displaying a user input. The method includes determining whether a writing utensil is within a predetermined proximity of the display panel while a display panel of the electronic device is powered off. The method also includes, in response to determining that a writing utensil is within the predetermined proximity, activating a black screen display mode for the display panel. Additionally, the method includes, in response to detecting the writing utensil contacting a surface of the electronic device, activating individual pixels corresponding to locations where the writing utensil contacted the electronic device to display a contrasting color.

Abstract: Systems, apparatuses, and methods related to thermal leveling are described. Thermal leveling can be performed on a host computing system as opposed to on a memory system. Thermal leveling can include operations performed by a host to control temperature characteristics and/or power consumption of a memory system. For instance, a host computing system can control temperature characteristics of multiple memory devices that are deployed in a memory system. In an example, a set of processing resources (e.g., a thermal leveling component) can be provided on a host. The set of processing resources can receive information corresponding to thermal characteristics of a memory device coupled to the host and control a thermal setting for the memory device based on the received thermal characteristics.

Abstract: Techniques facilitating integrated circuit identification and reverse engineering are provided. A computer-implemented method can comprise identifying, by a system operatively coupled to a processor, an element within a first elementary cell of one or more elementary cells of an integrated circuit. The method can also comprise matching, by the system, the element with respective elements across the one or more elementary cells including the first elementary cell. The respective elements can be replicas of the element. Further, matching the element with respective elements can be based on a layout analysis of the integrated circuit.

Abstract: A control method of a storage device wherein a host cannot transfer a command to the storage device when the storage device transfers data to the host, after which there is a data transfer delay time period and no data is transferred to the host until a read command is received from the host, the control method comprising the steps of: detecting, by a memory controller of the storage device, a host delay time of the host each time a read command is received from the host during the data transfer delay time period; and adjusting, by the memory controller, the data transfer delay time period based on one or more of the detected host delay times.

Abstract: Systems, methods, and apparatus for adaptively modifying latency times governing entry of a PCIe interface into low power states are described. A method performed by a controller of a PCIe interface includes determining that a burst of data is being transmitted on a PCIe link, configuring a timer to signal when an entry latency period has elapsed after determining that a PCIe link has entered an idle state, causing one or more circuits of the PCIe interface to enter a low-power state when the timer signals that the entry latency period has elapsed before the PCIe link becomes active, and increasing the entry latency period when a number of entries of the PCIe interface to the low-power state that occurs during transmission of the burst of data exceeds a threshold maximum number.

Abstract: The described technology is generally directed towards maintaining a consistent logical data size with variable protection stripe size in an array of independent disks system. According to an embodiment, a system can comprise a processor that can execute computer executable components stored in a memory, and storage devices. The components can receive a configuration from another node of the redundant array of independent disks system based on a selected number of logical data blocks to configure disks, and configure, based on the selected number, the storage devices to store data in a number of stripes, with the logical data blocks mapping to the storage devices. The data can be stored in the storage devices, wherein parity information for a stripe of the number of stripes is stored for the stored data, and wherein a logical data block of the number of logical data blocks corresponds to the stored data.

Abstract: Technology for computing number of active servers needed over time in a cloud/compute cluster includes the following operations (not necessarily in the following order): (i) determining the capacity of each VCE provisioned on the cloud against the resource guaranteed to that VCE; (ii) forecasting the resource needs over time using historical requests for each VCE flavor; and (iii) using the forecasted resource needs to determine the required number of future servers at some future time. Some embodiments of the present invention use a formula that accounts for the interplay among various parameter values of the VCE flavors and also the mapping of the needs of VCEs of various flavors to the capabilities of physical resources.

Abstract: Technology for computing number of active servers needed over time in a cloud/compute cluster includes the following operations (not necessarily in the following order): (i) determining the capacity of each VCE provisioned on the cloud against the resource guaranteed to that VCE; (ii) forecasting the resource needs over time using historical requests for each VCE flavor; and (iii) using the forecasted resource needs to determine the required number of future servers at some future time. Some embodiments of the present invention use a formula that accounts for the interplay among various parameter values of the VCE flavors and also the mapping of the needs of VCEs of various flavors to the capabilities of physical resources.

Abstract: Systems and methods for runtime update of battery coefficients are described. In an illustrative, non-limiting embodiments, an Information Handling System (IHS), may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: receive a battery configuration policy from a remote server; and transmit at least a portion of the policy to a battery management unit (BMU) at runtime, where the policy comprises one or more battery coefficients.

Abstract: Techniques for analyzing code are described. In some instances, a code analysis service is to perform a series of comparisons, one or more per path segment of an index structure of non-defective code samples, using a token derived from a defective code segment of the stored code, to determine one or more paths in the index, wherein each path is to point to code that is similar to the defective code segment; and provide, in response to the series of comparisons, at least one of: a location of the code determined to be similar to the defective code segment and the code determined to be similar.

Abstract: A storage control system acquires, for each of a plurality of power control groups in which a plurality of storage devices which form the basis of a plurality of redundancy configuration groups are classified, an I/O (Input/Output) amount of the power control group. For each of the plurality of power control groups, the storage control system controls power consumption of each of the storage devices belonging to the power control group in power control group units, based on the acquired I/O amount relating to the power control group. None of the plurality of redundancy configuration groups spans two or more power control groups among the plurality of power control groups, all being contained in any of the plurality of power control groups.

Abstract: According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

Abstract: An electronic device includes a processor, a volatile memory, and a non-volatile memory. The non-volatile memory stores a first operating system, and the electronic device works in a first working mode and a second working mode. When the electronic device is in the first working mode, a second operating system is run in the volatile memory. When the processor detects that the electronic device reaches a preset condition for entering the second working mode, the non-volatile memory is enabled, and non-system data in the volatile memory is moved to the non-volatile memory. The non-system data does not include the second operating system. After the movement of the non-system data is completed, the volatile memory is disabled, and the first operating system is run in the non-volatile memory, so that the electronic device enters the second working mode.

Abstract: Thermal management in three dimensional integrated circuits can be difficult. Although three dimensional integrated circuits offer multiple benefits in alleviating back-end-of-the-line (BEOL) interconnect issues by reducing the wire length and reaping resistance-capacitance (RC) quadratic benefits, the thermal issues associated with stacking high performance (and subsequently high-power consumption) dice have so far proven to be prohibitive. Disclosed are methods and devices for efficient thermal management in multilayered ICs by determining thermally dangerous regions and selectively activating them to avoid undesirable temperature effects.

Abstract: A method tests the configuration of an aggregated DERs system using distributed asset managers in a decentralized hardware-in-the-loop (“HIL”) scheme. The managers contain the model of the asset they are meant to control. The method programs an asset manager with a model of a DERs asset. A plurality of asset managers are connected to a central controller. The plurality of asset managers are also connected to a simplified hardware-in-the-loop platform. The simplified HIL platform is configured to solve a network model, a load model, a non-controllable asset model, and a grid model. The method tests the DERs system control structure by using: (a) the simplified HIL platform to solve the network model, the load model, the non-controllable asset model, and the grid model, and (b) the asset manager to solve the model of the DERs asset, without any simulation between the central controller and the distributed asset managers.

Abstract: Described herein are methods and systems for connecting via a cable a USB host and USB device over distances equal to greater than 50 meters. The methods and systems include having the host and device each send a pilot signal over the cable and the host and device, each detecting that the received pilot signal is valid. After confirming the validity of the pilot signals, the host begins standard USB protocols with the device. The system and methods also allow for the insertion of a power over Ethernet device into the cable to provide power to a remote USB device. In some embodiments, only the D+ and D? lines are used allowing multiple independent USB connections over the cable.

Abstract: In one example, a printing device is disclosed, in which a network detection unit may discover available network interfaces associated with a client device upon detecting a printer network interface on which a print job is being received is down, a communication unit may send a link status notification to the client device via the available network interfaces associated with the client device, and a network switching unit may resume the print job using an alternate printer network interface that is accessible by the client device based on the link status notification.

Abstract: A system for setting a power cap state is disclosed. The system includes a plurality of power monitor sensors generating power monitor sensor data and a plurality of thermal monitor sensors generating thermal monitor sensor data. A controller has a plurality of inputs configured to receive the power monitor sensor data and the thermal monitor sensor data, to assign a priority to one of two or more power cap states and to generate a control signal. A power limiting circuit coupled to the controller is configured to receive the control signal and to modify one or more power settings.

Abstract: A processing system can include a plurality of processing clusters. Each processing cluster can include a plurality of processor cores and a last level cache. Each processor core can include one or more dedicated caches and a plurality of counters. The plurality of counters may be configured to count different types of cache fills. The plurality of counters may be configured to count different types of cache fills, including at least one counter configured to count total cache fills and at least one counter configured to count off-cluster cache fills. Off-cluster cache fills can include at least one of cross-cluster cache fills and cache fills from system memory. The processing system can further include one or more controllers configured to control performance of one or more of the clusters, the processor cores, the fabric, and the memory responsive to cache fill metrics derived from the plurality of counters.

Abstract: An operation management apparatus includes a processor. The processor generates a VM load model for each virtual machine running on an information processing system, generates resource utilization rate estimation data based on VM load models of a virtual machine group running on the physical machine and a VM load model of a first virtual machine, for each of physical machines except for a first physical machine on which the first virtual machine is running, generates a resource competition occurrence model based on the resource utilization rate of the physical machine, calculates a statistical value of competition occurrence probabilities of the resource, for each of the physical machines except for the first physical machine, based on the resource utilization rate estimation data and the resource competition occurrence model, specifies the migration destination physical machine based on the statistical value, and outputs information of a specified migration destination physical machine.

Abstract: A highly scalable distributed connection interface for data capture from multiple network service sources, comprising a connector module wherein, the connector module retrieves a plurality of business related data from a plurality of network data sources; employs a plurality of application programming interface routines to communicate with the plurality of business related data sources; accepts a plurality of analysis parameters and control commands directly from human interface devices or from one or more command and control storage devices; and specifies the action or actions to be taken on the retrieved business data.

Abstract: An electronic device monitors a volume of data processed by the electronic device within a first monitoring time segment, where a processor of the electronic device is configured to be in a first working mode, and the processor processes data in a poll mode driver (PMD) manner in the first working mode. The electronic device switches the processor from the first working mode to a second working mode when it is determined, according to the volume of data processed by the electronic device within the first monitoring time segment, that the processor is idle within the first monitoring time segment, where the processor processes data in the PMD manner and a sleep manner in the second working mode.

Abstract: A disclosed example includes: a temperature predictor to determine a combined ambient air temperature of a data center during a future duration based on 1) a first ambient air temperature corresponding to heat generated by hardware resources in physical server racks when executing workloads and 2) a second ambient air temperature corresponding to a building structure of the data center; a power utilization analyzer to determine a predicted total data center power utilization for the future duration based on a computing power utilization and a climate control power utilization, the climate control power utilization based on a power utilization corresponding to adjusting the combined ambient air temperature to satisfy an ambient air temperature threshold; and a power manager to configure a power supply station to deliver an amount of electrical power during the future duration to satisfy the predicted total data center power utilization.

Abstract: A method of supplying power in a power grid, a system supplying power in a power grid, a method of consolidating power injection and consumption in a power grid, a system for consolidating power injection and consumption in a power grid, a metering system for a power grid, and a metering method for a power grid. The method of supplying power in a power grid, the method comprises determining an initial forward probabilistic power supply time profile of an aggregate intermittent power source connected to the power grid; determining a target power demand time profile of at least one load connected to the power grid; and associating at least respective portions of the initial forward probabilistic power supply time profile and the target demand time profile such that a probability of supply of power from the intermittent power source to the load meets a specified criterion.

Abstract: A zero cross detection circuit has a first comparator circuit receiving a first input signal and a second input signal and outputting a first comparison result, a second comparator circuit having a hysteresis function, receiving the first input signal and the second input signal, and outputting a second comparison result, a power supply voltage detection circuit outputting a detection signal when a power supply voltage to be supplied becomes equal to or larger than a predetermined voltage, and a logic circuit outputting a zero cross detection signal based on the first comparison result, the second comparison result, and the detection signal.

Abstract: According to one embodiment, an image forming apparatus includes an image forming unit, a fixing unit, a reading unit, and a control unit. The image forming unit forms a visible image on a sheet. The fixing unit executes a fixing process of fixing the visible image on the sheet. The reading unit executes a reading process of reading an image. The control unit starts measurement of time until shift to a power saving mode, and shifts the operation mode to the power saving mode in which power consumption is suppressed when the measured time passes a predetermined set time. The control unit stops the measurement of the time during execution of printing, which is a process involving execution of the fixing process, and continues the measurement of the time during execution of the reading process without execution of the printing.

Abstract: An electronic device measures noise variability of background noise present in a sampled audio signal, and determines whether the measured noise variability is higher than a high threshold value or lower than a low threshold value. If the noise variability is determined to be higher than the high threshold value, the device categorizes the background noise as having a high degree of variability. If the noise variability is determined to be lower than the low threshold value, the device categorizes the background noise as having a low degree of variability. The high and low threshold values are between a high boundary point and a low boundary point. The high boundary point is based on an analysis of files including noises that exhibit a high degree of variability, and the low boundary point is based on an analysis of files including noises that exhibit a low degree of variability.

Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.

Abstract: An asynchronous state machine (ASM) for managing deep sleep state of a device and related methods are described. One method includes the ASM automatically detecting a request to wake up the device based on either a change in a status of a power user-interface element associated with the device or upon a detection of an attachment of an external power source to the device. The method further includes the ASM automatically initiating a wake-up sequence including turning on a battery pack associated with the device. The method further includes the ASM automatically detecting whether a power management function associated with the device is enabled and automatically transferring control of a remaining portion of the wake-up sequence to the power management function and the ASM passing the status of the power user-interface element to the power management function as needed.

Abstract: In some examples, in a battery-powered computing device, a software monitor may access a calendar, determine that an event is occurring, determine that the event has an associated profile, and configure the computing device based on the profile to reduce a power consumption of the computing device. For example, one or more hardware components and one or more software components identified in the profile may be placed in a low power consumption state. For example, a hardware component may be transitioned from a power-on state to a low-power state power or may not be provided power. As another example, execution of a software component may be stopped or an execution priority of the software component may be modified from a first priority to a second priority that is lower than the first priority.

Abstract: According to one embodiment, an image forming apparatus having a plurality of operation modes including a normal mode and a power saving mode in which power consumption is less than that in the normal mode and includes a processor. The processor is configured to acquire information about unexecuted print jobs via a communication interface or the like. The processor transitions the apparatus to the power saving mode after a preset standby time elapses after a completion of a print job by the apparatus if an unexecuted print job satisfies predetermined conditions that indicate that the unexecuted print job can be executed on the apparatus. The processor transitions the apparatus to the power saving mode sooner than the elapse of the preset standby time after the completion of the print job if none of the unexecuted print jobs satisfies the predetermined conditions.

Abstract: In one disclosed embodiment, a processor includes a first execution unit and a second execution unit, a register file, and a data path including a plurality of lanes. The data path and the register file are arranged so that writing to the register file by the first execution unit and by the second execution unit is allowed over the data path, reading from the register file by the first execution unit is allowed over the data path, and reading from the register file by the second execution unit is not allowed over the data path. The processor also includes a power control circuit configured to, when a transfer of data between the register file and either of the first and second execution units uses less than all of the lanes, power down the lanes of the data path not used for the transfer of the data.

Abstract: A secure mobile device charger for charging batteries of mobile devices. The secure mobile charger can include one or more body housing battery charging elements; a power connector; a mobile device connector; a code receiver; and a switch that prevents unauthorized battery charging from the mobile device connector. The code receiver may receive a code transmitted from the power source in the form of a variation in the electrical power supplied by the power source, which may be used to provide authorization to enable battery charging from the mobile device connector.

Abstract: A system incorporating a watchdog and power throttling capability which is implemented to ensure that network devices do not consume their entire battery capacity prior to the minimum expected battery life associated with the battery/device. The system includes capabilities for monitoring predicted remaining battery life in each associated device as well as the ability to control various functionalities within the device and the timing of events so as to guarantee minimum operating life for the device. This watchdog/throttling capability is implemented in such a way as to minimize the impact to device behavior and system operating parameters as much as possible while still enforcing minimum device/battery lifetime.

Abstract: Provided are an electronic apparatus, a power-saving control method, and a program capable of realizing both ease of use for a user and power-saving. A determination unit that determines whether a non-operation state of a user continues for a reference time in a first power mode, a mode control unit that shifts a power mode to a second power mode in which power is saved in a case where determination is made that the non-operation state continues for the reference time in the first power mode, a time interval detection unit that detects a time interval from the shift to the second power mode to an operation by the user, and a time control unit that changes the reference time based on the detected time interval are provided.

Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.

Abstract: An apparatus for performing a disruptive task based on a user state is disclosed. The apparatus may include a processor and a memory that stores code executable by the processor to identify a disruptive task to be performed at the apparatus. The processor obtains biometric data from a user of the apparatus. The processor performs the disruptive task in response to the biometric data indicating a predetermined user state. A method and computer program product also perform the functions of the apparatus.

Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.

Abstract: The invention relates to a configurable rechargeable battery pack, comprising an integrated battery management system and a data interface and a user interface, wherein the battery management system has a data memory for storing at least one rechargeable battery charging parameter and provides, at the data interface, the at least one rechargeable battery charging parameter for an external charging device, and wherein the at least one rechargeable battery charging parameter can be configured by means of an input at the user interface.

Abstract: The invention relates to power over data cable (PoC) systems comprising power source equipment, PSE, and plural PoC devices connected to the PSE. The PoC devices can operate in various power modes including low and high power modes. A method of managing power performed by a processing device of the system upon starting-up includes: reading, in memory of the processing device, a power change record to determine if, prior to the start-up, a target PoC device was about to switch from the low power mode to the high power mode; if it was about to switch, restricting it to remain in the low power mode; otherwise, triggering the target device to switch to the high power mode. As being restricted to the low power mode, the target device can no longer cause power failures. Thus endless loops of power failures caused by one and the same device are avoided.

Abstract: Example methods are provided for unbalanced storage resource usage configuration for a distributed storage system in a virtualized computing environment. The method may comprise: obtaining usage data associated with multiple storage resources forming the distributed storage system; and based on the usage data, determining a higher usage set and a lower usage set from the multiple storage resources. The method also comprise configuring the multiple hosts to use the multiple storage resources in an unbalanced manner by using the higher usage set at a higher usage level compared to the lower usage set.

Abstract: A dynamic power budget allocation system includes a plurality of powered subsystems. A power system controller is coupled to the plurality of powered subsystems. The power system controller is operable, for each of a plurality of time intervals, to retrieve power usage data from each of the plurality of subsystems during a current time interval. The power system controller is then operable to project power requirements for the plurality of subsystems for a subsequent time interval using the power usage data. The power system controller is then operable to determine at least one power setting for at least one of the plurality of subsystems using the power requirements, and program the at least one of the plurality of subsystems with the at least one power setting. Each powered subsystem may include a voltage regulator that provides the power usage data and is programmed with the at least one power setting.

Abstract: The present invention is a method for transmitting a data packet by a user terminal in a mobile communication system. The method enters a power saving mode for transmitting the data packet only if a channel state satisfies a transmission threshold value, compares the index indicating the channel state and the transmission threshold value upon occurrence of a data packet to be transmitted, starts transmission of the data packet if the index indicating the channel state is greater than the transmission threshold value, and proceeds with the transmission of the data packet until the time set by the timer that starts at the same time as the transmission of the data packet expires.

Abstract: Embodiments of network devices for access control are described. In some embodiments, an access control processor of a first node receives a request from a requestor node on an unsecure network to join a first group of nodes on a secure network, where the first node coordinates network activities of the first group of nodes including a plurality of partitioned nodes of a network. In response to receiving the request, the access control processor assigns the requestor node to a first pool of the first group of nodes that are configured to perform authorized modifications of data including a cryptographic hash to protect the data against unauthorized modifications. In some embodiments, the access control processor initiates the authorized modifications of the data using one or more nodes assigned to the first pool and one or more nodes of a second pool of the first group of nodes.

Abstract: The invention relates to a method (100) for the coordinated control of at least two devices (10), wherein at least a first device (10a), preferably a food processor (10a), and a second device (10b) are provided, which are different from one another in terms of a respective functionality.

Abstract: An industrial automation and control system is provided with a control unit and at least one electronic device. The system establishes a first data connection to an external maintenance unit. The control unit is connected to the electronic device. The electronic device establishes a second data connection to the external maintenance unit and receives or retrieves a proximity information from the external maintenance unit through the second data connection. The electronic device sends the proximity information to the control unit. The control unit grants access to the electronic device by the external maintenance unit through the first data connection to perform maintenance of the electronic device if the proximity information indicates that the external maintenance unit is within a predetermined range from the electronic device.

Abstract: A transmitting/receiving command method applied between a master controller and a slave controller of a power converter includes enabling the master controller and the slave controller; a controller of the master controller and the slave controller detecting a node voltage of a pin of the controller; the controller transmitting a first command of a plurality of first commands to another controller of the master controller and the slave controller through the pin when the node voltage is less than a predetermined voltage, wherein the predetermined voltage corresponds to over temperature protection of the power converter; and the controller detecting the node voltage again after the controller receives a first return signal transmitted by the another controller.