Abstract: Provided is a test apparatus including: an address generator that generates an address of a memory under test; a selector that selects whether to perform bit inversion on the address generated by the address generator before supplying the address to the memory under test; an inversion processing section that outputs the address generated by the address generator after performing bit inversion on the address if the selector has selected in the affirmative, and outputs the address generated by the address generator without performing any bit inversion on the address if the selector has selected in the negative; and a supply section that supplies, to the memory under test, the address having undergone inversion control outputted from the inversion processing section and an inversion cycle signal that indicates whether the address outputted from the inversion processing section is bit inverted or not.

Abstract: In a method for detecting memory errors occurring in a computing device, a channel number of an error memory module is obtained from a first register of a memory controller of the computing device. The method analyzes an error type to obtain a rank number of the memory module from one or more specified registers of the memory controller, and finds a serial number of a memory slot into which the memory module has been inserted. According to the serial number of the memory slot and a distribution list, the method can detect the memory slot which is carrying the memory module.

Abstract: A collaboration system may include a first computing device that may communicate with at least one other computing device via a computing network. The computing network may communicatively couple to a number of computing devices and the first computing device may receive inspection data acquired by one or more non-destructive testing (NDT) devices. After receiving the inspection data, the first computing device may determine at least one of a workflow for analyzing the inspection data based on the inspection data, a layout configured to display the inspection data, or a set of tools configured to analyze the inspection data. The first computing device may then implement the workflow, display the inspection data according to the layout, and/or display the set of tools. The workflow may include one or more processes that may be used to analyze the inspection data.

Abstract: A test device may include an application that accesses online content. In some examples, a test intermediary and/or a test user interface (UI) are downloaded to the test device in response to a request by the application for obtaining the content from a network location. The test intermediary may be positioned to receive communications between the application and the content during testing of the content and/or the application. For example, the test intermediary may intercept metrics and other callbacks passed between the content and the application during manual or automated testing. In some instances, the test intermediary may provide the metrics and/or other test outputs for display in the test user UI rendered on the test device. The content may be rendered to be functional within the test UI, and the existence of the test intermediary and/or the test UI may be transparent to the application and the content.

Abstract: The disclosure provides a voltage testing device and a method. The voltage testing method includes following steps. The computer sets initial setting parameters for an oscillograph. The computer receives initial testing parameters sent by the oscillograph, and sends a current voltage offset and a current voltage undulating value to the control unit according to the initial testing parameters. The oscillograph obtains voltage values of the power supply during a period of time, produces a voltage wave according to the voltage values, and sends the voltage wave and the voltage values to the computer. The computer displays the voltage wave and the voltage values to the computer.

Abstract: In one embodiment, a semiconductor test control system includes a computer system having a plurality of hardware resources; a hypervisor installed on the computer system; and a test floor controller installed on the computer system. The hypervisor virtualizes the hardware resources and provides each of at least one virtual appliance with access to a respective virtual set of the hardware resources. Each virtual set of the hardware resources places its respective virtual appliance in controlling communication with at least a first aspect of a semiconductor test system, thereby enabling the respective virtual appliance to test a respective type of semiconductor device. The test floor controller is in controlling communication with i) at least a second aspect of the semiconductor test system, and ii) each of the at least one virtual appliance.

Abstract: The present invention systems and methods facilitate configuration of functional components included in a remotely located integrated circuit die. In one exemplary implementation, a die functional component reconfiguration request process is engaged in wherein a system requests a reconfiguration code from a remote centralized resource. A reconfiguration code production process is executed in which a request for a reconfiguration code and a permission indicator are received, validity of permission indicator is analyzed, and a reconfiguration code is provided if the permission indicator is valid. A die functional component configuration process is performed on the die when an appropriate reconfiguration code is received by the die. The functional component configuration process includes directing alteration of a functional component configuration. Workflow is diverted from disabled functional components to enabled functional components.

Abstract: A control sever electronically connects a test server via network interfaces. The test server includes multiple storage mediums that store multiple test programs for testing the test server. The control server includes a switching control unit. The switching control unit selects one storage medium from the storage mediums as a startup device of the test server, and sends a control command to run one or more test programs stored in the startup device. In response to receiving a test result from the test server, the switching control unit selects a next storage medium from the storage mediums as a new startup device, and runs one or more test programs stored in the new staring device until all the storage mediums have been selected as startup devices one by one.

Abstract: There is disclosed a recovery node testing system and method. The system and method include copying a protected server image associated with a protected server to a test node and creating a test environment for the test node, the test environment including at least one of the network characteristics of the protected server. The test node may then be activated using the protected server image which may then be connected to the virtual network. Once connected, at least one test is performed on the test node to confirm that the protected server image operating on the test node responds in the same manner as the protected server.

Abstract: Various embodiments of the present invention relate to systems, devices and methods of employing a single-wire data interface to program, debug and test a programmable element. A 1-WireLoader system comprises a programming entity, a physical-layer interface device, a single signal wire and the programmable element. The programming entity generates a command sequence comprising a plurality of commands. Each command in the plurality of commands is associated with a data in a plurality of data. The physical-layer interface device is coupled directly to the programming entity, and indirectly to the programmable element via a single signal wire. A single pin is involved at the interface of the programmable element single pin to receive commands from and exchange data with the programming entity.

Abstract: A data receiver module receives, at a storage device simulator, a data transmission from a storage controller being tested. The data transmission includes data and metadata. The metadata is associated with the data. A signature receiver module receives a signature from the storage controller as part of the data transmission. The signature is used to distinguish the metadata from the data. A data/metadata determination module examines the data transmission and determines data from metadata using the signature. A metadata storage module stores the metadata of the data transmission on the storage device simulator in response to the data transmission including metadata. The data storage simulator includes a data storage device. A data discard module discards the data of the data transmission in response to the data transmission including data.

Abstract: Performance information which is a possible generation cause of a fault is extracted accurately. A fault cause extraction apparatus 10 includes a storage unit 12 and a correlation-destruction-propagation detecting unit 25. Here, the storage unit 12 stores a correlation model including one or more correlation functions, each of which is generated based on a time series of performance information including a plurality of types of performance values in a system and transforms a performance value for one of the types being an input to a performance value for another one of the types being an output.

Abstract: A method of testing a multi-core network processor comprises placing the multi-core network processor in an online environment. A test is performed on a core of the multi-core network processor when the core is idle, and the core is released from the test when it is completed and resumes processing data in the online environment. In another embodiment, a network processor comprises a computer readable instructions module and a processing core. The computer readable instructions module is configured to store test instructions, and the processing core is configured to operate in an online environment and execute the test instructions to test the processing core when the processing core is idle. In yet another embodiment, an apparatus comprises a multi-core network processor that is configured to execute test instructions to perform a test on a core of the multi-core network processor when the core is idle.

Abstract: A system, apparatus, and method for writing trace data to storage. Trace data is captured from one or more processors, and then the trace data is written to a trace buffer. The trace data includes program counters of instructions executed by the processors and other debug data. A direct memory access (DMA) controller in a non-real-time block of the system reads trace data from the trace buffer and then writes the trace data to memory via a non-real-time port of a memory controller.

Abstract: Method, systems and devices for error reporting in a video distribution network are disclosed. A method may include determining that a network communication error has occurred in a video distribution network. The method may also include sending an error reporting interface to a video display. The method may also include receiving a send error report selection via the error reporting interface. In response to receiving the send error report selection, the method may perform at least one action.

Abstract: According to one embodiment, an electronic device includes a test module, a specification module, and a display. The test module is configured to test setting states of items necessary for Internet connection. The specification module is configured to specify a cause of being unable to establish connection to the Internet based on an item regarding which it has been determined by the test module that setting is not correctly carried out. The display is configured to display the cause specified by the specification module.

Abstract: A non-bussed control module that receives an audio code is provided. The non-bussed control module includes a tone processing module, a self-diagnostic module, and a reporting module. The tone processing module receives the audio code, and sends a trigger signal if the audio code is received. The self-diagnostic module performs a self-diagnostic test for the non-bussed control module if the trigger signal is received, and generates a diagnostic signal indicative of the self-diagnostic test. The reporting module receives the diagnostic signal and determines a type of fault based on the diagnostic signal.

Abstract: A method and apparatus of stopping a functional block of an integrated circuit (IC) for debugging purposes is disclosed. In one embodiment, an IC includes a number of functional units accessible by an external debugger via a debug port (DP). During a debug operation, a power controller in the IC may power down a functional unit. When the functional unit is powered off, a first register may be programmed. Responsive to the programming of the first register, a first signal may be asserted and provided to the functional unit. When power is restored to the functional unit, operation of the functional unit may be halted prior to execution of instructions or other operations, responsive to the signal.

Abstract: The collection of performance data at multiple servers in a SAN and forwarding that data to a centralized server for analysis is disclosed. Remote agents and a central server application collect specific interesting negative event data to enable a picture of the operational health of the SAN to be determined. The agents are placed in servers having HBAs acting as initiators. The agents interact with the HBAs through a driver stack to collect event data. Because of the initiator function they perform, HBAs have visibility to parts of the network that other entities do not have access to, and thus are ideal locations for gathering event data. A SAN diagnostics manager then pulls the collected data from each agent so that a “picture” of the SAN can be developed. In addition to collecting initiator data, the agents also collect errors and performance data from the OS of the servers.

Abstract: In a method for adjusting modulation on a network, a modulation profile of a network node on the network is set a specified density. A plurality of messages that are received at the network node are monitored on an ongoing basis. The modulation profile of the network node is updated continually based on the monitored messages. A determination is made that a predetermined class of messages is received incorrectly at the network node. The network node is disconnected from the network based on the incorrectly received predetermined class of messages and is reconnected to the network to initiate the network node on the network.

Abstract: This document discloses a method, apparatus, and computer program for automatically detecting unallowed continuation of a communication protocol procedure in a communication device. The method comprises in a test tool: marking an invalid input applied to the communication device in a sequence of operations of the communication protocol procedure; marking, with a sequence marker, a location that should not be reached in the sequence of operations of the communication protocol procedure as a result of the invalid input; and upon detecting that the communication protocol procedure has reached the location marked with the sequence marker, outputting an indication that the communication device operates in an unallowed manner.

Abstract: An electronic apparatus and a method of controlling the same are provided. The electronic apparatus includes a connector that includes two or more pins to be connected with an external device and transmits and receives a signal to and from the external device, a signal processor that generates a test signal for testing the connector and outputs the test signal to a first pin among the two or more pins, and a controller that determines whether the connector is defective in accordance with characteristics of the test signal received through a second pin short-circuited with the first pin by a short-circuit assistor among the two or more pins. Thus, time for testing a connector of the electronic apparatus is shortened to thereby enhance productivity.

Abstract: Service providers strive to maintain networks with high levels of availability and performance. To maintain the networks, the service providers measure performance and perform network diagnostics. Measuring performance and performing network diagnostics typically involves manual verification of functionality or performing individual tests between user agents. Service providers who maintain networks and service providers who use networks can dynamically run tests with operations of a signaling protocol (e.g., session initiation protocol) to diagnose network problems and determine appropriate responses. An agent manager can coordinate the dynamic tests across multiple user agents to gather more information to increase problem diagnosis accuracy.

Abstract: An automated REpresentational State Transfer (REST) testing tool receives a file representing a set of tests to run on a target test platform and identifies a type of the file. Then the testing tool parses the file based on the type to extract test parameters, and performs test actions on the target test platform based on the test parameters.

Abstract: A test system for debugging a target device includes a switch unit configured to transfer a test signal to the target device, the target device including a first intellectual property (IP) block supporting a debugging operation at a normal mode and a second IP block supporting a debugging operation at a power saving mode. The switch unit is configured to form a first signal transfer path for transferring the test signal to the first IP block at the normal mode and to form a second signal transfer path for transferring the test signal to the second IP block at the power saving mode.

Abstract: A method of testing a device is disclosed. Test data is obtained for a device testing program that tests the device. An adaptation command for testing the device is determined at an adaptive testing engine using obtained test data. The adaptation command is sent from the adaptive testing engine to a tool control application. The tool control application uses the adaptation command to control an operation related to the testing of the device.

Abstract: A mechanism is provided for effectively validating execution units within a processor. A branch test pattern is generated for execution by an execution unit that is under validation testing. An execution pattern is selected from a set of execution patterns thereby forming a selected execution pattern. The selected execution pattern is loaded into a condition register. The branch test pattern is executed by an execution unit based on the selected execution pattern in the condition register. Responsive to the branch test pattern ending, values output from the execution unit during execution of the branch test pattern are compared to a set of expected results. Responsive to a match of the comparison, the process is repeated for each execution pattern in the set of execution patterns. Responsive to a match of the comparison for the execution patterns in the set of execution patterns, the execution unit is validated.

Abstract: A method of network testing relies on communication with an unaddressed test device. The method includes collection of network addresses from packets passing through the test device and a discovery procedure. The collected addresses are provided to a remote control device, and used for communication between the test device and the control device.

Abstract: An apparatus having a memory and multiple processors coupled to the memory is disclosed. The memory may be configured to store middleware. One or more processors may be configured to (a) generate initial test vectors to test one or more software modules executed on the processors and (b) generate modified test vectors by translating the initial test vectors in the middleware to a format that matches multiple hardware dependencies of the processors and multiple software dependencies of multiple operating systems. The test vectors generally have another format that is independent of (a) the hardware dependencies of the processors and (b) the software dependencies of the operating systems executed by the processors. The processors may be configured to generate a plurality of test results by exercising the software modules with the modified test vectors.

Abstract: Administering incident pools including receiving, by an incident analyzer from an incident queue, a plurality of incidents from one or more components of the distributed processing system; assigning, by the incident analyzer, each received incident to a pool of incidents; assigning, by the incident analyzer, to each incident a particular combined minimum time for inclusion in one or more pools, each particular combined minimum time corresponding to a particular incident; in response to the pool closing, determining, by the incident analyzer, for each incident in the pool whether the incident has met its combined minimum time for inclusion in one or more pools; and if the incident has been in the pool for its combined minimum time, including, by the incident analyzer, the incident in the closed pool; and if the incident has not been in the pool for its combined minimum time, including the incident in a next pool.

Abstract: Administering incident pools including receiving, by an incident analyzer from an incident queue, a plurality of incidents from one or more components of the distributed processing system; assigning, by the incident analyzer, each received incident to a pool of incidents; assigning, by the incident analyzer, to each incident a particular combined minimum time for inclusion in one or more pools, each particular combined minimum time corresponding to a particular incident; in response to the pool closing, determining, by the incident analyzer, for each incident in the pool whether the incident has met its combined minimum time for inclusion in one or more pools; and if the incident has been in the pool for its combined minimum time, including, by the incident analyzer, the incident in the closed pool; and if the incident has not been in the pool for its combined minimum time, including the incident in a next pool.

Abstract: A technique for injecting errors into a codeword includes generating a codeword that includes data bits and one or more checkbits. One or more bit errors are injected into the codeword by modifying at least one of the one or more checkbits.

Abstract: Methods and apparatus for output of high-bandwidth debug data/traces in electronic devices using embedded high-speed debug port(s). Debug data is received from multiple blocks and buffered in a buffer. The buffer's output is operatively coupled to one or more high-speed serial I/O interfaces via muxing logic during debug test operations. The buffered data is encoded as serialized data and sent over the one or more high-speed serial I/O interfaces to a logic device that receives serialized data and de-serializes it to generate parallel debug data that is provided to a debugger. The buffer may be configured as a bandwidth-adapting buffer that facilitates transfer of debug data that is received at a variable combined data rate outbound via the one or more high-speed serial I/O interfaces at a data rate corresponding to the bandwidth of the serial I/O interfaces.

Abstract: A method of preparing a test for an electronic system including a plurality of pieces of equipment interconnected by at least one communications link, in which method, in order to perform the test, use is made of a test bench appropriate for the electronic system under test, which test bench is connected to the system and controlled in application of a command sequence established from at least one informal functional specification; while preparing the test, the informal functional specification, the command sequence, and a link identifying the informal functional specification from which the command sequence was established are all recorded so that after execution of the command sequence and after the test results have been recorded, it is possible to read the link and identify unambiguously the informal functional specification that corresponds to the test results obtained.

Abstract: A method and a micro telecom computing architecture (MicroTCA) system for expanding MicroTCA are provided. On a backplane of a MicroTCA system, an advanced mezzanine card (AMC) connector and a joint test action group (JTAG) testing unit connector are set into at least one AMC slot. Setting the JTAG testing unit connector by using the existing AMC slot prevents occupying exclusive backplane space by setting another JTAG slot, and thus saves backplane space. Furthermore, after the test is completed, an AMC can be plugged in and the normal use of the AMC is not affected.

Abstract: A system-on-chip includes first and second memories, a descrambler, and logic. The first memory stores firmware. A first portion of the firmware is scrambled and located at a predetermined address in the first memory. The second memory stores boot code for a processor. In response to the processor being booted, the boot code instructs the processor to read the first portion of the firmware from the predetermined address in the first memory. The descrambler is configured to create a descrambled value by descrambling the first portion of the firmware. The logic is configured to, in response to the descrambled value matching a predetermined authorization code, enable a test interface that allows a device external to the system-on-chip to access the processor through the test interface. The logic is further configured to, in response to the descrambled value not matching the predetermined authorization code, disable the test interface.

Abstract: Fixing a problem is usually greatly aided if the problem is reproducible. To ensure reproducibility of a multiprocessor system, the following aspects are proposed: a deterministic system start state, a single system clock, phase alignment of clocks in the system, system-wide synchronization events, reproducible execution of system components, deterministic chip interfaces, zero-impact communication with the system, precise stop of the system and a scan of the system state.

Abstract: The present disclosure provides a motherboard testing apparatus and method. The motherboard testing method includes following steps. A motherboard testing apparatus is provided. The testing computer and the testing device are electrically connected to a motherboard. The testing computer runs an operating system based on the motherboard. The testing computer receives an input testing times and sends the input testing times and a running signal to the testing device. The testing device powers off the motherboard, reduces the input testing times by 1 to a current testing times after a period of determined time, and powers on the motherboard after determining that the current testing times is greater than 0.

Abstract: A method and a device for creating a pattern matching state machine are provided. The method includes: obtaining a predefined keyword set; generating a Goto function according to the keyword set; constructing a Failure function according to the generated Goto function, and setting that an acceptable input set of the Failure state of each state is not a subset of an acceptable input set of the state, where the acceptable input set of the state indicates that when any symbol within the symbol set is input in the state, the Goto function of the state does not fail; and generating an Output function according to the Goto function and the Failure function.

Abstract: A set of self-service testing tools and processes used to conduct gateway to gateway testing. The system includes a test harness comprising a collection of software and test data configured to test a program unit by running it under varying conditions and monitoring its behavior and outputs. The test harness allows for the automation of tests, and can call functions with supplied parameters and analyze results to a desired value.

Abstract: Disclosed is a remote communication system and method. A remote communication system includes a digital protection relay and a remote monitoring system. The digital protection relay stores and maintains fault indices for identifying a predetermined number of faults that have occurred, fault time tags corresponding to the fault indices and fault data corresponding to the fault indices. The remote monitoring system sets a fault index, a fault time tag, a fault data block size to be communicated at a time and a fault data block index for specifying a fault data block to be communicated, and requests the digital protection relay of a fault data block.

Abstract: In one embodiment, a concurrent processing system is disclosed. For example, in one embodiment of the present invention, a concurrent processing system, comprises a first processing element comprising a first monitor module, a second processing element in communication with the first processing element, the second processing element comprising a second monitor module, and a first system monitor for receiving a notification from at least one of: the first processing element, or the second processing element, wherein the notification indicates an event detected by one of the first monitor module, or the second monitor module.

Abstract: The disclosure describes a novel method and apparatus for improving the operation of a TAP architecture in a device through the use of Command signal inputs to the TAP architecture. In response to a Command signal input, the TAP architecture can perform streamlined and uninterrupted Update, Capture and Shift operation cycles to a target circuit in the device or streamlined and uninterrupted capture and shift operation cycles to a target circuit in the device. The Command signals can be input to the TAP architecture via the devices dedicated TMS or TDI inputs or via a separate CMD input to the device.

Abstract: A debugging system using optical transmission comprises a sending side and a receiving side. The sending side comprises a debugging-data-generation unit, a modulation unit, and an optical-transmission apparatus. The debugging-data-generation unit generates debugging data according to an operation of the sending side. The modulation unit modulates the debugging data to generate a modulation signal. The optical-transmission apparatus coupled to the modulation unit converts the modulation signal into a first light and transmits the first light. The receiving side comprises an optical-receiving apparatus, a demodulation unit and a data storage device. The optical-receiving apparatus receives the first light and converts the first light into the modulation signal. The demodulation unit is coupled to the optical-receiving apparatus and demodulates the modulation signal into the debugging data. The data storage device receives and saves the debugging data.

Abstract: A SFP checking device (SFP Check) connects to a SFP transceiver and a PC or laptop via a USB cable. The SFP Check uses the default web browser of the PC, without an internet connection, to display details of the SFP transceiver such as wavelength, description, range, manufacturer, among other information, in accordance with program code provided to the PC via the SFP Check. All of the information a technician in the field needs to determine which SFP transceiver is the right one for a selected application and optical link is available from the SFP Check. The SFP Check and SFP transceiver both receive power via the USB cable connection to the PC. The SFP Check appears to the PC as a memory stick. A method is provided for determining the drive letter associated with the SFP Check and the program coder or file(s) it provides to the PC.

Abstract: A method for the remote maintenance of devices that include a computer by way of a remote maintenance computer. At least one protocol is used to exchange data between the local computer and the remote maintenance computer. The protocol adaptation level is provided which, prior to a data transfer process, evaluates the protocol for exchanging data between the computer and the remote maintenance computer in terms of the compatibility of the protocol with the upcoming data transfer process. If necessary, the protocol is adapted.

Abstract: A debugging device for performing a debugging process through an electronic device external connector system is provided. The debugging device performs the debugging process to a target system, and the device comprises a first external connector, a switch, and a debugging module. The first external connector is connected to the external port of the target system. The switch is connected to the first external connector, and the switch chooses to activate the debugging process. The debugging module is connected to the switch, and the debugging module receives a universal asynchronous receiver/transmitter (UART) signal provided by the target system.

Abstract: A debug stub server comprises: an arbitration unit that receives a plurality of control instructions given to a debug program from a plurality of information terminals, selects a simultaneously executable control instruction set from among the plurality of control instructions by arbitrating the plurality of control instructions, and forwards the selected control instruction set to the debug program; and a forwarding unit that forwards a debug result obtained by the debug program based on the control instruction set selected by the arbitration unit to the plurality of information terminals.

Abstract: Computer-implemented methods and systems are provided for scanning web sites and/or parsing web content, including for testing online opt-out systems and/or cookies used by online systems. In accordance with one implementation, a computer-implemented method is provided for testing an opt-out system associated with at least one advertising system that uses cookies. The method includes transmitting a first request to an opt-out system, wherein the first request corresponds to a first test for testing at least one of the opt-out system and an advertising system; receiving a first stream sent in response to the first request; determining a first outcome of the first test based on the first stream; and generating a report based on the first outcome.

Abstract: The processor allows an apparatus to repeat the to-be-tested processing plural times and perform the disconnecting operation, that disconnects a device from the apparatus by the switch or the connecting operation that connects the device to the apparatus by the switch, at different timings during the to-be-tested processing whenever the to-be-tested processing is repeated in the apparatus. By doing this, it is possible to shorten the time required to test the to-be-tested processing.