Abstract: System, method, and non-transitory medium for ranking runs of test scenarios belonging to a cluster. Runs by users on software systems that belong to different organizations are clustered to clusters of similar runs. The runs involve executing transactions instantiated from transaction types. A first processor receives a selection of a certain transaction type, and calculates a first number of different organizations associated with users that ran test scenarios involving execution of a transaction instantiated from the certain transaction type. A second processor receives a selection of a certain cluster from the clusters and calculates, based on runs belonging to the certain cluster, a second number of different organizations associated with users that ran certain test scenarios involving execution of a transaction instantiated from the certain transaction type. A ranking module ranks runs of test scenarios belonging to the certain cluster according to the first and the second numbers.

Abstract: Mechanisms for preventing a distribution of a failure caused by a sequence of instructions in a distributed client server environment are provided. These mechanisms comprise executing the sequence of instructions on a first client, the instructions being provided by a management control server and being indicative of maintenance actions. These mechanisms may further comprise determining by the first client a failure caused by the sequence of instructions, and generating a warning message by the first client based on the determined failure. The warning message may comprise an indicator for the sequence of instructions. In addition, these mechanisms may comprise sending the warning message for informing a second client about the sequence of instructions causing the failure in order to prevent a distribution of the failure.

Abstract: A first computer receives one or more pre-defined equivalence classes, wherein a pre-defined equivalence class comprises of one or more substantially equivalent values. The first computer receives a plurality of messages transmitted between a second computer and a third computer, wherein each message has at least one parameter and each parameter has at least one corresponding value. The first computer determines one or more parameters have one or more values that match one or more values of a pre-defined equivalence class. The first computer creates one or more value driven equivalence classes, wherein each value driven equivalence class comprises of one or more parameters and wherein each of the one or more parameters in each value driven equivalence class has the same corresponding value. The first computer creates a generalized test case, wherein the generalized test case includes at least the one or more value driven equivalence classes.

Abstract: A technique for controlling scan access of multiple scan devices (including or more slave scan devices and a master scan device) to a scan chain includes sending, by a requesting slave scan device included in the one or more slave scan devices, a first request for access to the scan chain to the master scan device. The master scan device and the one or more slave scan devices are connected to the scan chain. The technique also includes receiving, at the requesting slave scan device, an evaluation result from the master scan device and accessing, by the requesting slave scan device, the scan chain in response to the evaluation result indicating access granted. Finally, the technique includes sending, by the requesting slave scan device, one or more second requests for access to the scan chain to the master scan device in response to the evaluation result indicating access denied.

Abstract: A technique for controlling scan access of multiple scan devices (including or more slave scan devices and a master scan device) to a scan chain includes sending, by a requesting slave scan device included in the one or more slave scan devices, a first request for access to the scan chain to the master scan device. The master scan device and the one or more slave scan devices are connected to the scan chain. The technique also includes receiving, at the requesting slave scan device, an evaluation result from the master scan device and accessing, by the requesting slave scan device, the scan chain in response to the evaluation result indicating access granted. Finally, the technique includes sending, by the requesting slave scan device, one or more second requests for access to the scan chain to the master scan device in response to the evaluation result indicating access denied.

Abstract: A flexible system for collecting and reporting instrumentation metrics relating to performance of a software product. Computing devices that execute the software product receive a manifest that specifies the manner in which instrumentation metrics are collected and reported, including what instrumentation metrics are collected. Based on the manifest, an instrumentation metrics client associated with a software product may retrieve instrumentation data from a software product or other sources. The metrics client may then generate one or more instrumentation metrics, based on the instrumentation data, in accordance with instructions in the manifest. The metrics client may then take one or more actions based on the instrumentation metrics and the manifest, such as reporting the information to an instrumentation metrics server for aggregation and analysis by the metrics server or performing escalation actions that can modify the metrics collected and reported.

Abstract: A circuit includes a circuit identification storage module and a control module. The circuit identification storage module stores circuit identification information. The control module receives the circuit identification information and in response thereto selectively performs a secure boot procedure or a test boot procedure. The control circuit performs the secure boot procedure when the circuit identification information indicates that the circuit is a production circuit. The control circuit performs the test boot procedure when the circuit identification information indicates that the circuit is a test circuit. A related method is also disclosed.

Abstract: A programmable characterization-debug-test engine (PCDTE) on an integrated circuit chip. The PCDTE includes an instruction memory that receives and stores instructions provided on a chip interface, and a configuration memory that receives and stores configuration values provided on the chip interface. The PCDTE also includes a controller that configures a plurality of address counters and data registers in response to the configuration values. The controller also executes the instructions, wherein read/write addresses and write data are retrieved from the counters in response to the instructions. The retrieved read/write addresses and write data are used to access a memory under test. Multiple ports of the memory under test may be simultaneously accessed. Multiple instructions may be linked. The instructions may specify special counting functions within the counters and/or specify integrated (linked) counters.

Abstract: A method for fault recognition in a distributed real-time computer system comprising fault containment units (FCUs), which has a global timebase, wherein the fault containment units communicate by means of messages via at least one message distribution unit, wherein a commitment time is associated with a message formed by a fault containment unit, and wherein a message distribution unit that receives a message relays the message to one or more fault containment units operating in parallel, and wherein a processing fault containment unit (VFCU) does not transmit or use any of its results that are influenced by one or more of the received messages to the environment of the processing fault containment unit before the commitment times associated with the received messages.

Abstract: Certain embodiments generally relate to equipment under test measurements and reports, such as, but not limited to methods and apparatuses for a remote modular test system. For example, the method may include determining a test strategy (TS) file based on input from cloud-based equipment under test questionnaire and a cloud-based standards library. The method may also include reading the TS via a system controller. The method may further include configuring test hardware, for example, analyzers and power meters via a test RF system interface based on the read TS. The method may also include sequentially executing the TS based on the configuring. The method may further include generating a test document comprising result data. The method may also include uploading and processing the generated test document in the cloud. The method may further include grouping and compiling the generated test document in a predetermined layout.

Abstract: The present invention relates to a smart terminal fuzzing apparatus and method using a multi-node structure. The smart terminal fuzzing apparatus includes a fuzzing command management unit for managing fuzzing instructions corresponding to performance of fuzzing. An algorithm management unit creates fuzzing commands based on the fuzzing instructions, and distributes the fuzzing commands to a plurality of fuzzing nodes connected to a fuzzing client depending on a distribution algorithm. A fuzzing client management unit performs control such that fuzzing is performed by the plurality of fuzzing nodes in compliance with the fuzzing commands through the fuzzing client. A log management unit receives results of performance of fuzzing from the plurality of fuzzing nodes and manages the fuzzing results.

Abstract: A method, computer program product, and system for running an executable during a debug session is described. A method may comprise running, via a computing device, a daemon during a debug session, the debug session facilitated, at least in part, by a dynamic tracing tool. The method may further comprise receiving, via the daemon, one or more commands from the dynamic tracing tool. The method may additionally comprise in response to receiving the one or more commands from the dynamic tracing tool, initiating an executable.

Abstract: The present invention relates to an automatic testing apparatus used for testing a tested device. The automatic testing apparatus is fixed on a first side of a testing platform. The tested device executes a testing program while being tested, and transmits a test signal to a control unit of the testing platform for controlling a driving testing unit or a multimedia testing module to test the tested device and hence testing the tested device automatically. Thereby, testing costs can be saved and artificial factor affecting the test results can be avoided.

Abstract: A semiconductor device and a test apparatus including the same, the semiconductor device including a command distributor receiving a serial command that is synchronized with a first clock signal and converting the serial command into a parallel command, a command decoder receiving the parallel command and generating a pattern sequence based on the parallel command, and a signal generator receiving the pattern sequence and generating operating signals synchronized with a second clock signal, wherein a frequency of the first clock signal is less than a frequency of the second clock signal.

Abstract: An improved testing assessment tool and methodology maps the Testing Maturity Model (TMM) structure to individual test areas, thereby enabling comprehensive and targeted improvement. In this way, the present invention uses the five TMM maturity levels to assess individual areas, rather than merely assigning a single maturity level to the entire organization. Embodiments of the present invention include a quick assessment that includes a relatively small number of questions to be subjectively answered using the TMM hierarchy. Embodiments of the present invention further include a full assessment that includes a relatively large number of questions to be discretely answered, with these results being use to evaluate various testing areas using the TMM hierarchy.

Abstract: Results of field testing of portions of a distributed system such as a Broadband Communications System are communicated from a testing device to a device including a display which downloads test protocols to the testing device. The testing device can thereafter operate in a stand-alone manner and transfer the results of testing and analysis to a device including a display that may comprise virtually any wireless communication device by storing an application or information therein. The communication device can transfer captured test data and analysis to a central facility for storage, further analysis and/or management purposes.

Abstract: A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.

Abstract: A system and method may comprise providing to a device user in response to one of a user request for troubleshooting assistance and a mobile telecommunications user device monitoring software conclusion that a problem exists, a diagnostic application specific to the mobile telecommunication user device of the device user; receiving from the device user an indication of a problem with the mobile telecommunication user device experienced by the device user; selecting an application update; providing to the device user the application update updating an application running on the mobile telecommunication user device; and determining whether the problem has been solved. If determining indicates that the problem has not been solved the method may further include deleting the application and further determining whether the problem has been solved, and if so forwarding problem solution data to a knowledge database.

Abstract: A field communication test device is provided on a field bus, to which a plurality of field equipments are connected, and also connected to a debug network to apply a communication test to respective field equipments. The field communication test device transmits/receives cooperation data, which is used to apply the communication test in cooperation with each other, to and from other field communication test device provided on the field bus, via the debug network, and transmits test data for the communication test to the respective field equipments via the field bus base on the cooperation data.

Abstract: A monitoring device specifies a failure part in a first device group including a plurality of information processing devices and a relay device relaying access of the plurality of information processing devices. The monitoring device includes a determination unit and a test controller. The determination unit determines whether one or more destination addresses of information transmitted from the relay device to outside of the first device group, include an address of a storage device included in a second device group connected to the first device group through the relay device, where the storage device is a destination of access of at least one of the plurality of information processing devices. The test controller causes one of the plurality of information processing devices to execute a communication test with respect to the address of the storage device.

Abstract: A method for detecting unstable signatures when testing a VLSI chip that includes adding to an LFSR one or more save and restore registers for storing an initial seed consisting of 0s and 1s; loading the initial seed into the LFSR and one or more save and restore registers; initializing a MISR and running test loops. Upon reaching a predetermined number of test loops, moving a signature of the MISR to a shadow register; then, performing a signature stability test by loading the initial seed to the LFSR; executing the predetermined number of BIST test loops, and comparing a resulting MISR signature for differences versus a previous signature stored in a MISR save and restore register, wherein unloading is performed by way of serial MISR unloads and single bit XORs.

Abstract: A system includes a first obtaining unit that, when a failure occurs in the system, obtains via a first route failure information held by devices connected with a first processing unit and a second processing unit, respectively through a first route and a second route, a second obtaining unit that obtains the failure information through the second route when the failure information is not able to be obtained by the first obtaining unit, a second failure location estimation unit that estimates a failure causing location based on the failure information obtained by the second obtaining unit, an identification unit that identifies a subject using the failure location estimated by the second failure location estimation unit, and a termination unit that terminates the subject identified by the identification unit.

Abstract: A test device is provided for testing a device under test (DUT) having a control interface compliant with a standard selected from a plurality of standards each supporting a common set of management data input/output (MDIO) and non-MDIO control signals. The test device includes a test interface and an integrated control interface. The integrated control interface adapts to the standard with which the control interface of the DUT complies, so that the integrated control interface directly and fully controls the DUT via at least the common set of MDIO and non-MDIO control signals. The integrated control interface exchanges control signals selected from the common set of MDIO and non-MDIO control signals with the control interface of the DUT to monitor the DUT and thereby obtain status information about the DUT.

Abstract: The invention relates to a method and a device (72) for diagnosing and remotely controlling a host computer (74), in particular a computer which is incorporated in a network and has a local bus (50). The device (72) comprises a network connection (41) via which bidirectional data transmission from the network and into the network is carried out by the host computer (74).

Abstract: A device for testing a graphics card is presented. The device includes a core test apparatus. The core test apparatus includes a processor configured to perform a test operation on a graphics card and a power interface for transferring electric energy to the core test apparatus. Using the device for testing a graphics card provided by the present invention makes a graphics card test easier and more efficient.

Abstract: Allocating test capacity from cloud systems can include identifying a product to be tested. Allocating test capacity from cloud systems can include automatically allocating a test capacity during runtime in response to the identification, the test capacity being provided by a test controller coupled to a cloud system.

Abstract: A redundancy control system and method of transmitting computational data are provided, for detection of transmission errors and failure diagnosis, including generating first computational data and generating first generated data using a first generation algorithm for error detection; generating second computational data and generating second generated data using a second generation algorithm for error detection; comparing the first/second computational data; transmitting transmission data including coincident computational data and the first/second generated data; generating, in the receiving device, computational data and third/fourth generated data from preset first/second generation algorithms; and comparing the first/third generated data and the first/third generated data, and detecting the presence or absence of an error in the received computational data.

Abstract: Systems and methods for detecting faults in a system. The method comprising maintaining diagnostic history for one or more system components; receiving system information about operational state and relational interaction among system components; determining if one or more system components are to be examined, in response to performing an analysis of the diagnostic history, wherein the analysis is performed to determine if the diagnostic history includes any information that may indicate that certain system components or combinations of components are suspected of causing a problem detected in the system, wherein the diagnostic history is maintained based on an at least one examination performed on said one or more components when said one or more components were installed in a system other than the system in which the problem is detected.

Abstract: An integrated circuit includes a bus; a processing unit configured to execute a user program; and a debugging circuit connected to the bus, the debugging circuit transferring a command in a command register to the processing unit via the bus in response to a command transfer request from the processing unit, wherein, when the processing unit halts the execution of the user program and makes a request for the command transfer request to the debugging circuit, the debugging circuit makes a response for freeing the use right of the bus from the processing unit in a period between the command transfer request and the command transfer operation.

Abstract: Disclosed is a method for testing an application in a testing agent which resides on an application layer of a mobile communication terminal mounted with a platform designed so that applications of the application layer operate independently from each other and a command is not directly transferred between the applications. The method includes: receiving a command for testing a test target application from a testing apparatus; generating an event corresponding to the transferred command; and registering the generated event in a window manager positioned on a framework layer in order to transfer the generated event to the test target application.

Abstract: A system for testing an integrated circuit, in which the system includes a deserializer, a frame sync module, and a diagnostic module. The deserializer is external to the integrated circuit and is configured to receive messages in a serial data format, wherein the messages include test results associated with the integrated circuit, and deserialize the messages into data frames. The frame sync module is configured to provide control code based on the data frames, wherein the control code includes, in a digital format, status information associated with the messages deserialized into the data frames. The diagnostic module is configured to generate, based on the control code, diagnostic data associated with states of the integrated circuit.

Abstract: A system is provided for collecting defect data of components in a passenger cabin of a vehicle that includes, but is not limited to a component identification device for identifying an affected component, and a malfunction selection device, connected to the component identification device, for selecting a malfunction of the identified component from a predefined quantity of component-specific malfunctions. The system includes, but is not limited to a locating device for acquiring a position of the affected component in the passenger cabin, with the aforesaid being connected to the component identification device. In this manner, by means of devices that are very simple to use, imprecise positioning information, component information and malfunction information can be avoided.

Abstract: A method and apparatus of stopping a functional block of an integrated circuit (IC) for debugging purposes is disclosed. In one embodiment, an IC includes a number of functional units accessible by an external debugger via a debug port (DP). During a debug operation, a power controller in the IC may power down a functional unit. When the functional unit is powered off, a first register may be programmed. Responsive to the programming of the first register, a first signal may be asserted and provided to the functional unit. When power is restored to the functional unit, operation of the functional unit may be halted prior to execution of instructions or other operations, responsive to the signal.

Abstract: A method and system for transmitting data corresponding to at least one endpoint device problem in a packet communications network is described. Specifically, an endpoint device detects at least one problem that pertains to the endpoint device. The endpoint device then generates data pertaining to the endpoint device problem. Lastly, the endpoint device then transmits the data detailing that endpoint device problem to the packet communications network.

Abstract: A distributed system according to an exemplary embodiment includes first and second servers capable of executing the same application, wherein when a failure occurs in the application in the first server, the first server generates failure information identifying a cause of the failure in the application, and the second server performs failure prevention processing which is determined based on the failure information and intended to prevent a failure in the application.

Abstract: Systems and methods for providing automated problem reporting in elements used in conjunction with computer networks are disclosed. The system comprises a plurality of elements that perform data migration operations and a reporting manager or monitor agent which monitors the elements and data migration operations. Upon detection of hardware or software problems, the reporting manager or monitor agent automatically communicates with elements affected by the problem to gather selected hardware, software, and configuration information, analyzes the information to determine causes of the problem, and issues a problem report containing at least a portion of the selected information. The problem report is communicated to a remote monitor that does not possess access privileges to the elements, allowing automated, remote monitoring of the elements without compromising security of the computer network or elements.

Abstract: Methods and systems for implementing self-testing of packet processing devices are disclosed. For example, a packet-processing device can include a plurality of ports having a receive media access controller (RX MAC) and a transmit media access controller (TX MAC). The TX MAC of a first port is selectably configurable to loop back packets to its respective RX MAC during the self-testing. The packet-processing device can further include a switching engine configured to provide a test packet received from a packet generator to the TX MAC of the first port, and route to the TX MAC of one or more second ports at least the test packet received from the RX MAC of the first port, or a copy of the received test packet, after the received test packet or its copy has been looped-back one or more times between the TX MAC and the RX MAC of the first port.

Abstract: The CPU includes: a data transmission instruction output processor; a failure detection signal input processor to which a failure detection signal is input from a failure detection processor for detecting a failure of an input unit; a data storage memory for, each time an input data update processor of the input unit updates data, storing the updated data; and a CPU operation processor for obtaining input data from the data storage memory and obtaining a detection signal from the failure detection signal input processor to perform operation processing. The CPU operation processor obtains periodic data as of an amount of time given by the following expression ago: {ROUNDUP(T22/T1)}×T1 where T22 is the failure detection processing time of the failure detection processor, T1 is the data transmission instruction output period of the data transmission instruction output processor, and ROUNDUP is a function of rounding up to the nearest integer.

Abstract: A plurality of first performance counter modules is coupled to a plurality of processing cores. The plurality of first performance counter modules is operable to collect performance data associated with the plurality of processing cores respectively. A plurality of second performance counter modules are coupled to a plurality of L2 cache units, and the plurality of second performance counter modules are operable to collect performance data associated with the plurality of L2 cache units respectively. A central performance counter module may be operable to coordinate counter data from the plurality of first performance counter modules and the plurality of second performance modules, the a central performance counter module, the plurality of first performance counter modules, and the plurality of second performance counter modules connected by a daisy chain connection.

Abstract: Provided is a web-based software debugging apparatus and method for remote debugging. The web-based software debugging apparatus may include: a web interface to provide a web browser that enables a user to make a request for a debugging service for software performed in a remote target system, and to verify a debugging result of the software; a debugger client to receive the debugging service request for the software via the web interface, and to provide the debugging result to the web interface; and a debugger server to receive the debugging service request from the debugger client, and to transmit the debugging result to the debugger client after debugging the software through a connection to the target system according to the debugging service request.

Abstract: Apparatus, systems, and methods disclosed herein may cause an event trigger state machine associated with a programmable on-chip logic analyzer (POCLA) to transition to a programmable state at a programmable number of occurrences of a programmable set of events associated with a first subset of signals on a first subset of input signal paths. States associated with a second subset of signals on a second subset of input signal paths may be stored at a time relative to a transition to the programmable state if a set of storage criteria have been met. Additional embodiments are disclosed and claimed.

Abstract: A system including a frame capture module, a serializer, and a deserializer. The frame capture module is configured to receive, from a device under test, data corresponding to test results, and package the data into first data frames. The serializer is configured serialize the first data frames to form serial messages that include serialized data. The serializer includes i) a first serial link configured to output the serial messages according to a first clock domain, and ii) a second serial link configured to output the serial messages according to a second clock domain. The deserializer is configured to deserialize the serial messages received on the first serial link and the second serial link to form second data frames.

Abstract: In one embodiment, a concurrent processing system is disclosed. For example, in one embodiment of the present invention, a concurrent processing system, comprises a first processing element comprising a first monitor module, a second processing element in communication with the first processing element, the second processing element comprising a second monitor module, and a first system monitor for receiving a notification from at least one of: the first processing element, or the second processing element, wherein the notification indicates an event detected by one of the first monitor module, or the second monitor module.

Abstract: A plurality of processing cores, are central storage unit having at least memory connected in a daisy chain manner, forming a daisy chain ring layout on an integrated chip. At least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and the central storage unit detects the trace data and stores the trace data in the memory co-located in with the central storage unit.

Abstract: Systems and methods for collecting data related to events that occur in a wireless network. The method comprises receiving a data reporting profile which includes a series of executable commands which include a series of logical rules governing the manner in which reporting data should be generated and reported, compiling the executable commands of the data reporting profile into collection schema for collecting and reporting the reporting data according to the logical rules of the data reporting profile, creating a plurality of triggering criteria when reporting data should be generated based on the collection schema, creating a plurality of memory where the reporting data may be stored according to the collection schema, and scheduling the transfer of reporting data according to the collection schema.

Abstract: A mobile terminal for reporting an exception or error and a method thereof, by which an exception of the mobile terminal can be transmitted to a server in a transmission mode appropriate for a status of a network. Exception information, such as information of a register of the mobile terminal if the exception is generated, information of a task performed by the mobile terminal before the generation of the exception, and history information before the generation of exception, are stored in a memory. The exception information is transmitted to the server.

Abstract: A computer-implemented method, system, and computer program product for a web-based integrated test and debugging system is provided. The method includes configuring a proxy widget on a server to communicate with a debug widget on a browser, and configuring the proxy widget to communicate with an integrated development environment (IDE) external to the server. The method also includes running a process on the server associated with one or more process-control widgets on the browser. The method further includes polling the IDE via the proxy widget to access a debug and test infrastructure of the IDE for debug data associated with the process, and relaying the debug data associated with the process from the proxy widget to the debug widget to provide web-based integration of testing and debugging on the browser while the process is running on the server.

Abstract: An abnormality locating apparatus locates an abnormal location in a network. An abnormal location judging part judges a normality or abnormality of a link based on a normality or abnormality of an observation flow, by acquiring information of links through which each observation flow passes, from a network route information storage that stores passing route information of observation flows passing through the links. A diagnosis accuracy judging part judges that an accuracy of judging the normality or abnormality of a connecting link connected to a first node deteriorates, by acquiring links connected to each relay node as connecting links from a relay node connecting link information storage that stores connecting link information of each relay node, and judging that a relay node having all connecting links thereof that are abnormal is the first node having all observation flows passing therethrough that are abnormal.

Abstract: A program on a plurality of processing units executes test input data. In the case where an error occurs so that processing of the program is not completed normally, it is determined that a test performed by using the input data failed. Meanwhile, in the case where an error does not occur so that processing of the program is completed normally, if the same feature pattern as that of the input data is stored in a storing unit which stores feature patterns of the executed input data, it is determined that the test performed by using the input data succeeded, while if the feature pattern is not stored in the storing unit, the result of the test performed by using the input data is judged based on the result of comparing the expected data with result data of the program.

Abstract: A computing device includes a processor, firmware, a hardware component, and a debugging module. The firmware stores error decoding logic particular to the computing device. The hardware component detects an error in the computing device, and responsively issues an interrupt and halts the processor such that the processor cannot execute any more computer-readable code. The debugging module loads the logic from the firmware at reset and executes the logic responsive to the interrupt. The debugging module does not use the processor to execute the logic, the firmware is not part of the debugging module, and the debugging module is not part of the hardware component. The firmware may also store a mapping between registers of the hardware component and field-replaceable hardware units of the computing device, which the debugging module loads at reset and uses when executing the error decoding logic to determine which unit has caused the error.