Particular Stimulus Creation Patents (Class 714/32)
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Publication number: 20140059382Abstract: A method of testing a device is disclosed. Test data is obtained for a device testing program that tests the device. An adaptation command for testing the device is determined at an adaptive testing engine using obtained test data. The adaptation command is sent from the adaptive testing engine to a tool control application. The tool control application uses the adaptation command to control an operation related to the testing of the device.Type: ApplicationFiled: August 22, 2012Publication date: February 27, 2014Applicant: International Business Machines CorporationInventors: David E. Atkinson, Matthew S. Grady, Donald L. LaCroix, David B. Lutton, II, Bradley D. Pepper, Randolph P. Steel
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Publication number: 20140059384Abstract: Embodiments of the invention include methods, apparatuses, and systems for automatically identifying a synchronization sub-pattern associated with a test pattern. A test and measurement instrument is triggered in response to a first instance of a trigger pattern in a data stream. A trigger-to-trigger counter begins counting at the time of the first trigger event. The test and measurement instrument is again triggered in response to a second instance of the trigger pattern in the data stream. The count is ended at this time. The count is then compared to a predefined length of the test pattern, and if equal, it is automatically determined that the trigger pattern is the unique synchronization sub-pattern associated with the test pattern.Type: ApplicationFiled: August 22, 2012Publication date: February 27, 2014Applicant: TEKTRONIX, INC.Inventor: Que Thuy Tran
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Publication number: 20140053024Abstract: In some embodiments, a PPM interface for a computing platform may be provided with functionality to facilitate, to an OS through the PPM interface, hardware component error injection.Type: ApplicationFiled: November 21, 2012Publication date: February 20, 2014Inventors: Sarathy Jayakumar, Jose Andy Vargas, Mohan Kumar
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Publication number: 20140047272Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes selecting, based on a user selection received via a user interface, a workload for execution on a cluster of nodes of the computing system. The workload is selected from a plurality of available workloads including an actual workload and a synthetic test workload. The method further includes configuring the cluster of nodes of the computing system to execute the selected workload such that processing of the selected workload is distributed across the cluster of nodes. The synthetic test workload may be generated by a code synthesizer based on a set of user-defined workload parameters provided via a user interface that identify execution characteristics of the synthetic test workload.Type: ApplicationFiled: August 7, 2012Publication date: February 13, 2014Applicant: Advanced Micro Devices, Inc.Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
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Publication number: 20140040667Abstract: Example embodiments disclosed herein relate to enhancing test scripts with dynamic data. The disclosed embodiments include receiving production data that reflects real user interaction with an application process. Test scripts are generated based on the production data, where the test scripts simulate behavior relating to execution of the application process. The embodiments also include automatically enhancing the test scripts with dynamic data that includes at least one of correlation data and asynchronous data.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Inventors: Meidan Zemer, Salman Yaniv Sayers, Gil Perel, Yair Horovitz
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Publication number: 20140040668Abstract: Method and system for a test process. The method may include performing tests on one or more units under test (UUTs). At least one test on one or more UUTs may be performed. A signal may be acquired from the UUT. A reference signal may be retrieved. The reference signal may be derived from a transmitted signal characteristic of the UUT. The signal may be analyzed with respect to the reference signal. Results, useable to characterize the one or more UUTs, from performing the at least one test on the one or more UUTs may be stored. The reference signal may be derived from an initial test and may be stored for subsequent retrieval. A respective reference signal may be retrieved for all UUTs of the one or more UUTs for a respective test. The signal may be a radio frequency signal. The UUT may be a wireless mobile device.Type: ApplicationFiled: August 6, 2012Publication date: February 6, 2014Inventors: Craig E. Rupp, Gerardo Orozco Valdes, I. Zakir Ahmed, Vijaya Yajnanarayana
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Publication number: 20140040666Abstract: Systems and methods for automatically testing one or more versions of a compiler of are disclosed. A compiler is instrumented to generated data exposing various internal decisions and/or actions made by the compiler. Subsequently, multiple distinct versions of the compiler are executed to compile a code corpus associated with a particular programming language. Output (including instrumentation output) from the compilation of the code corpus for each version of the compiler is obtained and compared to identify behavioral changes that may exist between the various versions of the compiler.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Applicant: ORACLE INTERNATIONAL CORPORATIONInventors: Brian Goetz, Maurizio Cimadamore
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Publication number: 20140032967Abstract: A self-test engine to manage self-test mode operations between adjacent PHYs of a serial-attached SCSI (SAS) topology.Type: ApplicationFiled: July 30, 2012Publication date: January 30, 2014Inventors: Michael G. Myrah, Balaji Natrajan, Sohail Hameed
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Publication number: 20140032966Abstract: A method, apparatus and product for hardware verification using acceleration platform. The method comprising executing a first post-silicon testing program by a reference model, wherein during said executing the first post-silicon testing program one or more test-cases are generated; generating a second post-silicon testing program that is configured to execute the one or more test-cases; and executing the second post-silicon testing program on an acceleration platform.Type: ApplicationFiled: July 25, 2012Publication date: January 30, 2014Applicant: International Business Machines CorporationInventors: Manoj Dusanapudi, Wisam Kadry, Shakti Kapoor, Dimtry Krestyashyn, Shimon Landa, Amir Nahir, John Schumann, Gil (Eliezer) Shurek, Vitali Sokhin
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Publication number: 20140032968Abstract: A method for identifying, based on instructions stored externally to a processor containing a cache memory, a functional portion of the cache memory, then loading cache test code into the functional portion of the cache memory from an external source, and executing the cache test code stored in the cache memory to test the cache memory on a cache-line-granular basis and store fault information.Type: ApplicationFiled: July 30, 2012Publication date: January 30, 2014Inventors: Narendra Chakravarthy Nandam, Donald B. Kay
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Patent number: 8639983Abstract: An architecture and techniques for implementing a unified and extensible meta-testing framework within a distributed environment. This framework allows entities within the distributed environment to run tests written in different testing frameworks in a unified way. In addition, this disclosure describes techniques for allowing an entity within the distributed environment to test itself, both from its own perspective as well as from the perspective of other entities within the distributed environment.Type: GrantFiled: September 27, 2010Date of Patent: January 28, 2014Assignee: Amazon Technologies, Inc.Inventors: Nirav P Desai, Stanislav Fritz, Kyle Andrew Farrell, Michael C. Moore
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Patent number: 8639979Abstract: A method and system for providing immunity to a computer system wherein the system includes an immunity module, a recovery module, a maintenance module, an assessment module, and a decision module, wherein the immunity module, the recovery module, the maintenance module and the assessment module are each linked to the decision module. The maintenance module monitors the system for errors and sends an error alert message to the assessment module, which determines the severity of the error and the type of package required to fix the error. The assessment module sends a request regarding the type of package required to fix the error to the recovery module. The recovery module sends the package required to fix the error to the maintenance module, which fixes the error in the system.Type: GrantFiled: August 22, 2012Date of Patent: January 28, 2014Assignee: International Business Machines CorporationInventor: Mehmet Yildiz
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Patent number: 8639978Abstract: An automation process verifies that a test bed includes a set of devices specified by at least one script which are to be executed by the automation process on the test bed. The test bed is locked and the set of devices is allocated to the automation process. Performance data collection and logging for the set of devices is started and the at least one script is executed on the set of devices. After executing the at least one script, the set of devices is de-allocated and the test bed is unlocked. A notification is generated indicating that the at least one script has been executed.Type: GrantFiled: May 4, 2011Date of Patent: January 28, 2014Assignee: Aruba Networks, Inc.Inventors: Mohan Verma, Ajay Singh, Ishaan Gokhale, Pavel Semernin, Prabhat Regmi, Abhinethra T. Maras, Pragadesh Rajasekar, Sreenivasulu Lekkala
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Publication number: 20140025993Abstract: A framework and associated systems and methods for testing mobile communication devices are disclosed. An exemplary method includes receiving user-action data from each of a plurality of user-action-capture devices. The user-action data received from the user-action-capture devices includes data that characterizes a plurality of user actions that were performed on the user-action-capture devices. The user-action data is consolidated into generic representations of the user actions to create a superset of generally-applicable-user-action data, and each generic representation of a user action in the superset represents two or more similar user actions. The generally-applicable-user-action data is then used to test mobile communication devices that are different than the user-action-capture devices.Type: ApplicationFiled: July 17, 2012Publication date: January 23, 2014Applicant: QUALCOMM INNOVATION CENTER, INC.Inventors: Phani Bhushan Avadhanam, Nuthan Seegehalli Hanumanthappa
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Publication number: 20140019805Abstract: Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.Type: ApplicationFiled: September 16, 2013Publication date: January 16, 2014Applicant: Infineon Technologies AGInventors: Simon Brewerton, Patrick Leteinturier, Oreste Barnardi, Antonio Vilela, Klaus Scheibert, Jens Barrenscheen
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Publication number: 20140019804Abstract: A system and method for providing assisted manual testing of computer related devices. Test commands are routed from a user system through a proxy module to a device under test. The responses of the device are routed through the proxy module to a user system. A user interface is run on the user system that allows the user to view the responses of the device in a log with the issued test commands. The user interface includes annotation dialog boxes and fields, highlighting elements and flagging elements through which a user can annotate and create notes for the test log as the test is being run on the device. Through the proxy module, a third party can act as a user and view the test log and user created annotations and notes as the test is being run on the device. The test log, annotation and notes can also be stored by the proxy module so that a third party can view them at a later time.Type: ApplicationFiled: July 12, 2013Publication date: January 16, 2014Inventors: Brian Buege, Kevin Oelze, Amish Patel
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Publication number: 20140013160Abstract: In one or more embodiments, a hit test thread which is separate from the main thread, e.g. the user interface thread, is utilized for hit testing on web content. Using a separate thread for hit testing can allow targets to be quickly ascertained. In cases where the appropriate response is handled by a separate thread, such as a manipulation thread that can be used for touch manipulations such as panning and pinch zooming, manipulation can occur without blocking on the main thread. This results in the response time that is consistently quick even on low-end hardware over a variety of scenarios.Type: ApplicationFiled: July 9, 2012Publication date: January 9, 2014Applicant: MICROSOFT CORPORATIONInventors: Matthew A. Rakow, Tony E. Schreiner, Bradley J. Litterell, Kevin M. Babbitt, Praveen Kumar Muralidhar Rao, Christian Fortini
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Publication number: 20140013161Abstract: Roughly described, a method of sending a message from a source unit to a destination unit both forming part of a hierarchical debug architecture on a chip, the units in the hierarchy using a protocol in which each unit has an internal address which is the same base address, and in which each unit addresses other units using addresses derivable relative to that unit's internal address given positions of other units in the hierarchy, comprising: the source unit in a first level of the hierarchy sending a message comprising a destination address of the destination unit, the destination address being relative to the source unit's internal address, and an intermediate unit in a second level of the hierarchy: adding an offset to the destination address to form a rebased destination address, being relative to the intermediate unit's internal address, and routing the rebased message onto the destination unit.Type: ApplicationFiled: July 9, 2013Publication date: January 9, 2014Applicant: UltraSoC Technologies Ltd.Inventor: Andrew Brian Thomas Hopkins
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Publication number: 20140013159Abstract: A system, method, and computer program product are provided for testing device parameters. In use, a plurality of device parameters is determined, utilizing a directed acyclic graph (DAG). Further, the determined plurality of device parameters is tested.Type: ApplicationFiled: July 6, 2012Publication date: January 9, 2014Applicant: NVIDIA CorporationInventors: John F. Spitzer, Oleg Vyacheslavovich Vinogradov, Sergey Sergeevich Grebenkin
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Publication number: 20140006864Abstract: Embodiments are generally directed no-touch stress testing of memory input/output (I/O) interfaces. An embodiment of a memory device includes a system element to be coupled with a dynamic random-access memory (DRAM), the system element including a memory interface for connection with the DRAM, the interface including a driver and a receiver, a memory controller for control of the DRAM, and a timing stress testing logic for testing of the I/O interface.Type: ApplicationFiled: June 28, 2012Publication date: January 2, 2014Applicant: Intel CorporationInventors: Sankaran M. Menon, Robert R. Roeder
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Publication number: 20140006865Abstract: A system assembles a plurality of views into a plurality of view sets. A view set includes at least one view, and a view includes at least one configuration. The view configuration includes sets of fields and locations of the fields in the view. The system displays one of the plurality of view sets as a web page in a window, and the system generates a view component using a union of the fields belonging to the different configurations defined for the view. The view component includes a test element for the corresponding view, the view component includes a plurality of parameters wherein each parameter is linked to a single view field, and the view component includes no duplication of fields.Type: ApplicationFiled: June 29, 2012Publication date: January 2, 2014Applicant: SAP AGInventor: Karine Gaillard
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Publication number: 20140006866Abstract: Test data generation and scale up for database testing using unique common factor sequencing can include selecting a column of a table for which test data is needed and generating test data for the column that replicates cardinality characteristics of an existing production dataset and that includes a local predicate of a workload.Type: ApplicationFiled: June 29, 2012Publication date: January 2, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: AUSTIN CLIFFORD, ENDA MCCALLIG, GARY F. MURTAGH
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Publication number: 20130346801Abstract: Method, circuit, and system for performing an operation for regulating bandwidth, the operation comprising receiving at a memory, debug data packets and functional data packets for transmittal on a shared bus. The operation then transmits, via the shared bus, the functional data packets and one or more of the debug data packets according to a predefined ratio of debug data packets to functional data packets. The operation then drops one or more of the received debug data packets at the memory, and maintains a count of the one or more dropped debug data packets. The operation then updates the predefined ratio based on the count, and uses the updated predefined ratio to transmit the functional data packets and one or more of the debug data packets.Type: ApplicationFiled: June 20, 2012Publication date: December 26, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ronald E. Freking, Elizabeth A. McGlone, Daniel R. Spach, Curtis C. Wollbrink
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Publication number: 20130346802Abstract: Method, circuit, and system for performing an operation for regulating bandwidth, the operation comprising receiving at a memory, debug data packets and functional data packets for transmittal on a shared bus. The operation then transmits, via the shared bus, the functional data packets and one or more of the debug data packets according to a predefined ratio of debug data packets to functional data packets. The operation then drops one or more of the received debug data packets at the memory, and maintains a count of the one or more dropped debug data packets. The operation then updates the predefined ratio based on the count, and uses the updated predefined ratio to transmit the functional data packets and one or more of the debug data packets.Type: ApplicationFiled: February 26, 2013Publication date: December 26, 2013Applicant: International Business Machines CorporationInventors: Ronald E. Freking, Elizabeth A. McGlone, Daniel R. Spach, Curtis C. Wollbrink
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Patent number: 8615682Abstract: Measurement agents in a network failure detecting system each configure a group together with other measurement agents that receive a service from the same provision server, and form a link to create a tree structure with a predetermined measurement agent in the group at its top. The measurement agent then receives measurement results from the other measurement agents in the group, and narrows down candidates of a failure location based on the received measurement results. The measurement agent transmits the narrowed candidates of the failure location to a surveillance server or one of the other measurement agents. The surveillance server then receives the transmitted candidates of the failure location, and specifies the failure location based on the received candidates of the failure location.Type: GrantFiled: December 22, 2009Date of Patent: December 24, 2013Assignee: Fujitsu LimitedInventors: Hiroshi Yamamoto, Shunsuke Kikuchi
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Publication number: 20130339792Abstract: Methods and apparatus, including computer program products, are provided for testing data structures, such as for example business objects. In some implementations, there is provided a method. The method may include generating, at a test system, a test script including a test business object generated based on metadata describing aspects of a deployed business object at a target system; receiving, at the test system, a request to test the target system including the deployed business object; testing, based on the generated test script including the test business object, at least one of a data and an action of the deployed business object; and generating, at the test system, at least a result of the testing. Related systems, methods, and articles of manufacture are also disclosed.Type: ApplicationFiled: June 15, 2012Publication date: December 19, 2013Inventor: Jan Hrastnik
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Publication number: 20130339793Abstract: A method of testing a first business system and a second business system is provided herein. The first business system is integrated with the second business system. The method includes performing a test of the first business system. The method further includes recording, during the test of the first business system, one or more calls from the first business system to the second business system. Also, the method includes identifying the one or more calls from the first business system far testing of the second business system.Type: ApplicationFiled: March 3, 2011Publication date: December 19, 2013Inventors: Ilan Shufer, Alexei Ledenev, Amichai Nitsan
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Publication number: 20130332774Abstract: Exemplary system, method and computer-accessible medium for testing a multi-core chip can be provided which can have and/or utilize a plurality of identical cores. This can be performed by comparing each core with as many as at least the number of spare cores plus 1 using a comparator; the number of comparators can equal the total number of cores multiplied by one-half the number of spare cores plus 1. A mismatch between two cores can identify at least one of the two cores as defective and a perfect match between two cores can identify both cores as not defective. The multi-core chip can fail the test if the number of defective cores can be greater than the number of spare cores.Type: ApplicationFiled: June 7, 2013Publication date: December 12, 2013Inventor: Ozgur Sinanoglu
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Patent number: 8607096Abstract: An apparatus to collect information about network failure includes: a normal mode packet assembly unit to assemble a transmission packet from transmission data output from an application in a normal mode being a procedure used when a transmission process is performed by specified communication protocol; a special mode packet assembly unit to assemble the transmission packet from the transmission data in a special mode being a procedure in which a procedure for collecting failure information is embedded into the procedure used when a transmission process is performed by the specified communication protocol; a switching control unit to activate the normal mode packet assembly unit or the special mode packet assembly unit selectively; and a response analysis unit to collect failure information according to a behavior of the response to the transmission packet transmitted from the special mode packet assembly unit.Type: GrantFiled: July 28, 2011Date of Patent: December 10, 2013Assignee: Fujitsu LimitedInventors: Noriyuki Fukuyama, Hideaki Miyazaki, Masanobu Morinaga, Sumiyo Okada, Satoshi Okuyama
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Publication number: 20130326274Abstract: A method for testing a device under test (DUT) during a test sequence. In accordance with one embodiment, during a regular, pre-defined test sequence, data packets are transferred from a tester to a device under test (DUT) containing data related to at least one of an identification parameter of the DUT, an operational characteristic of the DUT and a request for data. Examples of such transferred data include address data for identifying the DUT (e.g., a unique media access control (MAC) address) and calibration data for controlling an operational characteristic of the DUT (e.g., signal power levels, signal frequencies or signal modulation characteristics). In accordance with another embodiment, the DUT retrieves and transmits data to the tester, either in response to the request for data or as a preprogrammed response to its synchronization with the tester.Type: ApplicationFiled: June 1, 2012Publication date: December 5, 2013Applicant: LITEPOINT CORPORATIONInventors: Christian Volf OLGAARD, Sheguang YIN, John Christopher LUKEZ
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Patent number: 8601317Abstract: The operator terminal receives input of the terminal status of the recovery target terminal 10 from an operator, extracts a recovery item for recovering the terminal status of the recovery target terminal 10 and a recovery set value being a value recovered corresponding to the recovery item based on the input terminal status, and generates a recovery code at least including the recovery item and the recovery set value. The recovery target terminal 10 decodes the recovery code in response to input of the recovery code to acquire the recovery item and the recovery set value and executes a recovery process for the terminal status based on the acquired recovery item and the acquired recovery set value.Type: GrantFiled: October 19, 2011Date of Patent: December 3, 2013Assignee: OPTiM CorporationInventor: Shunji Sugaya
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Publication number: 20130318401Abstract: Some implementations provide techniques and arrangements for detecting a register value having a life longer than a threshold period based, at least in part, on at least one code segment of a code being translated by a binary translator. For a register value detected as having a life longer than a threshold period, at least one instruction to cause an access of the detected register value during the life of the register value may be included in at least one translated code segment to be output by the binary translator.Type: ApplicationFiled: December 30, 2011Publication date: November 28, 2013Inventors: Xavier Vera, Javier Carretero Casado, Matteo Monchiero, Tanausu Ramirez, Enric Herrero
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Publication number: 20130318398Abstract: An exemplary system may include debug capabilities. In one embodiment, the system obtains a debug address. For a process associated with the system, the system determines whether a memory page used by the process includes the debug address. Upon determining that the memory page used by the process includes the debug address, the system marks the memory page for debug and sends the memory page to a swap area.Type: ApplicationFiled: May 23, 2012Publication date: November 28, 2013Applicant: RED HAT, INC.Inventors: Anton Arapov, Jiri Olsa
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Publication number: 20130318399Abstract: A validation system includes a test block that operates to apply a set of inputs to a system under test, such as a test system or an executable test algorithm, and receive from said system under test a first set of outputs produced by operation of the system under test in response to application of the set of inputs. The first set of outputs, as well as a second set of outputs reflecting output produced by operation of a reference system or executable reference algorithm in response to application of the same set of inputs, is processed to make a validation determination. A validation processing block compares the first and second sets of outputs to validate the system under test as an equivalent to the reference system.Type: ApplicationFiled: May 24, 2012Publication date: November 28, 2013Applicant: STMICROELECTRONICS, INC.Inventors: Steven Srebranig, Paul A. Anderson
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Publication number: 20130318400Abstract: A method for testing exception handling mechanism of an electronic device, the method includes: establishing a connection between the electronic device and another electronic device when the electronic device is booting up. Obtaining parameters of a timer of the electronic device in response to an operation of a user, and determining whether the parameters are satisfied by the another electronic device. Simulating an abnormal event to cause the electronic device not to start up successfully if the parameters are satisfied by the another electronic device. Determining that the exception handling mechanism of the electronic device works well when the parameters do satisfy the requirement and when the other electronic device is in fact restarted or turned off after an abnormal event has been simulated via the other electronic device.Type: ApplicationFiled: November 12, 2012Publication date: November 28, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: XIAO LIANG, MING LI
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Publication number: 20130318397Abstract: Systems and methods for automating the building, deployment, and testing of firmware are disclosed. An exemplary system includes a build-deploy-testing environment. The build-deploy-testing environment can access a hardware testing profile that includes hardware specifications for a test server, an operating system for a test server, an application for the test server to communicate with a test device, and a plurality of inputs for installing the operating system and the application on the test server. The build-deploy-testing environment can generate a firmware module compatible with a test device and a testing environment module for a test server based on the hardware testing profile. The build-deploy-testing environment can deploy the testing environment module to a test server and deploy the firmware module to a test device. The build-deploy-testing environment can execute a testing application to determine the compatibility of the firmware with the test device in communication with the test server.Type: ApplicationFiled: May 23, 2012Publication date: November 28, 2013Inventor: Shawn Jamison
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Publication number: 20130311828Abstract: According to one embodiment, an information distribution apparatus includes a receiver, an obtaining module, a determination module, and a transmitter. The receiver receives a request for an application from an electronic apparatus. The obtaining module obtains identification information from the request. The determination module determines whether the identification information is included in a list. The transmitter transmits the application, in which a test script configured to detect distortion of screen display of the application is not embedded, to the electronic apparatus, if the identification information is included in the list.Type: ApplicationFiled: December 3, 2012Publication date: November 21, 2013Inventors: Yuji Irie, Yoshihiro Ohmori
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Publication number: 20130311830Abstract: A method of generating test data is provided herein. The method includes generating a schema comprising a database table. The method also includes receiving a selection of the database table. Additionally, the method includes receiving one or more rule definitions for populating the database table. The method further includes generating a stored procedure for populating the database table based on the rule definitions and the schema.Type: ApplicationFiled: February 18, 2011Publication date: November 21, 2013Inventor: Yong-Dong Wei
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Publication number: 20130311829Abstract: Performance testing of web components using identity information includes providing a web component for testing having business logic code and an associated authorization layer code, locating, using a processor, branches in the authorization layer code and the business logic code which are dependent on identity information, and creating, using the processor, symbolic identities with claims or attributes having values corresponding to the branch options of the located branches. The method also includes propagating the symbolic identities downstream from the branch locations through the authorization layer code and the business logic code and analyzing, using the processor, the performance of each symbolic identity.Type: ApplicationFiled: April 24, 2013Publication date: November 21, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: INTERNATIONAL BUSINESS MACHINES CORPORATION
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Publication number: 20130311827Abstract: A computer-implemented method and apparatus, the method comprising: receiving a test script indicating actions to be performed by automation software with regard to one or more elements of one or more processes; creating a simulation of the elements of the processes; activating the automation software; and testing activity of the automation software with regard to the simulation of the elements, thereby testing the automation software.Type: ApplicationFiled: May 16, 2012Publication date: November 21, 2013Applicant: International Business Machines CorporationInventors: Tal Drory, Mattias Marder
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Publication number: 20130290786Abstract: A novel system, computer program product, and method are disclosed for feedback-directed automated test generation for programs, such as JavaScript, in which execution is monitored to collect information that directs the test generator towards inputs that yield increased coverage. Several instantiations of the framework are implemented, corresponding to variations on feedback-directed random testing, in a tool called Artemis.Type: ApplicationFiled: April 26, 2012Publication date: October 31, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shay ARTZI, Julian DOLBY, Salvatore A. GUARNIERI, Simon H. JENSEN, Marco PISTOIA, Manu SRIDHARAN, Frank TIP, Omer TRIPP
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Patent number: 8572436Abstract: A system and method for managing a test of a motherboard can create a first test data consisting of test items. In the first test data, one or more selected test items to perform can be identified. A second test data is obtained by performing a logical NOR operation on the test bits corresponding to the selected test items. After performing the test items, a third test data is created by setting the test bits corresponding to the selected test items that pass the test to the test bits of the selected test items in the first test data, and by setting the test bits corresponding to the selected test items that fail the test to the test bits of the test items that have not been selected in the first test data. By comparing the third with the test data, a test result of the motherboard is obtained.Type: GrantFiled: August 25, 2011Date of Patent: October 29, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Xin-Qiao Tang, Yang Zhong
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Publication number: 20130283100Abstract: A testing device for evaluating operations of software installed in a mobile terminal includes a scenario selecting unit configured to select a scenario that includes information for causing the mobile terminal to execute a function that should be operated by the mobile terminal, a scenario execution determining unit configured to determine whether the scenario selected by the scenario selecting unit is executable, a scenario execution unit configured to execute the scenario determined to be executable by the scenario execution determining unit, and a scenario execution result determining unit configured to determine whether an execution result of the scenario executed by the scenario execution unit is the same as a result expected beforehand. The scenario execution determining unit determines whether the scenario selected by the scenario selecting unit is executable based on the execution result of the scenario executed by the scenario execution unit in the past.Type: ApplicationFiled: January 23, 2012Publication date: October 24, 2013Applicant: NTT DOCOMO, INC.Inventors: Koichi Asano, Hiroyuki Tsuji
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Publication number: 20130283099Abstract: A method for testing stability of a server includes the following steps. Providing a first user input interface for a user to input test parameters. Generating a control signal according to the input test parameters and transmitting the control signal to the BMC of the server. Controlling the server to start and shut down via the BMC. Detecting whether the tested characteristics are within specified ranges during each start and shutting down operation. Generating a SEL if any abnormal result is obtained and records a test time when the abnormal result is obtained in the SEL. Storing the generated SEL in a storage unit. Providing a second user input interface on the display for the user to input conditions to filter test results. And responding to the input conditions and outputting corresponding test results to the display.Type: ApplicationFiled: August 1, 2012Publication date: October 24, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HON FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.Inventors: JIA-QING HUANG, ZHAO-YANG CAI, ZHENG-QUAN PENG, YI-XIN TU, HAI-QING ZHOU
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Patent number: 8566644Abstract: Methods and systems for debugging a software program, such as BIOS is provided. The methods and systems make use of a debugger application executing on a host computer and configured to communicate with a debugger module executing on a target computer via serial/parallel/USB port of host computer, an adapter and the SMBus of the target computer.Type: GrantFiled: July 14, 2011Date of Patent: October 22, 2013Assignee: American Megatrends, Inc.Inventors: Stefano Righi, Ashraf Javeed
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Publication number: 20130275809Abstract: A method for testing using a preserve status parameter in a computing system includes setting, by a calling process in the computing system, the preserve status parameter; issuing a call to a function under test by the calling process in the computing system; executing the function under test in the computing system, wherein data in a memory area accessed by the function under test during execution is preserved by the set preserve status parameter, such that the computing system does not reuse the memory area while the data in the memory area is being preserved; determining if an error occurred during execution of the function under test; in the event an error is determined to have occurred during execution of the function under test, making the data in the memory area available for inspection; and releasing the memory area for reuse by the computing system.Type: ApplicationFiled: April 16, 2012Publication date: October 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Eugenie L. Alexander, Arthur J. Bariska, JR., Matthew T. Cousens, Eileen S. Kovalchick, Joel L. Masser, Kevin D. McKenzie, Eileen P. Tedesco
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Publication number: 20130275810Abstract: Disclosed is an apparatus and a method to inject errors to a memory. In one embodiment, a dedicated interface includes an error injection system address register and an error injection mask register coupled to the error injection system address register. If the error injection system address register includes a system address that matches an incoming write address, the error injection mask register outputs an error to the memory.Type: ApplicationFiled: September 29, 2011Publication date: October 17, 2013Inventors: Theodros Yigzaw, Kai Cheng, Mohan J. Kumar, Jose A. Vargas, Gopikrishna Jandhyala
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Publication number: 20130268808Abstract: A Test Access Mechanism (TAM) architecture for facilitating testing of IP blocks integrated on a System on a Chip (SoC). The TAM architecture includes a Test Controller and one or more Test Wrappers that are integrated on the SoC proximate to IP blocks. Test data and commands corresponding to input from an external tester are packaged by the Test Controller and sent to the Test Wrappers via an interconnect fabric. The Test Wrappers employ one or more test ports to provide test data, control, and/or stimulus signals to the IP block to facilitate circuit-level testing of the IP block. Test results for the circuit-level tests are returned to the Test Controller via the fabric. Test Wrappers may be configured to pass through interconnect signals, enabling functional testing of IP blocks to be facilitated via test packages and test results transmitted between the Test Controller and the IP blocks via the fabric.Type: ApplicationFiled: June 5, 2013Publication date: October 10, 2013Inventors: Srinivas Patil, Abhijit Jas
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Publication number: 20130262932Abstract: A method, apparatus and product for generating elements based on generation streams. The method comprises: obtaining one or more generation streams, wherein the streams comprise elements, wherein each element is a formal specification of an operation that stimulates a system, wherein based on each of the generation streams one or more alternative stimuli for the system can be generated, which stimuli comprises operations according to the elements; and generating a stimuli in accordance with the one or more generation streams, wherein the stimuli comprises at least one hybrid operation, wherein the hybrid operation complies simultaneously with two or more elements of the one or more generation stream, whereby the stimuli is comprised of a number of operations that is smaller than a sum of the numbers of elements of the one or more generation streams.Type: ApplicationFiled: April 2, 2012Publication date: October 3, 2013Applicant: International Business Machines CorporationInventors: Yoav Katz, Michal Rimon, Avi Ziv
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Publication number: 20130254594Abstract: An installer application implemented in a computational device receives a command to install a test application in the computational device. The installer application determines whether a selected port of a plurality of ports of the computational device is to be blocked prior to installing the test application in the computational device. In response to determining that the selected port is to be blocked prior to installing the test application in the computational device, the installer application blocks the selected port, installs the test application by binding a socket to the selected port of the plurality of ports, and tests functions of the test application by executing one or more code paths of the test application, in response to installing the test application.Type: ApplicationFiled: May 15, 2013Publication date: September 26, 2013Applicant: International Business Machines CorporationInventor: Matthew Everett Brooks