Abstract: A computing device comprising a frontend and a backend is operably coupled to a plurality of storage devices. The backend comprises a plurality of buckets. Each bucket is operable to build a failure-protected stipe that spans two or more of the plurality of the storage devices. The frontend is operable to encrypt data as it enters the plurality of storage devices and decrypt data as it leaves the plurality of storage devices.

Abstract: An image processing apparatus comprises an acquisition unit configured to acquire reference information which indicates at least one of a number of objects detected from a frame, a density of an object in a frame, or a frame rate, and a tracking unit configured to track an identical object between frames. The tracking unit determines that each of objects for which a difference in a detection position between the frames is smaller than a threshold value corresponding to the reference information is an identical object, and does not determine that each of objects for which a difference in the detection position between the frames is equal to or larger than the threshold value is an identical object.

Abstract: The present application discloses a system fault handling method and apparatus, a device, and a storage medium. The method includes: dividing disks in RAID based on the number of stripes, then configuring multi-state standby blocks for the stripes, and distributing the multi-state standby blocks on the disks in the RAID, so as to enable the disks to use the multi-state standby blocks to run at the same time to handle faults when the faults occur at the same time; acquiring fault information factors corresponding to fault blocks after faults occur on the blocks, and then storing the fault information factors in stripe block state mapping items in a stripe block state mapping linked list; and selecting corresponding handling strategies based on different stripe block state mapping items, so as to perform corresponding operations on the fault blocks corresponding to the stripe block state mapping items.

Abstract: Decoding method and memory system which group bits in irregular LDPC codes having similar degrees of convergence into respective degree groups, classify the degree groups according to a metric indicative of a number of decoding iterations for convergence, divide a time period for convergence of the decoding iterations into different zones for the processing of selected degree groups within each zone, and skip decoding of the bits in a non-converging zone where the bits are not converging.

Abstract: In described examples, a memory system is accessed by reading a data line and error detection bits for the data line from a first memory. The data line and the error detection bits from the first memory are decoded to determine if an error is present in the data line from the first memory. A copy of the data line and the error detection bits are stored in a second memory. The copy of the data line and error detection bits are read from the second memory. The copy of the data line and error detection bits are decoded to determine if an error is present in the copy of the data line from the second memory.

Abstract: A PCIe device error handling system includes a BIOS subsystem coupled to a PCIe device and a BMC device. The BIOS subsystem identifies an error in the PCIe device and, in response, begins an SMM that suspends the performance of at least one workload in an operating system, and generates and transmits a PCIe device error information collection instruction associated with the PCIe device to the BMC device. Subsequent to transmitting the PCIe device error information collection instruction, the BIOS subsystem ends the SMM such that the performance of at least one workload is resumed in the operating system. In response to receiving the PCIe device error information collection instruction from the BIOS subsystem, the BMC device retrieves PCIe device error information from the PCIe device while the operating system performs the at least one workload, and stores the PCIe device error information.

Abstract: In an embodiment, a processor for redirecting requests includes a processing engine to execute a guest system, and monitoring circuitry coupled to the processing engine. The monitoring circuitry may be to: receive, from the guest system, a first request to access a first virtual counter; in response to a receipt of the first request, determine, based a mapping register of the processor, a first physical counter mapped to the first virtual counter; and redirect the first request to the first physical counter mapped to the first virtual counter. Other embodiments are described and claimed.

Abstract: Methods, systems, and devices for storing data are provided. To store data, a data storage system may include multiple storage nodes and a support node. Copies of data may be stored in the storage nodes. When the data stored by the storage nodes appears to be inconsistent, metadata from the support node may be used to resolve the inconsistencies. The storage nodes and support node may be integrated into a single chassis. The chassis may be a form factor compliant chassis such as a rack unit compliant chassis for mounting to rack rails.

Abstract: A computer implemented method manages an image. A number of processor units identifies a set of base files in a set of image layers for a candidate file in a container layer in response to a request to create a new image with the candidate file. The number of processor units identifies delta data between the candidate file and the set of base files. The number of processor units creates the new image with a new top image layer using the delta data identified for the candidate file in the container layer. According to other illustrative embodiments, a computer system, and a computer program product for managing an image are provided. As a result, the illustrative embodiments provide a technical effect of reducing the size of images and reducing storage space used to store the images.

Abstract: A storage device comprises a plurality of bitwise-modifiable memory cells. A control device is also provided, which, in order to modify existing data content written to a group of memory cells with new data content to be written, is designed to compare the existing data content and the data content to be written in order to obtain a comparison result. The control device is designed to determine a subset of the group of memory cells for modification and a remaining length based on the comparison result, and to write the data content to be written to the subset, leaving the remaining set at least partially unchanged. For modifying the existing data content, the storage device is designed to read from a memory location of the storage device and to verify the correctness of the memory location.

Abstract: A storage device manages data stored in a storage drive in a plurality of logical hierarchies. The plurality of logical hierarchies include a writing hierarchy above a hierarchy of a parity group including a plurality of storage drives. The storage device writes received host data in a free area in the writing hierarchy. In the data recovery process for replacing a failure storage drive with a new storage drive, the storage device executes the garbage collection process on a first logical area in the writing hierarchy associated with the first parity group including the failure storage drive. In the garbage collection process, valid data is selected from the first logical area and copied to a second logical area associated with a second parity group different from the first parity group.

Abstract: Methods, systems, and devices for techniques for detecting a state of a bus are described. A memory device may fail to receive or decode (e.g., successfully receive or successfully decode) an access command transmitted to the memory device via a bus. The bus may enter or remain in an idle state which may cause indeterminate signals to develop on the idle bus. A host device may obtain the indeterminate signals from the idle bus and determine that the indeterminate signals include an error based on a signal that develops on a control line of the idle bus. The signal may be associated with a control signal that indicates errors in a data signal when the control signal has a first voltage, and the control line may be configured to have the first voltage when the bus is idle.

Abstract: Provided is a memory system comprising a plurality of memory channels each having a parity bit, a redundant array of independent devices (RAID) parity channel, and a controller of the memory system. The controller is configured to receive a block of data for storage in the memory channels and determine at least one of (i) when a data traffic demand on the memory channels is high and (ii) when a data traffic demand on the memory channels is low. Upon determining the data traffic demand is low, writing the block of data for storage in the memory channels and concurrently updating the parity bits and the RAID parity channel for the stored block of data. Upon determining the data traffic demand is high, only writing the data for storage in the memory channels.

Abstract: An apparatus is provided having a memory device and associated access control circuitry, and an additional memory device and associated additional access control circuitry. Redundant data generation circuitry generates, for a given block of data having an associated given memory address, an associated block of redundant data for use in an error detection process. The access control circuitry is arranged to store, at a location in the memory device determined from the given memory address, at least a portion of the given block of data and a first copy of the associated block of redundant data, and the additional access control circuitry is arranged to store, at a location in the additional memory device determined from the given memory address, any remaining portion of the given block of data not stored in the memory device and a second copy of the associated block of redundant data.

Abstract: A storage controller and an operating method of the storage controller are provided. The storage controller includes processing circuitry configured to read sub-stripe data from each of a plurality of non-volatile memory devices connected with a RAID (Redundant Array of Inexpensive Disk), check error information of at least one of the sub-stripe data, and perform a RAID recovery operation in response to the at least one of the sub-stripe data having an uncorrectable error, and a RAID memory which stores calculation results of the RAID recovery operation.

Abstract: A system booting method, a node device, and a computer-readable storage medium relate to the technical field of operating systems and include determining a location of a first operating system to be booted by the node device in a target persistent memory; and booting, based on the location of the first operating system and by the node device, the first operating system.

Abstract: Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios. The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.

Abstract: A method for operating a memory includes: reading data and an error correction code from a memory core; correcting an error of the read data based on the read error correction code to produce error-corrected data; generating new data by replacing a portion of the error-corrected data with write data, the portion becoming a write data portion; generating a new error correction code based on the new data; and writing the write data portion of the new data and the new error correction code into the memory core.

Abstract: Improving storage device performance including initiating, on a storage device, execution of a rehabilitative action from a set of rehabilitative actions that can be performed on the storage device; determining that the storage device is operating outside of a defined range of expected operating parameters after the rehabilitative action has been executed; and initiating execution of a higher level rehabilitative action responsive to determining that the higher level rehabilitative action exists.

Abstract: A computing device comprising a frontend and a backend is operably coupled to a plurality of storage devices. The backend comprises a plurality of buckets. Each bucket is operable to build a failure-protected stripe that spans two or more of the plurality of the storage devices. The frontend is operable to encrypt data as it enters the plurality of storage devices and decrypt data as it leaves the plurality of storage devices.

Abstract: One or more data items is received by a processing device managing one or more memory devices partitioned into a plurality of die partitions. The one or more data items is determined to be written sequentially to one or more blocks within a die partition of the plurality of die partitions. Metadata associated with the one or more data items is written sequentially to one or more blocks across the plurality of die partitions.

Abstract: Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios. The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.

Abstract: Various embodiments disclosed herein relate to a building automation controller and related method and storage medium including a processor configured, through at least execution of a distributed computer program, to: receive sensor data generated by a sensor, wherein the sensor data is indicative of a state of a defined space, identify an action to be performed by a device to affect the state in accordance with an operating characteristic for the defined space, determine that the device is attached to a second controller of a plurality of additional controllers, and transmit to the second controller, an indication that the action is to be performed by the device, wherein: the distributed computer program is configured to be distributed among the processor and the plurality of additional controllers and, the processor is further configured to apportion work to be performed by the computer program between at least the additional controllers.

Abstract: A processing system operates by: storing a data segment as a set of encoded data slices, wherein the set of encoded data slices are dispersed storage error encoded and stored in at least one storage unit of a storage network; receiving, from a requestor, an access request associated with the data segment; detecting an access anomaly associated with the access request, the access anomaly having one of a plurality of anomaly types; denying the access request in response to detecting the access anomaly; generating, based on the one of the plurality of anomaly types, an anomaly detection indicator identifying the requestor; and sending the anomaly detection indicator to other devices of the storage network.

Abstract: Techniques are provided to recover from partial device errors of storage devices in a data storage system. A storage control system manages a storage device which comprises storage capacity that is logically partitioned into segments of equal size. The storage control system groups at least some of the segments of the storage device into a segment group. Each segment of the segment group is configured to store one or more data items and associated metadata items. The storage control system generates a parity data segment based on the segments of the segment group, and persistently stores the parity data segment in association with the segment group. In response to detecting a storage device error associated with a corrupted segment of the segment group, the storage control system utilizes the parity data segment and non-corrupted segments of the segment group to recover at least one missing data item of the corrupted segment.

Abstract: A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.

Abstract: A method, computer system, and a computer program product for providing backend deduplication awareness at a virtualizing layer is disclosed. The present invention may include receiving a deduplication information from a backend storage controller associated with performing an input/output (IO) operation to a physical address of a disk. The present invention may include translating the physical address to a logical address to apply to a plurality of storage extents in a virtualizing layer. The present invention may include constructing a graph including corresponding nodes representing the plurality of storage extents and including corresponding deduplication edge weights representing a plurality of deduplications between the plurality of storage extents. The present invention may include identifying at least one subgraph within the constructed graph, wherein the identified at least one subgraph represents a storage extent cluster that is suitable for garbage collection as a cluster.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to create a dual parity matrix. The dual parity matrix includes a full parity form that includes a payload, a first parity portion, and a second parity portion and a reduced parity form that includes the payload and the first parity portion. The second parity portion is 0. The controller is further configured to create an incremental parity construction matrix. The incremental parity construction matrix includes two arrays. A first array includes a first payload portion, a first, first parity portion, and a first, second parity portion and a second array includes a second payload portion, a second, first parity portion, and a second, second parity portion. The incremental parity construction matrix is arranged in either a block triangular construction or a block diagonal construction.

Abstract: The disclosure provides an approach for high-availability admission control. Embodiments include determining a number of slots present on the cluster of hosts. Embodiments include receiving an indication of a number of host failures to tolerate. Embodiments include determining a number of slots that are assigned to existing computing instances on the cluster of hosts. Embodiments include determining an available cluster capacity based on the number of slots present on the cluster of hosts, the number of host failures to tolerate, and the number of slots that are assigned to existing computing instances on the cluster of hosts. Embodiments include determining whether to admit a given computing instance to the cluster of hosts based on the available cluster capacity.

Abstract: A method of performing partial redundant array of independent disks (RAID) stripe parity calculations is disclosed. The method includes receiving a last portion of a RAID stripe among multiple portions of the RAID stripe, all portions for a successful write of the RAID stripe being previously received except for the last portion. The method also includes calculating a parity value based on the last portion of the RAID stripe and a previous parity value without calculating the parity value using a previous portion of the RAID stripe. The method further includes writing of the RAID stripe.

Abstract: A method, apparatus, and system for processing Redundant Array of Independent Disks (RAID) Input/Output (I/O) requests for a plurality of nodes in a cluster is disclosed. A file system request including a byte offset is received. Then, a Physical Extent (PE) row that matches the file system request and a RAID stripe within the identified PE row based on the byte offset is identified. Next, a plurality of RAID I/O requests to be routed to a physical disk is generated. Each of the plurality of the RAID I/O requests includes information associated with the PE and a type of operation. Thereafter, each of the RAID I/O requests is processed based on the information associated with the PE and the type of operation.

Abstract: A data managing method. Metadata including a sharing policy is applied to a data file on a computing device. A sharing of the data file from the computing device via a network to a platform hosted by a computing system is detected. It is determined whether the platform is in compliance with the sharing policy, and it is reported whether the platform is in compliance with the sharing policy.

Abstract: Exemplary methods, apparatuses, and systems include receiving a request for a segment of data. The requested segment data is one of a plurality of segments of data in a stripe of data. A failure to decode the requested segment is detected. Each of the plurality of segments in the stripe other than the requested segment are read. Reading each segment includes reading raw encoded data and attempting to decode the raw encoded data, the result of reading each segment including decoded data when decoding is successful and the raw encoded data when decoding fails. A combined result of each read is generated. The combining includes combining decoded data for segments that were successfully decoded and the raw encoded data for segments for which decoding failed. A statistical model for the requested segment is updated using the combined result. The requested segment is decoded using the updated statistical model.

Abstract: Techniques for rebuilding data in a data storage system are provided. A method includes: (a) identifying (i) a first set of degraded Ubers that contain no portions reserved for direct writing and (ii) a second set of degraded Ubers that contain at least one portion reserved for direct writing. Direct writing is a process that writes blocks to long-term storage prior to mapping those blocks in a metadata mapping structure. An Uber is a set of adjacent stripes across a respective Redundant Array of Independent Disks (RAID) array of the data storage system, and a degraded Uber is an Uber that includes at least one failed drive within its RAID array. The method further includes (b) initiating a rebuild of the first set of degraded Ubers; and (c) delaying a rebuild of each degraded Uber of the second set until all pending direct writes to blocks of that degraded Uber have been mapped by the metadata mapping structure.

Abstract: A data processing method is provided. The method is implemented in a distributed storage system including at least two storage disk clusters. The at least two storage disk clusters are configured with at least two energy saving states. The method includes: receiving, by a processing module of the distributed storage system, a read request including an identifier of to-be-processed data; reading metadata of the to-be-processed data based on the identifier of the to-be-processed data, to determine a first storage disk cluster and a second storage disk cluster, where the first storage disk cluster and the second storage disk cluster are configured with different energy saving states; and reading first sub-data from the first storage disk cluster, and after the first sub-data is read, reading second sub-data from the second storage disk cluster.

Abstract: A write hole protection method and system for a RAID, and a storage medium. The method comprises: presetting a log area, and after a RAID is degraded, setting the log area to be in an enabled state; when the log area is in the enabled state, determining, before each stripe write operation, whether a data block of a failed member disk of the RAID in a stripe is a check data block; if the data block is not the check data block, determining whether data blocks to be written of the stripe comprise a data block to be written into the failed member disk; if yes, backing up the data block to be written into the failed member disk in the log area; if not, calculating the data block of the failed member disk and backing up the data block in the log area, or backing up the data blocks to be written in the log area; and when the degraded RAID is started after a failure, performing data recovery using the log area. By using the present solution, the write hole issue of the RAID is avoided.

Abstract: Migrating data in a storage array that includes a plurality of storage devices, including: detecting, by the storage array, an occurrence of a storage device evacuation event associated with one or more source storage devices; responsive to detecting the occurrence of the storage device evacuation event, identifying, by the storage array, one or more target storage devices for receiving data stored on the one or more source storage devices; reducing, by the storage array, write access to the one or more source storage devices; and migrating the data stored on the one or more source storage devices to the one or more target storage devices.

Abstract: Techniques including receiving a first control value, starting a timeout counter based on receiving the first control value, receiving a second control value, determining whether the second control value is received before the timeout counter expires, and based on the determination that the second control value is received before the timeout counter expires: determining whether the first control value is the same as the second control value, and loading the first control value into a set of control registers based on the determination that the first control value is the same as the second control value.

Abstract: A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.

Abstract: A condition determination system includes: an operation condition data obtaining unit that obtains operation condition data indicating an operation condition of a facility; and a determination unit that determines, based on the operation condition data, a level of a phenomenon that occurs due to the operation condition of the facility.

Abstract: A processing device obtains a write operation which comprises first data and second data to be stored in first and second strips of a given stripe. The processing device stores the first data in the first strip and determines that the second strip is unavailable. The processing device determines a parity based on the first data and the second data and stores the parity in a parity strip. The processing device updates metadata to indicate that the second data was not stored in the second strip. In some embodiments, the updated metadata is non-persistent and the processing device may be further configured to rebuild the given stripe, update persistent metadata corresponding to a sector of stripes including the given stripe and clear the non-persistent metadata based at least in part on a completion of the rebuild.

Abstract: A memory controller and a method of operating the same may provide recovery from a Sudden Power-Off (SPO). The memory controller may control a memory device including a plurality of memory blocks, each memory block having a plurality of pages. The memory controller may include a dummy program controller configured to, after an SPO has occurred while a program operation was being performed on a page of the memory device, control a dummy program operation for recovering from the SPO; a parity data controller configured to control resetting and generation of parity data for chipkill decoding based on pages on which the dummy program operation is determined to be performed; and a valid data controller configured to control movement of valid data based on a number of pages on which the dummy program operation is to be performed.

Abstract: Techniques providing I/O control involve: in response to receiving an I/O request, detecting a first set bits for a stripe in a RAID. The RAID is built on disk slices divided from disks. The stripes include extents. Each of the first set bits indicates whether a disk slice where a corresponding extent in the stripe is located is in a failure state. The techniques further involve determining, from the stripe and based on the first set bits, a first set of extents in the failure state and a second set of extents out of the failure state. The techniques further involve executing the I/O request on the second set of extents without executing the I/O request on the first set of extents. Such techniques can simplify storage bits in I/O control, support the degraded stripe write request for the RAID and enhance performance executing the I/O control.

Abstract: Systems, apparatus and methods for generation of XOR signature metadata and XOR signature management are presented. In one or more embodiments, a storage device controller includes a host interface, configured to receive one or more string lines (SLs) of data from a host, the one or more SLs to be programmed into a non-volatile memory (NVM), and processing circuitry. The processing circuitry is configured to, for each of the one or more SLs, generate signature metadata and provide the signature metadata in a header of the SL. The processing circuitry is still further configured to XOR two or more of the SLs with their respective signature metadata to generate a snapshot, and write the snapshot to the NVM.

Abstract: A distributed storage system having a plurality of nodes that include a first node that stores write data in a storage device, and a second node that stores a redundancy code of the write data. The first node is configured to select a second node, among the plurality of nodes, to store the redundancy code after receiving the write data; and send the write data to the selected second node. The second node is configured to receive and hold the write data, determine whether a prescribed starting condition is met asynchronously with reception of the write data, calculate the redundancy code and a plurality of pieces of data and store the redundancy code in the storage device if the prescribed starting condition is met, hold the write data until a prescribed deletion condition is met and delete the write data after the prescribed deletion condition is met.

Abstract: A memory includes a plurality of rows, each of which is coupled to a plurality of memory cells; a target row determining circuit suitable for determining a row that is likely to lose data among the plurality of rows as a target row; and a transfer circuit suitable for transferring, when a number of target rows determined by the target row determining circuit is equal to or greater than a threshold value, information representing that the number of target rows reaches the threshold value to a memory controller.

Abstract: A storage device includes a controller that can dynamically adjust the zone active limit (ZAL) for a zoned namespace (ZNS). Rather than assuming a worst-case scenario for the ZNS, the ZAL can be dynamically adjusted, even after providing the ZAL to a host device. In so doing, device behavior changes due to factors such as temperature, failed or flipped bit count, and device cycling can be considered as impacting the ZAL. The ZAL can then be adjusted over time, and the new ZAL can be communicated to the host device. As such, rather than a fixed, worst-case ZAL, the host device will receive updated ZAL values over time as the device performs.

Abstract: When managing stripes in a storage system, based on a determination that a failed storage device appears in first storage devices, a failed stripe involving the failed storage device is determined in a first redundant array of independent disks (RAID). An idle space that can be used to reconstruct the failed stripe is determined in the first storage devices. The failed stripe is reconstructed to second storage devices in the storage system based on a determination that the idle space is insufficient to reconstruct the failed stripe, the second storage devices being storage devices in a second RAID. An extent in the failed stripe is released in the first storage devices. Accordingly, it is possible to reconstruct a failed stripe as soon as possible to avoid data loss, and further to provide more idle spaces in the first storage devices for future reconstruction.

Abstract: A processor coupled to a NAND memory device comprising an n by m array of dies having n channels performs error recovery message scheduling and read error recovery on the dies by receiving indications of read errors responsive to attempted execution of a read command on a destination die and creates an error recovery message or instruction in response to the indication. The processor determines the destination die of the error recovery message and sends the error recovery message to a die queue based on the determined destination die. The n×m die queues can each be further divided into p priority queues, and error recovery messages are sent to the appropriate die priority queue based on a priority associated with the error recovery message. The processor fetches error recovery messages from a head of each die priority queue and performs read error recovery at the destination die.

Abstract: Techniques are disclosed for re-executing a data processing pipeline following a failure of at least one of its components. The techniques may include a syntax for defining a compute graph associated with the data processing pipeline and receiving such a compute graph in association with a specific data processing pipeline. The technique may include executing the data processing pipeline, determining that a component of the data processing pipeline failed, and determining a portion of the data processing pipeline to execute/re-execute based at least in part on dependencies defined by the data processing pipeline in association with the failed component. Re-executing the one or more components may comprise retrieving an output saved in association with a component upon which the failed component depends.