Ecc, Parity, Or Fault Code (i.e., Level 2+ Raid) Patents (Class 714/6.24)
  • Publication number: 20150149819
    Abstract: The present invention relates to operating a parity chunk, and a parity chunk operating method, in an environment dividing data of a file by a chunk unit, constituting a stripe by calculating a parity for a failure recovery, dispersely storing a data chunk and a parity chunk included in the stripe in multiple data servers, comprising the steps of: storing a data chunk and a parity chunk of a stripe structure in data servers; generating a partial parity using a previous data chunk in the storing step of a update data chunk by the data server storing the data chunk; and transmitting a partial parity to the data server storing the parity chunk, and a data server apparatus for supporting the same are disclosed.
    Type: Application
    Filed: April 3, 2014
    Publication date: May 28, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Sang Min LEE
  • Patent number: 9037904
    Abstract: A method begins by a processing module dispersed storage error encoding data to produce encoded data slices and updating directory metadata regarding storing the data in a dispersed storage network (DSN) memory to produce updated directory metadata. The method continues with the processing module dispersed storage error encoding the updated directory metadata to produce encoded directory metadata slices and transmitting one or more data slice write requests to the DSN that each include a first transaction number. The method continues with the processing module transmitting one or more directory metadata write requests to the DSN memory, wherein the one or more directory metadata write requests includes a second transaction number, and when a favorable write response condition exists, transmitting a commit request to the DSN memory to commit storage of at least one of: the encoded data slices and the encoded directory metadata slices.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: May 19, 2015
    Assignee: Cleversafe, Inc.
    Inventors: Ilya Volvovski, Andrew Baptist, Wesley Leggette
  • Publication number: 20150135006
    Abstract: The disclosure is directed to preserving data consistency in a multiple-node data storage system. According to various embodiments, a write log is maintained including log entries for data transfer requests being served by a respective node of the multiple-node data storage system. Rather than maintaining a full write journal of data and parity associated with each data transfer request, the log entries only need to identify portions of the virtual volume being updated according to the data transfer requests served by each node. When a first node fails, a second node takes over administration of a virtual volume for the failed node. Upon taking over for the first (failed) node, the second node resolves any inconsistencies between data and parity in portions of the virtual volume identified the respective log entries. Accordingly, write holes are prevented without substantially increasing memory usage or system complexity.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 14, 2015
    Applicant: LSI Corporation
    Inventors: Sumanesh Samanta, Horia Cristian Simionescu, Luca Bert, Debal Kr. Mridha, Mohana Rao Goli
  • Publication number: 20150135005
    Abstract: The invention pertains to a method and apparatus for writing data to an array of Shingled Magnetic Recording (SMR) devices. In an embodiment of the invention a parity band configured to allow random access writes is provided. Next, data is appended sequentially to a stripe on an array of SMR devices. Then the parity band is updated to contain parity data consistent with the data appended to the stripe. In another embodiment of the invention, a shingled parity band is provided. Data is then appended sequentially to a stripe on an array of SMR devices without the user being required to write an entire stripe of data. The provided parity band is then updated to contain parity data consistent with the data that was appended to the stripe. In such an embodiment it is not always necessary to delete all of the parity data in the parity band when updating the parity band.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 14, 2015
    Applicant: Dell Products, LP
    Inventors: Damon Hsu-Hung, G. Paul Koning
  • Patent number: 9032246
    Abstract: Some embodiments of the invention shift the responsibility for creating parity and error correction blocks from the hardware or software RAID units or modules to the computer system's file system, allowing the file system's existing mechanisms of write atomicity to be used to help ensure consistency of the on-disk information throughout all or increasing portions of the information saving and/or updating cycle.
    Type: Grant
    Filed: January 21, 2013
    Date of Patent: May 12, 2015
    Assignee: Intel Corporation
    Inventor: David Woodhouse
  • Patent number: 9032245
    Abstract: A data storage device and a method of managing data in the data storage device to improve data reliability are provided. In the method of managing data, one of control management information about a memory block of nonvolatile memory in which data will be written and control management information about the data are received. A redundant array of independent disks (RAID) parity page ratio is determined according to the control management information. When a data write operation mode is performed, parity data is written in a parity page of the memory block according the RAID parity page ratio. According to some embodiments of the inventive concepts, since a RAID parity page ratio is selectively determined according to control management information, reliability of data is secured or increased.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: May 12, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kangho Roh
  • Publication number: 20150127974
    Abstract: The methods of the invention of storing a data item and the associated method of repair of a failed storage device allow exact repair of the data lost by a failed storage device in a distributed data storage system. As repaired data is exactly identical to lost data, this simplifies data integrity checking, which is appealing for distributed data storage systems that require a high level of data security. The methods and devices of the invention use erasure correcting codes that are optimized at the MBCR point such that they minimize both storage size required to store a data item and repair bandwidth required for data- and message exchange between the devices of the distributed storage system in case of repair.
    Type: Application
    Filed: April 24, 2013
    Publication date: May 7, 2015
    Applicant: THOMSON LICENSING
    Inventors: Steve Jiekak, Nicolas Le Scouarnec
  • Publication number: 20150121133
    Abstract: A buffer integrated circuit device. The device comprising an output driver formed on the substrate member, the output driver having at least a command bus and an address bus. The device has a protocol and parity checking block (“Block”). The device has a table configured in the block. The table is programmable with a plurality of timing parameters. The device has a memory state block coupled to the table and a command history table coupled to the table to process protocol information for all commands that pass through the Block. The buffer integrated circuit device utilizes the protocol checking functionality to prevent failure propagation and enables data protection even in the case of host memory controller failure or system-level failure of any signal or signals on the command, control and address bus from the host memory controller to the buffer integrated device.
    Type: Application
    Filed: January 9, 2015
    Publication date: April 30, 2015
    Inventor: David WANG
  • Publication number: 20150121132
    Abstract: A register structure in an integrated circuit includes a first register element to store a first copy of data, a second register element to store a second copy of the data, and storage cells to store copies of a parity value of the data. The register structure also includes parity computing circuitry, coupled to the first and second register elements, to generate respective parity values of the first and second copies of the data. The register structure further includes a selection circuit to select between the first and second copies of the data based on a comparison of the respective parity values of the first and second copies of the data to a majority value of the copies of the parity value stored in the storage cells.
    Type: Application
    Filed: June 6, 2012
    Publication date: April 30, 2015
    Applicant: QUALCOMM INCORPORATION
    Inventors: Zhixin Tian, Yunfeng He
  • Publication number: 20150113319
    Abstract: A storage system includes a plurality of data disks that store information, and a parity disk that corresponds to a disk group including some of the plurality of data disks and stores parity information generated on the basis of data of the data disks included in the corresponding disk group. Any of the data disks is included in a plurality of the disk groups.
    Type: Application
    Filed: September 17, 2014
    Publication date: April 23, 2015
    Inventor: Takeshi Miyamae
  • Patent number: 9015524
    Abstract: The SSD performs to encode input data from the host device into BCH code having data length and code length sequentially and controls RRAM to stores the encoded data when the write requesting signal is input from the host device. When the number of BCH code that becomes data of one page of the flash memory after being decoded is stored to RRAM, the SSD controls RRAM to read out data stored in RRAM, performs error correction and decoding to the read data as BCH code having the data length and the code length, and controls the flash memory to store the encoded data.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: April 21, 2015
    Assignee: The University of Tokyo
    Inventors: Ken Takeuchi, Mayumi Fukuda
  • Patent number: 9003140
    Abstract: A storage system including first storage devices constituting a first logical storage area, second storage devices constituting a second logical storage area; and a storage control apparatus. The storage control apparatus manages the first and second logical storage areas so that the data stored in the first and second logical storage areas have redundancy, and parity data for the data stored in the second logical storage area are stored in parity storage areas arranged in part of the second storage devices. When part of the first storage devices constituting part of the first logical storage area fail, the storage control apparatus generates part of the data stored, before the failure, in the part of the first storage devices, and stores the generated part of the data in at least part of the second parity storage areas in the second logical storage area.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: April 7, 2015
    Assignee: Fujitsu Limited
    Inventors: Kazuhiko Ikeuchi, Hidejirou Daikokuya, Takeshi Watanabe, Norihide Kubota, Atsushi Igashira, Kenji Kobayashi, Ryota Tsukahara
  • Publication number: 20150095696
    Abstract: System and methods for managing I/O write requests of host systems to physical storage. A storage subsystem includes a plurality of storage devices where each storage device is configured to provide data storage. A controller is connected to the plurality of storage devices for executing the I/O write requests from the host systems and is further connected to a plurality of solid state drives in a parity RAID configuration. Non-valid portions of cache lines stored in stripes of the parity RAID configured second level cache are filled with known default values. Upon receiving an I/O write request to write new data to a non-valid portion of a cache line existing in the second level cache, the new data is spliced into the cache line and a new parity value is calculated without reading the known default values saving a read and an XOR operation.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: DataDirect Networks, Inc.
    Inventors: Randall L Hess, R. Brian Schow, Jesse L. Yandell, James P. Jackson
  • Publication number: 20150095697
    Abstract: A method for storing data including calculating: a first set of parity values using the data, a second set of parity values using the first set of parity values, and a third set of parity values using the data, and the first set and second set of parity values. The method further includes storing a portion of the data in a grid, where the grid includes grids locations that are each associated with a physical location, where each physical location is determined using a unique combination of at least a first value determined using a first independent fault domain and a second value determined using a second independent fault domain. The method further includes storing parity values from the first set of parity values and parity values from the second set of parity values in the grid, and storing the third set of parity values in an associated parity grid.
    Type: Application
    Filed: March 21, 2013
    Publication date: April 2, 2015
    Inventor: Jeffrey S. Bonwick
  • Patent number: 8996907
    Abstract: Methods, devices, and systems for determining location of error detection data are described. One method for operating a memory unit having a bad group of memory cells includes determining a location of where to store error detection data for data to be stored across a plurality of memory units, including the memory unit having the bad group, based at least partially on a location of the bad group and storing the error detection data in the determined location.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: March 31, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Christian M. Gyllenskog, Phil W. Lee, Steven R. Narum
  • Patent number: 8996908
    Abstract: A first SS (storage system) provides a first SA (storage area), a second SS provides a second SA, and first and second HSs (host systems) are coupled to the first and second SSs. First and second paths connect the first HS to the first and second SAs. Third and fourth paths connect the second HS to the first and second SAs. When the first path has a higher priority than the second path after recovery where a WR (write request) is permitted to be transmitted to the first SS, if the first SA which is a write destination for the received WR is a target in a data mirroring process, the first SS transmits a notification to stop the process. The second SS performs control such that a WR specifying the second SA as a write destination fails, and then the second HS transmits the WR using the third path.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: March 31, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Ryota Nishino, Kazuhiro Ooyama, Satoshi Kadoiri
  • Publication number: 20150089282
    Abstract: There is provided a method of recovering configuration metadata from an erasure encoded RAID array. The RAID array includes raw data including a plurality of codewords encoded using Reed-Solomon encoding. The codewords include message data and checksum data, and the configuration metadata includes parameters relating to the layout of the RAID array. The method includes reading, from the RAID array, raw data including message data and checksum data. Then a set of linear equations are defined using the message data and checksum data. The linear equations are then solved and then, from the solved linear equations, one or more parameters relating to the layout of the RAID array are determined.
    Type: Application
    Filed: September 25, 2013
    Publication date: March 26, 2015
    Applicant: Xyratex Technology Limited
    Inventor: Eugene Mathew TARANTA, II
  • Patent number: 8984374
    Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: March 17, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Tomohiro Yoshihara
  • Patent number: 8977893
    Abstract: A RAID data storage system incorporates permanently empty blocks into each stripe, distributed among all the data storage devices, to accelerate rebuild time by reducing the number of blocks that need to be rebuilt in the event of a failure.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: March 10, 2015
    Assignee: LSI Corporation
    Inventors: Sumanesh Samanta, Luca Bert, Satadal Bhattacharjee
  • Patent number: 8977813
    Abstract: The present disclosure includes systems and techniques relating to implementing fault tolerant data storage in solid state memory. In some implementations, a method includes receiving a data request for a solid state memory; identifying a logical block grouping corresponding to the data request, wherein the logical block grouping indicates physical data storage blocks spanning at least two distinct memory units of the solid state memory; reading stored data and parity information from at least a portion of the physical data storage blocks spanning the at least two distinct memory units; and recovering data of at least one block of the logical block grouping based on the stored data and the parity information.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: March 10, 2015
    Assignee: Marvell World Trade Ltd.
    Inventor: Gregory Burd
  • Patent number: 8977890
    Abstract: According to one embodiment, a memory system includes a first memory, a second memory, and a control unit. The first memory includes a volatile first register retaining a first operation parameter. The control unit performs a first operation of retaining the first operation parameter in the second memory. Then, the control unit turns OFF the first memory while retaining the first operation parameter in the second memory when an operation mode is switched from a first mode to a power saving second mode. Then, the control unit performs a second operation of turning on the first memory, and transferring the first operation parameter retained in the second memory to the first register when the operation mode is switched from the second mode to the first mode.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kohei Oikawa
  • Patent number: 8972779
    Abstract: Disclosed is a method of calculating parity. The method dividing, by a client system, a file which is to be stored into chunks of a preset size and distributively storing the chunks in a plurality of data servers; sending, by the client system, a data write complete notification message to a metadata server; storing, by the metadata server, a file sent through the data write complete notification message in a recovery queue; and sending, by the metadata server, a random data server a parity calculation request for the file stored in the recovery queue.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: March 3, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Min Lee, Hong Yeon Kim, Young Kyun Kim, Han Namgoong
  • Publication number: 20150058663
    Abstract: One embodiment of the present invention is a system including: (a) plural virtualization systems configured in a cluster; (b) storage accessible to each virtualization system of the cluster, wherein for each virtual machine operative in a virtualization system of the cluster, the storage maintains a representation of virtual machine state that includes at least a description of a hardware system virtualized and an image of virtualized memory state for the virtual machine; and (c) a failover system that, responsive to an interruption of, or on, a particular one of the virtualization systems, transitions at least one affected virtual machine to another virtualization system of the cluster and resumes computations of the transitioned virtual machine based on state encoded by a corresponding one of the virtual machine states represented in the storage.
    Type: Application
    Filed: September 23, 2014
    Publication date: February 26, 2015
    Applicant: VMWARE, INC.
    Inventors: Rene W. Schmidt, Sridhar Rajagopal
  • Publication number: 20150058661
    Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by a processing unit, includes at least the following steps. After a notification indicating that errors presented in a message of a sector within a RAID (Redundant Array of Independent Disk) group cannot be fixed by an error correction algorithm with a horizontal ECC (Error Correction Code) of the sector is received, addresses of the other sectors within the RAID group are determined Information is provided to a sector-decoding unit and a RAID-decoding unit, which indicates that a vertical correction procedure has been activated. Storage-unit access interfaces are directed to read content from the determined addresses of the storage unit, thereby enabling the RAID-decoding unit to recover the message of the sector by using the read content.
    Type: Application
    Filed: July 14, 2014
    Publication date: February 26, 2015
    Inventor: Tsung-Chieh Yang
  • Publication number: 20150058662
    Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by an arbiter, includes at least the following steps. After transmitting data to first storage units each connected to one of storage-unit access interfaces in a first batch, the arbiter issues a data write command to each first storage unit, thereby enabling each first storage unit to start a physical data programming. During the physical data programming of each first storage unit, data is transmitted to second storage units each connected to one of the storage-unit access interfaces in a second batch.
    Type: Application
    Filed: July 15, 2014
    Publication date: February 26, 2015
    Inventors: Tsung-Chieh Yang, Yang-Chih Shen, Sheng-I Hsu
  • Patent number: 8966341
    Abstract: A method includes a DSN access token module retrieving one or more sets of at least a threshold number of dispersed storage (DS) error coding function slices from the DSN memory via the computing device. The method continues with the computing device and/or the DSN access token module decoding the one or more sets of the at least a threshold number of DS error coding function slices using a default DS error coding function to recapture a DS error coding function. The method continues with the computing device and/or the DSN access token module generating a plurality of sets of data access requests in accordance with the DS error coding function. The method continues with the computing device sending the plurality of sets of data access requests to the DSN memory.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: February 24, 2015
    Assignee: Cleversafe, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison, Greg Dhuse, Jason K. Resch, Ilya Volvovski, Wesley Leggette
  • Publication number: 20150052388
    Abstract: A method begins by a dispersed storage (DS) processing module encrypting a plurality of data segments of the data using a plurality of encryption keys to produce a plurality of encrypted data segments and generating a plurality of deterministic values from the plurality of encrypted data segments. The method continues with the DS processing module establishing a data intermingling pattern and generating a plurality of masked keys by selecting one or more of the plurality of deterministic values in accordance with the data intermingling pattern and performing a masking function on the plurality of encryption keys and the selected one or more of the plurality of deterministic values. The method continues with the DS processing module appending the plurality of masked keys to the plurality of encrypted data segments to produce a plurality of secure data packages and outputting the plurality of secure data packages.
    Type: Application
    Filed: September 29, 2014
    Publication date: February 19, 2015
    Applicant: CLEVERSAFE, INC.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 8959420
    Abstract: The present data storage system employs a memory controller with embedded logic to selectively XOR incoming data with data written in the memory to generate XOR parity data. The memory controller automatically performs XOR operations on incoming data based upon the address range associated with the memory “write” request. The system provides data migration and parity generation in a simple and effective manner and attains reduction in cost and power consumption. The memory controller may be built on the basis of FPGAs, thus providing an economical and miniature system.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 17, 2015
    Assignee: DataDirect Networks, Inc.
    Inventors: Michael J. Piszczek, Jason M. Cope, William J Harker, Pavan Kumar Uppu, Thomas E. Fugini
  • Patent number: 8959375
    Abstract: A system and method for power management of storage resources are disclosed. A method may include detecting an occurrence of an event associated with a storage resource disposed in an array of storage resources. The method may further include transitioning the storage resource into a specified power state in response to the detection of the occurrence of the event. A system may include a storage resource and a power management module communicatively coupled to the storage resource. The storage resource may be disposed in an array of storage resources. The power management module may be operable to detect an occurrence of an event associated with the storage resource, and may be operable to transition the storage resource into a specified power state in response to the detection of the occurrence of the event.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: February 17, 2015
    Assignee: Dell Products L.P.
    Inventors: Christiaan Wenzel, Radhakrishna Dasari, Vishwanath Jayaraman, Jianwen Yin
  • Patent number: 8959390
    Abstract: A method and system for reducing replication factor in a file system are provided. In some embodiments, two or more requested files may be grouped together under a leaf directory for RAID process. All data under the directory are grouped into one or more data stripes, each of which comprises a plurality of data blocks. One or more parity data blocks may be generated for each data stripe according to a computing algorithm, such as an exclusive OR (XOR) code or a Reed-Solomon (RS) code. Parity blocks corresponding to the one or more data stripes are concatenated into one parity file. Data blocks of the two or more requested files and their corresponding parity blocks are stored in separate partitions and/or separate storage drives of the file system.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: February 17, 2015
    Assignee: Facebook, Inc.
    Inventors: Hairong Kuang, Weiyan Wang, Dikang Gu
  • Patent number: 8954793
    Abstract: A method and a storage server for backing up data, involves mass storage devices of users of the service that connect to the storage server of the service provider over a public data network. The customers store the data with their terminals. The data is stored to the file system of the mass storage device which encrypts the stored data and transfers the data in encrypted form over the public data network to the storage server. The storage server calculates error correction data from the encrypted data. The error correction data is stored in the mass memory of the storage server. When recovering the stored data of the users, the storage server requests the stored data of all the users whose data was used for the error correction data calculation over the public data network to be used for the recovery calculation.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: February 10, 2015
    Assignee: Varaani Works Oy
    Inventor: Kimmo Lahdensivu
  • Patent number: 8954694
    Abstract: A data storage device comprises a plurality of non-volatile memory devices configured to store a plurality of physical pages; a controller coupled to the plurality of memory devices that is configured to program data to and read data from the plurality of memory devices. A volatile memory may be coupled to the controller and may be configured to store a firmware table comprising a plurality of firmware table entries. The controller may be configured to maintain a plurality of firmware journals in the non-volatile memory devices. Each of the firmware journals may be associated with a firmware table entry and may comprise firmware table entry information. The controller may be configured to read the plurality of firmware journals upon startup and rebuild the firmware table using the firmware table entry information in each of the read plurality of firmware journals.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: February 10, 2015
    Assignees: Western Digital Technologies, Inc., Skyera, Inc.
    Inventors: Andrew J. Tomlin, Justin Jones, Rodney N. Mullendore
  • Publication number: 20150039935
    Abstract: A computing device collects wear life data of a first and a second solid state drive, wherein each solid state drive includes at least one stride, and wherein wear life data is data which includes information regarding wear and deterioration of each stride of each solid state drive. Based on the collected wear life data, the computing device determines the first solid state drive contains more high usage strides than the second solid state drive, wherein a high usage stride is a stride containing high usage data. The computing device then re-allocates data from at least one high usage stride of the first solid state drive to a stride of the second solid state drive, wherein the re-allocated data includes parity data.
    Type: Application
    Filed: August 1, 2013
    Publication date: February 5, 2015
    Applicant: International Business Machines Corporation
    Inventors: Xue D. Gao, Jeffrey R. Steffan
  • Publication number: 20150039936
    Abstract: A method includes encoding input data into a plurality of slices. The plurality of slices are sent to a plurality of distributed storage and task execution units for storage, the plurality of distributed storage and task execution units being located at a corresponding plurality of sites A storage failure is detected corresponding to at least one of the plurality of slices corresponding to at least one of the plurality of the distributed storage and task execution units and at least one of the corresponding plurality of sites A foster storage approach is determined. At least one alternative distributed storage and task execution unit is selected in accordance with the foster storage approach. At least one foster slice is generated corresponding to the at least one of the plurality of slices. The at least one foster slice is sent to the at least one alternative distributed storage and task execution unit.
    Type: Application
    Filed: May 27, 2014
    Publication date: February 5, 2015
    Applicant: CLEVERSAFE, INC.
    Inventors: Asimuddin Kazi, Jason K. Resch
  • Publication number: 20150033070
    Abstract: A data recovery method, a data recovery device and a distributed storage system are provided, where the method includes: in a case that a distributed storage system loses data of three nodes, recovering data on a target data storage node of the data on the three nodes according to data of a parity node and a data storage node without data loss; and performing degraded recovery on the remaining lost data according to the recovered data of the target data storage node. According to the embodiments of the present invention, a target data storage node first recovered is determined according to the symmetry of lost data, and the lost data of three nodes is recovered according to parity data and data that is not lost, which can improve the data recovery performance of the distributed storage system in a case that the data of three nodes is lost.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 29, 2015
    Inventors: Xiaohui Ma, Yaping Sun, Haixiao Chen
  • Patent number: 8943357
    Abstract: A computer storage management system for managing a first plurality of data storage units, the system including: (a) an asynchronous parity computation manager which, responsive to a write operation in which an incoming data portion is to be written into an individual storage unit from among the storage units, deposits the incoming value in the individual storage unit and stores a copy of the data element in a pre-parity storage area, and wherein asynchronously with depositing the incoming value in the individual storage unit, the asynchronous parity computation manager is operative to compute parity data corresponding to the incoming data portion and to other data portions which are associated with the incoming data portion and to store the parity data; and (b) a post-loss data recovery manager operative to recover lost data including determining whether at least one parity value associated with at least one data portion within said lost data is not current and, for at least one non-current parity, using inf
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: January 27, 2015
    Assignee: Kaminario Technologies Ltd.
    Inventor: Yedidia Atzmony
  • Patent number: 8938641
    Abstract: A disk array redundancy controller ensures integrity of a mirrored or RAID storage array supporting a host system and minimizes recovery time responsive to a storage volume failure by traversing caches of recently written blocks to identify partially flushed stripes of data and recovering the inconsistent stripes on each of the storage volumes based on a master copy derived from the scan of all pre-failure caches of the storage array. The storage array employs nonvolatile caches in conjunction with solid state drive (SSD) storage volumes, allowing post-failure recovery of recently written blocks. A cache depth at least sufficient to store the largest stripe, or set of blocks, from the host ensures recovery of the entire stripe from a collective scan of the caches of all storage volumes of the storage array.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: January 20, 2015
    Assignee: Intel Corporation
    Inventors: Bryan E. Veal, Annie Foong
  • Patent number: 8930780
    Abstract: The present invention is related to systems and methods for harmonizing testing and using a storage media. As an example, a data system is set forth that includes: a data decoder circuit, a data processing circuit, and a write circuit. The data decoder circuit is configured to decode a test data set to yield a result. The data processing circuit is configured to encode a user data set guided by the result to yield a codeword. The write circuit is configured to store an information set corresponding to the codeword to a storage medium.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: January 6, 2015
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Bruce A. Wilson
  • Patent number: 8924832
    Abstract: A data storage system configured to efficiently search and update system data is disclosed. In one embodiment, the data storage system can attempt to correct errors in retrieved data configured to index system data. Metadata stored along with user data in a memory location can be configured to indicate a logical address associated in a logical-to-physical location mapping with a physical address at which user data and metadata are stored. The data storage system can generate modified versions of logical address indicated by the metadata and determine whether such modified versions match the physical address in the logical-to-physical mapping. Modified versions of the logical address can be generated by flipping one or more bits in the logical address indicated by the metadata. Efficiency can be increased and improved performance can be attained.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: December 30, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: Johnny A. Lam
  • Patent number: 8924776
    Abstract: A method for calculating parity values including calculating a first set of parity values using datum stored in RAID Grid locations in a first PCB, where datum associated with the RAID Grid locations in the first PCB is obtained in a first order that is based on a Hilbert curve. The method further includes calculating a second set of parity values using datum stored in RAID Grid locations in a second PCB, where datum associated with the RAID Grid locations in the second PCB is obtained in a second order that is based on the Hilbert curve. The method further includes storing at least a portion of the first set of parity values and a second set of parity values in a cache, memory, or persistent storage, where each of the first parity values and second parity values is associated with a separate RAID Grid location in the RAID Grid.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: December 30, 2014
    Assignee: DSSD, Inc.
    Inventors: Todor Ivanov Mollov, Jeffrey S. Bonwick
  • Publication number: 20140380092
    Abstract: Provided is a control device for managing a plurality of memory channels driven through multichannel interleaving. The apparatus includes a stripe configuring unit for configuring a stripe according to a physical number of pages included in the plurality of memory channels, and a parity generating unit for generating parity data on the configured stripe.
    Type: Application
    Filed: February 8, 2013
    Publication date: December 25, 2014
    Inventors: Jae Ho Kim, Jong Min Lee, Jong Moo Choi, Dong Hee Lee, Sam Hyuk Noh
  • Publication number: 20140380093
    Abstract: A resilient distributed replicated data storage system is described herein. The storage system includes zones that are independent, and autonomous from each other. The zones include nodes that are independent and autonomous. The nodes include storage devices. When a data item is stored, it is partitioned into a plurality of data objects and a plurality of parity objects are calculated. Reassembly instructions are created for the data item. The data objects, parity objects and reassembly instructions are spread across nodes and zones in the storage system according to a policy for the data item. When a zone is inaccessible, a virtual zone is created and used until the intended zone is available. When a read request is received, the data item is prepared from the lowest latency nodes according to the reassembly instructions, and a virtual zone is accessed in place of a real zone when the real zone is inaccessible.
    Type: Application
    Filed: September 10, 2014
    Publication date: December 25, 2014
    Inventors: Donald J. Molaro, David Fellinger, Adam Fried-Gintis, Dan Olster
  • Patent number: 8918674
    Abstract: A method begins by a processing module receiving a data storage request, wherein the data storage request includes data and a data identifier (ID). The method continues with the processing module dispersed storage error encoding the data to produce a set of encoded data slices and determining a data dispersed storage network (DSN) address. The method continues with the processing module sending the set of encoded data slices to a DSN memory for storage at the data DSN address and updating a directory file with path information corresponding to the data ID and the data DSN address to produce an updated directory file. The method continues with the processing module dispersed storage error encoding the updated directory file to produce a set of encoded updated directory slices and sending the set of encoded updated directory slices to the DSN memory for storage at a directory DSN address.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: December 23, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, Andrew Baptist, Srinivas Palthepu, Greg Dhuse, Ilya Volvovski, Wesley Leggette, Manish Motwani
  • Patent number: 8914706
    Abstract: A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: December 16, 2014
    Assignee: Streamscale, Inc.
    Inventor: Michael H. Anderson
  • Patent number: 8914669
    Abstract: A method begins by a processing module identifying an encoded data slice to be rebuilt, selecting a decode threshold number of dispersed storage (DS) units of a storage set of DS units, generating a decode threshold number of key pairs, wherein a key pair of the decode threshold number of key pairs corresponds to a DS unit of the decode threshold number of DS units, and sending partial rebuilding requests to the decode threshold number of DS units, wherein a partial rebuilding request of the partial rebuilding requests includes the key pair. The method continues with the processing module receiving encrypted partial encoded data slices, wherein an encrypted partial encoded data slice received from the corresponding DS unit includes a multiple encryption, using the key pair, of a partial encoded data slice and decoding the encrypted partial encoded data slices to rebuild the encoded data slice.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: December 16, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Greg Dhuse, Wesley Leggette, Andrew Baptist, Jason K. Resch
  • Patent number: 8914670
    Abstract: A method includes, in a non-volatile memory that includes multiple memory blocks, defining a redundancy zone that includes at least an old parity block, a new parity block and multiple active blocks of which one block is defined as an open block. Data is stored in the redundancy zone and the stored data is protected, such that new input data is stored in the open block, redundancy information for the active blocks including the open block is stored in the new parity block, and the redundancy information for the active blocks excluding the open block is stored in the old parity block. Upon filling the open block and the new parity block, an alternative block is assigned to serve as the open block and the new parity block is assigned to serve as the old parity block.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: December 16, 2014
    Assignee: Apple Inc.
    Inventors: Etai Zaltsman, Julian Vlaiko, Ori Moshe Stern, Avraham Poza Meir
  • Publication number: 20140365821
    Abstract: A data storage method includes identifying, in a set of data items associated with respective logical addresses for storage in a memory, a first subset of the logical addresses associated with the data items containing application data, and a second subset of the logical addresses associated with the data items containing parity information that has been calculated over the application data. The data items associated with the first identified subset are stored in one or more first physical memory areas of the memory, and the data items associated with the second identified subset are stored in one or more second physical memory areas of the memory, different from the first physical memory areas. A memory management task is performed independently in the first physical memory areas and in the second physical memory areas.
    Type: Application
    Filed: August 26, 2014
    Publication date: December 11, 2014
    Inventors: Avraham Poza Meir, Oren Golov, Naftali Sommer, Moshe Neerman
  • Patent number: 8904226
    Abstract: A method begins by a processing module identifying a set of stored files that includes an original file and one or more back-up copies of the original file. The method continues with the processing module dispersed storage error encoding one of the set of stored files to produce a plurality of sets of encoded data slices. The method continues with the processing module facilitating storage of the plurality of sets of encoded data slices. The method continues with the processing module facilitating deletion of the set of stored files.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: December 2, 2014
    Assignee: Cleversafe, Inc.
    Inventors: Jason K. Resch, Gary W. Grube, Timothy W. Markison
  • Publication number: 20140351632
    Abstract: A method begins by a processing module of a dispersed storage network (DSN) receiving data in a redundant array of independent disks (RAID) format and converting from the RAID format to an original format of the data. The method continues with the processing module dispersed storage error encoding a data segment of the data in the original format to produce a set of encoded data slices, where a set of encoded data slices includes a decode threshold sub-set of encoded data slices and an error correcting sub-set of encoded data slices. The method continues with the processing module converting the decode threshold sub-set of encoded data slices into a RAID formatted data segment, storing the RAID formatted data segment in RAID memory, and storing at least the error correcting sub-set of encoded data slices in DSN memory.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 27, 2014
    Applicant: CLEVERSAFE, INC.
    Inventors: Gary W. Grube, Jason K. Resch
  • Publication number: 20140351633
    Abstract: A method begins by a processing module receiving data for storage and interpreting the data to identify the data as redundant array of independent disks (RAID) data. The method continues with the processing module interpreting the RAID data to identify at least one of RAID block data and RAID parity data. When the RAID data includes RAID block data and RAID parity data the method continues with the processing module encoding the RAID block data in accordance with error coding dispersal storage function parameters to produce at least one set of encoded data slices and outputting the at least one set of encoded data slices to a dispersed storage network memory.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Applicant: CLEVERSAFE, INC.
    Inventors: Gary W. Grube, Jason K. Resch