Abstract: Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.

Abstract: A method begins by a processing module determining access performance to copies of dispersed storage encoded data, wherein the copies of the dispersed storage encoded data are stored in a set of a plurality of dispersed storage networks (DSNs). The method continues with the processing module modifying the set of the plurality of DSNs based on the access performance and the desired access performance level to produce a modified set of the plurality of DSNs when the access performance is not at a desired access performance level. The method continues with the processing module, for a new DSN of the modified set of the plurality of DSNs, determining error coding dispersal storage parameters based on local data retrieval accesses allocated to the new DSN and facilitating the new DSN storing another copy of the dispersed storage encoded data.

Abstract: A file directory system comprises a directory file, a directory address for the directory file, and a directory address failsafe mechanism. The directory file includes one or more directory entries and one or more corresponding addresses for the one or more directory entries. The directory address failsafe mechanism functions to dispersed storage error encode the directory address to produce a plurality of encoded components of the directory address and transmit the plurality of encoded components of the directory address to a plurality of agent modules.

Abstract: A system and method for power management of storage resources are disclosed. A method may include detecting an occurrence of an event associated with a storage resource disposed in an array of storage resources. The method may further include transitioning the storage resource into a specified power state in response to the detection of the occurrence of the event. A system may include a storage resource and a power management module communicatively coupled to the storage resource. The storage resource may be disposed in an array of storage resources. The power management module may be operable to detect an occurrence of an event associated with the storage resource, and may be operable to transition the storage resource into a specified power state in response to the detection of the occurrence of the event.

Abstract: A disk drive system and method capable of dynamically allocating data is provided. The disk drive system may include a RAID subsystem having a pool of storage, for example a page pool of storage that maintains a free list of RAIDs, or a matrix of disk storage blocks that maintain a null list of RAIDs, and a disk manager having at least one disk storage system controller. The RAID subsystem and disk manager dynamically allocate data across the pool of storage and a plurality of disk drives based on RAID-to-disk mapping. The RAID subsystem and disk manager determine whether additional disk drives are required, and a notification is sent if the additional disk drives are required. Dynamic data allocation and data progression allow a user to acquire a disk drive later in time when it is needed. Dynamic data allocation also allows efficient data storage of snapshots/point-in-time copies of virtual volume pool of storage, instant data replay and data instant fusion for data backup, recovery etc.

Abstract: Systems and methods are disclosed for recovering from a data access error encountered in data stripes implemented in a data redundancy scheme (e.g., RAID) in a solid state storage device. In one embodiment, the storage device holds parity data in a temporary, volatile memory such as a RAM and writes the parity data to the non-volatile memory when a full stripe's worth of new write data has been written to the non-volatile memory. In one embodiment, upon detecting that a data access error has occurred in a partially written stripe, the storage device initiates a write of the parity data for the partially written stripe to the non-volatile memory and executes a RAID recovery procedure using the newly written parity data to attempt to recover from the detected error. This approach allows for a recovery from the data access error without waiting for the full stripe to be written.

Abstract: In one embodiment of the invention, a flash-based/solid-state storage system with an implemented data redundancy scheme such as RAID is configured to hold parity data in a volatile memory such as RAM and write such parity data to the non-volatile flash media when a full stripe of data has been written to the media. Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present. Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery. This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly.

Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Abstract: A latency reduction method for read operations of an array of N solid-state storage devices having n solid-state storage devices for data storage and p solid-state storage devices for storing parity data is provided. Utilizing the parity generation engine fault tolerance for a loss of valid data from at least two of the N solid-state storage devices, the integrity of the data is determined when N?1 of the solid-state storage devices have completed executing a read command. If the data is determined to be valid, the missing data of the Nth solid-state storage device is reconstructed and the data transmitted to the requesting processor. By that arrangement the time necessary for the Nth solid-state storage device to complete execution of the read command is saved, thereby improving the performance of the solid-state memory system.

Abstract: A method begins by a processing module dispersed storage error encoding data to produce a set of encoded data slices and sending a set of write request messages to a set of dispersed storage (DS) units, wherein each of the set of write request messages includes an encoded data slice of the set of encoded data slices. The method continues with the processing module determining whether a pillar width number of favorable write response messages has been received within a write acknowledgement (ACK) time period. The method continues with the processing module executing a retry write process to at least one DS unit of the set of DS units from which a favorable write response message was not received during the write ACK time period when the pillar width number of favorable write response messages has not been received within the write ACK time period.

Abstract: An electronic device including a NAND flash memory, an auxiliary memory, and a controller is provided. A code for detecting a read command sequence of the NAND flash memory is stored in the auxiliary memory. During a boot procedure of the electronic device, the controller reads the code from the auxiliary memory and executes the code to obtain the read command sequence of the NAND flash memory, so as to access content stored in the NAND flash memory according to the read command sequence.

Abstract: Fault-tolerant storage is provided using a distributed data storage system that receives input data from clients and divides that data into data blocks for storage. The data blocks are processed using a coding scheme that generates redundant level one error correction blocks (L1EC Blocks). The L1EC blocks enable the reconstruction of one or more damaged or inaccessible data blocks, and the L1EC blocks and the data blocks are divided into distribution sets and stored at a plurality of data storage locations. At each data storage location additional level two error correction blocks (L2EC blocks) are generated that provide local data redundancy. Upon detecting a data disruption event, an inaccessible data storage location is identified and the elements that were stored at the inaccessible data storage location are reconstructed.

Abstract: A method and apparatus for controlling marking store updates in a central electronic complex with a plurality of core processors and eDRAM cache and interconnect bus to a service processor for loading memory controller firmware to dual-channel DDR3 memory controllers with an internal marking store. Loaded firmware of the memory controllers is responsible for tracking of ECC errors using a ECC decoder control whereby said marking store is written by a slow ECC decoder, and read by a fast ECC decoder for every read operation of said memory controllers to provide a blocking mechanism for notifying marking store firmware when the marking store has been updated and which guarantees that marking store firmware cannot write to the marking store until the marking store firmware has seen updates without causing the marking store hardware to time out.

Abstract: The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands.

Abstract: Protection from uncorrectable media errors are provided for a RAID-configured storage system by a technique in which c redundancy information sectors are associated with n data information sectors. The n data sectors and c redundancy information sectors are then written as a single segment on a single storage unit. The RAID-configured storage system can be configured, for example, as a RAID 6 storage system, a RAID 5 storage system, a RAID 51 storage system, a RAID 3+3 storage system or a RAID N+3 storage system. The redundancy information can be based on a Reed-Solomon code, an XOR-based code, or one-dimensional parity.

Abstract: Examples are disclosed for facilitating recovery from failures associated with a storage array having a plurality of storage devices.

Abstract: Maintaining consistency and freshness of information about an operational system, assuring consistent actions by system actors, assuring that system elements use only a single global status of the system for any particular status time, assuring that each pair of elements acts only upon consistent status values, assuring that system elements operate only with status values measured sufficiently recently to be reliable. Information collectors respond to status values. Information containers respond to information collectors, maintaining status values and metadata indicating whether those status values are reliable, or are consistent with respect to known correct values. Information conditions respond to information collectors or information containers, maintaining logical consistency with a unified global status. System actors respond to information containers or information conditions, acting logically consistent with that global status.

Abstract: Methods and apparatuses for enhanced protection of data stored in a FLASH memory system involve a controller capable of adapting to the failure of one or more FLASH memory devices in the memory system. The controller stores data in the form of page stripes, each page stripe composed of data pages, and each data page stored in a different FLASH memory device. The controller also detects failure of a FLASH memory device in which a data page of a particular page stripe is stored, reconstructs the data page, and stores the reconstructed data page in a new page stripe, where the number of data pages in the new page stripe is less than the number of data pages in the particular page stripe, and where no page of the new page stripe is stored in a memory location within the failed FLASH memory device.

Abstract: Methods and apparatuses for enhanced protection of data stored in a FLASH memory system involve a controller capable of adapting to the failure of one or more FLASH memory devices in the memory system. The controller stores data in the form of page stripes, each page stripe composed of data pages, and each data page stored in a different FLASH memory device. The controller also detects failure of a FLASH memory device in which a data page of a particular page stripe is stored, reconstructs the data page, and stores the reconstructed data page in a new page stripe, where the number of data pages in the new page stripe is less than the number of data pages in the particular page stripe, and where no page of the new page stripe is stored in a memory location within the failed FLASH memory device.

Abstract: A distributed storage network generates a plurality of data segments from a data object and stores each of the plurality of data segments as a plurality of encoded data slices generated from an error encoding dispersal function. When the distributed storage network receives a modification request for the data object, it determines a size of the plurality of data segments of the data object from a segment size field and identifies one of the plurality of data segments requiring modification. The identified data segment is reconstructed from the plurality of encoded data slices and modified in accordance with the modification request.

Abstract: A method begins with a processing module determining a retrieval threshold for retrieving a set of encoded data slices from a dispersed storage network (DSN). The set of encoded data slices represents data encoded using a dispersed storage error encoding function having a number of encoded data slices in the set of encoded data slices equal to or greater than a decode threshold and the retrieval threshold is equal to or greater than the decode threshold. The method continues with the processing module issuing data retrieval requests to the DSN for the set of encoded data slices and receiving encoded data slices of the set of encoded data slices to produce received encoded data slices. The method continues with the processing module decoding the received encoded data slices to recapture the data when a number of received encoded data slices compares favorably to the retrieval threshold.

Abstract: A method is provided of encoding data within a RAID stripe, the RAID stripe being spread across k data disks and r redundancy disks of a RAID group, r?3, the RAID group having k+r disks, the k data disks and the r redundancy disks within the RAID stripe being distinct, such that, upon failure of any r disks of the k+r disks of the RAID group, the data can be fully recovered using the Forney algorithm. The method includes (a) partitioning the data into k data symbols, (b) storing each of the k data symbols to a respective data disk of the k data disks, (c) generating r Reed-Solomon redundancy symbols by applying the Forney algorithm to the k data symbols, and (d) storing each of the r Reed-Solomon redundancy symbols generated by the Forney algorithm to a respective redundancy disk of the r redundancy disks.

Abstract: According to one embodiment, a semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.

Abstract: A method begins by a processing module sending list digest requests to a set of dispersed storage (DS) units. The method continues with the processing module receiving list digest responses from at least some of the set of DS units and determining whether an inconsistency exists between first and second list digest responses of the list digest responses. The method continues with the processing module requesting at least a portion of each of the slice name information lists from first and second DS units of the set of DS units and identifying a slice name information error associated with the inconsistency based on the at least a portion of each of the slices name information lists of the first and second DS units when the inconsistency exists between first and second list digest responses of the list digest responses.

Abstract: A method for maintaining vital product data (VPD) of each field replaceable unit (FRUs) in a computer system, the computer system including a first FRU and a second FRU operatively coupled with the first FRU. The method includes calculating a parity for the VPD of the second FRU, and upon detecting a failure of the second FRU, regenerating the VPD for the failed second FRU using the parity.

Abstract: According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.

Abstract: Error correction code (ECC) checkbits are generated for each write access to a memory address based on both the data to be written (the write data) and the memory address. The ECC checkbits are stored with the write data at the memory device associated with the memory address. In addition, the memory device can selectively perform error detection and correction for write accesses using the ECC checkbits. For example, the memory device can include an ECC control register that stores control information to selectively enable and disable error detection and correction for write accesses. In an embodiment, error detection and correction can be selectively enabled and disabled for different sizes of write data.

Abstract: Redundant “parity” RAID (5, 6, 50, 60) is a well-known technique for increasing data reliability beyond the failure rate of an individual storage device. In many implementations of redundant RAID, when a storage element is lost, a replacement or spare element is required to restore redundancy. A typical solid state storage device is over-provisioned with more storage media than is required to satisfy the specified user capacity. Embodiments of the present invention utilize the additional over-provisioned capacity and potentially modify the stripe size to restore RAID redundancy when a storage element or path (i.e., page, block, plane, die, channel, etc.) has failed. In some cases, this may also involve reducing the RAID stripe size.

Abstract: A method of operating a nonvolatile memory device comprises performing a read operation to read data stored in a first memory cell block including first unit groups; detecting a second unit group from among the first unit groups, the second unit group having a number of error bits included in the read data, which is greater than a set number of bits and equal to or smaller than a maximum allowable number of bits which can be corrected through an error checking and correction (ECC) processing; and after the second unit group is detected, performing a copyback operation for moving the data, that are stored in the first memory cell block, to a second memory cell block.

Abstract: A storage server stores data in a stripe of a parity group that includes a plurality of data storage devices to store data and a parity storage device to store parity information. The stripe includes a data block from each of the data storage devices and a parity block from the parity storage device. The storage server receives a data access request specifying a data block in the stripe, and a lost write detection module detects an error in the data block. The lost write detection module compares a first storage device signature stored in a metadata field associated with the data block to a second storage device signature stored in a global field of the data storage device containing the data block. If the first storage device signature matches the second storage device signature, the lost write detection module compares a consistency point count stored in the metadata field to a reconstructed consistency point count.

Abstract: Systems and methods are provided for encoding data based on an LDPC code using various inversion mechanisms to obtain parity bits. In some embodiments, an LDPC encoder may compute parity bits using a speculative recursion and correction mechanism. In these embodiments, the LDPC encoder may initiate a recursion using at least one speculative value in place of the actual value for a parity component. The speculative values may then be corrected using a correction factor. In other embodiments, an LDPC encoder is provided that can perform a blockwise inversion mechanism. This mechanism may be used on LDPC codes with parity check matrices having a parity portion composed partially of a large triangular matrix. In still other embodiments, a generic LDPC encoder is provided. The generic LDPC encoder can implement a variety of different encoding techniques, such as different inversion mechanisms, and may be processor-based or finite state machine-based.

Abstract: A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.

Abstract: A method and apparatus for rebuilding a data set. In accordance with some embodiments, a data storage device is coupled to a host. An error condition associated with a memory of the data storage device is detected. Data stored in a first portion of the memory unaffected by said error condition is transferred to the host. A communication signal is output to the host that indicates that data stored in a second portion of the memory affected by said error condition will not be transferred to the host. The host reconstructs the data stored in the second portion of the memory responsive to the communication signal.

Abstract: According to one embodiment, a disk storage apparatus includes a write module, an operation module, and a controller. The write module is configured to write data, in units of blocks, in a designated write area of a disk. The operation module is configured to perform an exclusive OR operation on the blocks of data. The controller is configured to control the write module, causing the write module to write, in a designated block, recovery data that is a result of the exclusive OR operation on all data blocks written in the designated write area.

Abstract: For each original data segment, a distributed storage processing unit generates encoded slices designed to prevent the original data segment from being reconstructed using fewer than a threshold number of encoded slices. Multiple encoded slices are generated for each of two different data segments, and the slices associated with the first and second data segment are stored substantially concurrently in different storage sets employing different distributed storage units. Encoded slices for even and odd data segments can be stored in different storage sets, or longer sequences of data segments can be stored in alternating storage sets. Storage sets can also be determined by the vault generation of a particular data segment.

Abstract: Methods, devices, and systems for determining location of error detection data are described. One method for operating a memory unit having a bad group of memory cells includes determining a location of where to store error detection data for data to be stored across a plurality of memory units, including the memory unit having the bad group, based at least partially on a location of the bad group and storing the error detection data in the determined location.

Abstract: A method begins by a processing module dispersed storage error encoding data to produce a set of encoded data slices and sending a set of write request messages to a set of dispersed storage (DS) units, wherein each of the set of write request messages includes an encoded data slice of the set of encoded data slices. The method continues with the processing module determining whether a pillar width number of favorable write response messages has been received within a write acknowledgement (ACK) time period. The method continues with the processing module executing a retry write process to at least one DS unit of the set of DS units from which a favorable write response message was not received during the write ACK time period when the pillar width number of favorable write response messages has not been received within the write ACK time period.

Abstract: A method is disclosed for updating parity information in a RAID 6 system wherein only one parity block is read during each write operation. Both parity blocks may be updated from the new data, the data being overwritten and either of the old blocks of parity information. A method for load balancing in a RAID 6 system using this method is also disclosed.

Abstract: A method begins by identifying a data slice requiring rebuilding to produce an identified data slice, wherein the identified data slice is one of a plurality of data slices that constitute a data segment and wherein each of the plurality of data slices is assigned for storage by a corresponding one of a plurality of data slice servers. The method continues by retrieving at least m number of data slices from at least m number of the plurality of data slice servers, wherein m data slices of the plurality of data slices enable reconstruction of the data segment, and wherein the at least m number of data slices does not include the identified data slice. The method continues by reconstructing the identified data slice from the at least m number of data slices to produce a rebuilt data slice. The method continues by writing the rebuilt data slice to the corresponding one of the plurality of data slice servers or to a new slice server.

Abstract: According to one embodiment, a semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.

Abstract: A method begins by a processing module receiving a write request that includes a batch of encoded data slices and a corresponding batch of slice names, wherein the batch of encoded data slices includes encoded data slices that have slices names that have a common data object storage name, a common slice storage name, and a different data segment storage name. The method continues with the processing module determining whether a storage file exists based on the common data object storage name. The method continues with the processing module creating the storage file based on the common data object storage name when the storage file does not exist. The method continues with the processing module storing the batch of encoded data slices in the storage file based on the corresponding batch of slice names.

Abstract: Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.

Abstract: For preventing data loss in storage systems, a detection is made that a storage device in a plurality of storage devices is experiencing a malfunction. The type of malfunction is determined. A SMART rebuilding technique, a normal building technique, a data migration technique, or a user data backup technique is selected to preserve the data in the storage device based on the determined type of the malfunction. The selected technique is performed on the storage device.

Abstract: A method begins by a processing module receiving a data retrieval request and determining a read threshold number of dispersed storage (DS). The method continues with the processing module sending read request messages to DS units and receiving encoded data slices to produce received encoded data slices. The method continues with the processing module determining an incremental number of encoded data slices based on the number of received encoded data slices, determining an incremental number of DS units, and sending a read request message to each of the incremental number of DS units when the number of received encoded data slices compares unfavorably to a decode threshold number. The method continues with the processing module dispersed storage error decoding the received encoded data slices to produce data when the number of received encoded data slices compares favorably to the decode threshold number of encoded data slices.

Abstract: Error correction and detection in a redundant memory system including a a computer implemented method that includes receiving data including error correction code (ECC) bits, the receiving from a plurality of channels, each channel comprising a plurality of memory devices at memory device locations. The method also includes computing syndromes of the data; receiving a channel identifier of one of the channels; and removing a contribution of data received on the channel from the computed syndromes, the removing resulting in channel adjusted syndromes. The channel adjusted syndromes are decoded resulting in channel adjusted memory device locations of failing memory devices, the channel adjusted memory device locations corresponding to memory device locations.

Abstract: In an information processing apparatus, a first selecting unit selects, as a source stripe, a stripe in which at least one of blocks stores a data item and another one of the blocks stores an error-correcting code for the data item, among a plurality of stripes each including a group of storage areas of a plurality of blocks that are located one on each of a plurality of storage devices. A second selecting unit selects, as a destination stripe, a stripe in which at least one of blocks stores a data item and in which the number of available blocks is equal to or greater than the number of blocks of the source stripe which store data items, among the stripes other than the source stripe. A moving unit moves the data item stored in the source stripe to the available block of the destination stripe.

Abstract: A RAID-group converting apparatus converts two RAID groups into one RAID group. The RAID-group converting apparatus includes: a data-reading unit that reads at least non-parity data from data including the non-parity data and parity data, for each stripe from a plurality of recording media belonging to the two RAID groups; a parity-generating unit that generates two parities using the data belonging to a same stripe read by the data-reading unit; and a parity-writing unit that writes the two parities generated by the parity-generating unit into a parity storage area belonging to the same stripe.

Abstract: A method begins with a processing module storing a set of encoded data slices in memory of a dispersed storage network (DSN), where a data segment is encoded using an error coding dispersal storage function to produce the set of encoded data slices. The method continues with the processing module adding the data segment to a rebuilding list, where encoded data slices of data segments identified in the rebuilding list are checked via a rebuilding process to detect errors and, when one of the encoded data slices has an error, the rebuilding process rebuilds the one of the encoded data slices. The method continues with the processing module, in response to a condition, removing the data segment from the rebuilding list.

Abstract: A method of securely transferring data. The source data stored in a source memory (NV_MEM) is compared with the transferred data (COPY_ELT_X_V_MEM) that has been copied from the source memory (NV_MEM) into a “destination” memory (V_MEM). The method consists in reading from the source memory (NV_MEM) an integrity value (PI_ELT_X) associated with an element (ELEMENT_X_NV_MEM) such as file containing the source data, in calculating the integrity of a reconstituted element made up of the transferred data (COPY_ELT_X_V_MEM) associated, where appropriate, with the data of the source element (ELEMENT_X_NV_MEM) other than the data that was transferred, and in deciding that the transferred data (COPY_ELT_X_V_MEM) is identical to the source data when the integrity calculation gives a value identical to the integrity value of the source element (PI_ELT_X). The method applies to transferring data between components of a smart card.

Abstract: A method for controlling a nonvolatile memory device includes reading a sub stripe including a plurality of sub pages stored in a first region, writing data stored in valid sub pages of the sub stripe to a second region different from the first region, and generating parity data using the data written to the second region and constituting a new sub stripe.