Abstract: A block synchronization detection apparatus and method. Block synchronization for discriminating one error correction code (ECC) block from another is detected, even when a first sector of the ECC block is not detected in a system having a decoder that decodes an ECC in units of ECC blocks. The block synchronization detection apparatus includes an operator performing an operation on a predetermined last sector number, an n-th sector number, and an (n?1)-th sector number contained in a block, based on a predetermined operation relation; and a comparator comparing a result of the operation output from the operator with a predetermined threshold value and outputting the result of the comparison as a block synchronization signal.

Abstract: An error counter including receive logic to compare transmitted bits with received bits and output a vector with a logic 1 for every bit that does not match and a logic 0 for every bit that matches. A plurality of stages are sequentially arranged. Each stage includes a plurality of carry save adders inputting three inputs and outputting a sum bit and a carry bit, the carry save adders of a first stage each receiving corresponding three bits of the vector as input, the carry save adders of stages subsequent to the first stage each receiving corresponding three bits representing sum bits and carry bits from the previous stage and each carry save adder outputting a carry bit and a sum bit to a next stage for use as inputs to the carry save adders of the next stage. A synchronizer converts an output of the stages into an N-bit sum.

Abstract: A method for recording address information on an optical recording medium, an optical recording medium including address information recorded thereon by the same method, and a method for detecting the address information recorded on the optical recording medium. Physical address information of the recordable optical recording medium is encoded for insertion as a synchronous code in a head of each sector in an error correction code block unit including a predetermined number of sectors. After the encoded physical address information is modulated into a wobble signal, a wobble-shaped groove is formed on the optical recording medium, using the wobble signal. This configuration allows sector-by-sector addressing operation without reducing the data recording capacity of the optical recording medium for recording real data.

Abstract: A method and device for synchronizing the time between at least two integrated circuits (201, 202), which receive the same pulse signal. In the integrated circuits (201, 202) a counter (204, 206) is used to count the number of pulses in the received pulse signal to synchronize the common time between said integrated circuits.

Abstract: A method and/or system and/or apparatus for mapping a protocol including data and a limited number of control codes to an efficient encoding protocol for carrying on various other networks, particularly those with parallel processing. In specific embodiments, the invention decodes 8b/10b type data to 8b data, and then maps the data into transparent GFP frames or blocks and can further map the frames into superblocks of frames and in further embodiments add padding characters on the fly to constructed blocks to reduce buffering needed and to reduce variable delay created during frame construction.

Abstract: A code sequence start position detection method and apparatus, and a decoding method and apparatus, which can quickly detect the start position of a code sequence by a simple processing arrangement, and can decode the code sequence on the basis of the detected start position, are provided. In order to detect a start position of a cyclic code sequence with a code length n, the cyclic code sequence with the code length n is input in turn, and a multiplier g, register r, and adder+generate a syndrome for a coded word from the first start position ci?1 (i=1, 2, . . . ) to the first end position ci?1+n in the register r. A multiplier w and adder+correct the generated syndrome using data based on a coded word which is stored in an n-bit buffer and starts from the second start position ci+n, and a NOR detects the start position of the cyclic code sequence with the code length n on the basis of the modified syndrome.

Abstract: A N-level cell memory controlled by the memory controller of the invention have an internal configuration in which the plurality of data input/output terminals connected to the second data bus are separated into first through Mth data input/output terminal groups, such that there is no redundancy in the n bits of data associated with one N-level cell. Together with this, the memory controller separates the plurality of data bits on the first data bus into first through Mth data groups, the ECC circuits generate error-correction codes for each of these data groups, and the first through Mth data groups and first through Mth error correction codes are input to the first through Mth data input/output terminals of the N-level cell memory, via the second data bus.

Abstract: A data structure, method and protocol wherein synchronization data indicative of a data frame delineation point is inserted within an inter-packet gap (IPG) proximate a data frame during transmission. Optionally, a cyclical redundancy check (CRC) length indicative data, pointer data, and other data is inserted within the IPG to further insure appropriate delineation of data frames within a data stream.

Abstract: A data recovery device for precisely recovering a transmission signal even if the signal having phase variations is provided. The device comprises a demodulator for demodulating a transmission signal, a plurality of symbol recovery units, each generating a corresponding synchronous signal and a lock signal, wherein the lock signals are selectively enabled to select one of the synchronous signals, based on pattern variations of the transmission signal detected by the symbol recovery units, and a data decision unit for performing a data recovery operation using the selected synchronous signal to recover original data of the transmission signal.

Abstract: A wireless relay system (1) comprises a wireless camera (11) and a reception relay station (12). The reception relay station (12) comprises a plurality of external reception units (13) arranged at spatially different positions and an internal reception unit (14). Each reception section (16) in the internal reception unit (14) demodulates a signal received in the external reception unit (13) and outputs a transport stream. At this time, each reception section (16) sets an error indicator flag to 1 for a TS packet causing a transmission error which exceeds the error correction capability. A TS synthesizer section (17) in the internal reception unit (14) completely synchronizes a plurality of input transport streams by referencing synchronization bytes, PID, and CC values, and selects to output a TS packet having the error indicator flag not set to 1.

Abstract: A system for providing a high-speed implementation for multi-stream forward error correction (FEC) is provided. According to one exemplary aspect, the system is able to provide block-based multi-stream FEC that reduces the power consumption when compared with conventional symbol-based FEC. The system provides a pipeline architecture for multi-stream FEC so that modules in the system are able to respectively process blocks of data from different channels or data streams.

Abstract: A Comma-Free Reed-Solomon decoding circuit based on systolic array architecture that applies to a cell search in a wideband code division multiple access system, and more particularly a decoding circuit that employs a systolic array in its circuit structure. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a correlating comparison, and outputs the results of the correlating comparison to the boundary processing element, so as to acquire the decoding results required by the Comma-Free Reed-Solomon code. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.

Abstract: A detecting circuit detects a boundary in a bit stream which is coded in compliance with a predetermined rule. The boundary is a point at which discontinuity of reproduction time occurs. An inverting circuit inverts a specific bit in a header of a succeeding bit stream immediately subsequent to the boundary, in response to the detection of the boundary by the detecting circuit. The boundary can thus be detected easily by simply monitoring the specific bit, for example, in outputting the decoded bit streams. This consequently facilitates synchronous management and the like of the bit streams. The specific bit is included in the bit stream. Thus, detecting the specific bit allows simple and accurate detection of the boundary at which discontinuity of the reproduction time occurs.

Abstract: A novel fault-tolerance technique for protecting against and correcting errors in packet data stream flow, preferably through not exclusively with closed ring sequential address generators and the like, through the use of pairs of independent but linked packet data flow paths enabling discarding of error data occurring in one path and substituting therefor corresponding correct data from the other path to enable continuation of the data stream flow without interruption and without error.

Abstract: Data synchronization detection is provided between data identification and code demodulation in a data reproduction system, which performs data synchronization detection using code-modulated data. A specified bit pattern generated in a data codeword is calculated in each phase (bit), using a specified bit sequence pattern that is not generated in a specified phase of the data codeword. For example, a specified bit sequence pattern is generated only in a specified phase of the codeword). The positions of the data codeword partitions are thereby identified. Scrambling is then applied to the write data as required in order to ensure accurate synchronization detection.

Abstract: A system and method for processing an overrun in the encoding of an input bitstream are described. In one embodiment, an overrun in the encoding of an input bitstream is determined and the severity of the overrun is determined. Finally, a current frame is encoded using a catch-up mode to process the overrun.

Abstract: Method for testing packet-based semiconductor devices by using simplified test data packets. Simplified test data packets are generated by conventional memory testers in one format. The simplified test data packets are realigned to another, different format by test mode circuitry located on an integrated circuit chip, test interface, or tester prior to testing the memory device. The test method potentially reduces the number of pieces of data which must be generated using an algorithmic pattern generator on a per-pin basis. Furthermore, the test method potentially reduces the number of packet words that has a combination of data generated from an APG and vector memory. Packet-based semiconductor devices are also disclosed.

Abstract: A interface, which connects memory and an integrated circuit, having a write path and read path that allow synchronous data propagation is provided. Further, a method for synchronizing data propagation through a read path and a write path of an interface is provided. The interface uses clock signals and paths based on a clock signal to synchronize the flow of data through various paths within the interface.

Abstract: A weighted decoding method and circuits for Comma-Free Reed-Solomon codes that apply to a cell search in a wideband code division multiple access system. The invention also provides a weighted decoding method wherein the decoding result of the secondary synchronization code is used as a weight for received Comma-Free Reed-Solomon symbol data, and the weighted symbol data is input to the processing element array of the decoding circuit, so as to perform a weighted correlating comparison and thus enhance the accuracy of the decoding result. The weighted decoding method put forward by the invention may apply to a decoding architecture that is based on a systolic array and the decoding architecture that is based on a folding systolic array.

Abstract: Digital signals are transmitted on a bus at given instants selectively in a non-encoded format and an encoded format so as to minimize the switching activity on the bus. Given the same value of switching activity, the decision whether to transmit the signals in non-encoded format or in encoded format is taken according to the choice of maintaining constant, without transitions, the value of the additional signal, which signals that encoding of the signals transmitted each time has taken place or has been omitted.

Abstract: A synchronization signal used to synchronize base stations in a mobile radio telecommunication system having a first sequence followed by a second sequence, the first and second sequences being polyphase complementary sequences configured such that when the synchronization signal is correlated with a replica of the first sequence and a replica of the second sequence, and the correlation results are added exemplary synchronization results are obtained.

Abstract: A kind of folding systolic array architecture for a CFRS decoding circuit that applies to a cell search in a wideband code division multiple access system. The invention involves using a systolic array for its decoding circuit and using a kind of folding technology to reduce the area of the systolic array. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a set of correlating comparisons, and outputs the results of the correlating comparisons to the boundary processing elements, so as to acquire the decoding results required by the CFRS decoding. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.

Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.

Abstract: A system and a method are provided for non-causal channel equalization using error statistics. The method comprises: receiving a non-return to zero (NRZ) data stream input encoded with forward error correction (FEC); establishing a plurality of thresholds to generate a first bit estimate; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; in response to the comparisons, determining the value of the first bit; FEC decoding the determined first bit value; and, using FEC error statistics to adjust the thresholds by evaluating the number of errors associated with a plurality of three-bit sequence combinations.

Abstract: A method for maintaining synchronization between a transmitter and a receiver is disclosed. The method offsets time drift which causes a degradation in the quality of communication between a transmitter and a receiver. The method comprises using a first sampling time to obtain a first sequence of hard decision symbols for decoding contents of a portion of a received packet, switching to a second sampling time upon degradation in a reliability of the symbols, and using the second sampling time to obtain a second sequence of hard decision symbols for decoding contents of a remaining portion of the received packet.

Abstract: A system and method for handling facsimile transmissions in a digital communications network, such as a GSM network. In general, the process includes first synchronizing incoming binary-coded facsimile information and then recording the degree of bit-rotation exhibited by the facsimile information. Segregated portions of the incoming facsimile information are identified as either a synchronization sequence, facsimile status information, or neither type. If a portion of the incoming transmission is identified as facsimile status information, any bit-rotated condition present in the portion is compensated for prior to further processing. In addition, once the incoming information has been synchronized, every time thereafter that a synchronization sequence or facsimile status information is identified in a portion of the incoming information, this event is used as an indication that the facsimile transmission is still in synchronization.

Abstract: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part for coding an input multiplexed code string to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in a code string, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string to assemble an output code string.

Abstract: An approach for providing message synchronization in a communication system is disclosed. Using a selected channel coding method (e.g., Golay coding), an encoder encodes a message for transmission over a communication channel. An interleaver applies a predetermined interleaving pattern to the encoded message. A mask pattern with a prescribed sequence of bits is applied to the interleaved message; the prescribed sequence is ordered to eliminate an all zeros bit pattern and an all ones bit pattern. A multiplexer multiplexes the masked message with data traffic over the communication channel. The masked message is segmented into multiple blocks of a fixed length. At the receiver side, the mask pattern is applied to the demultiplexed message. The message is de-interleaved and decoded to restore the original message.

Abstract: This specification provides a burst synchronization and error detection device, which can generate in the synchronization module of the burst synchronization and error detection device a syndrome shared with the error detection module so as to decrease the computation time of the syndrome, shortening the processing time of error detection. The present invention also provides a burst synchronization and error detection method.

Abstract: A decoding technique is disclosed for proving inexpensively a read channel circuit which has an error correction function and is applicable to high channel frequencies. In this read channel circuit, generating a reference slice level signal and a plurality of slice level signals which are different from the reference slice level signal, converting the playback signal into a plurality of binary signals synchronized with a channel clock according to each of the slice level signals, selecting two binary signals, measuring the phase distance between the two binary signals, judging the polarity of an inverted edge of a reference binary signal, and generating an error correction signal on the basis of the phase distance and the polarity of the inverted edge of the reference binary signal, whereby any error in the playback signal can be eliminated.

Abstract: An encoder adds an identifier, being different when the coding should be done or not, into a predetermined location in, an original signal, while a decoder reads out the identifier added and detects the condition of coding, so as to decide the execution (ON) of the decoding process to be done or not, automatically. Further, in each of the encoder and the decoder, there is provided a delay output portion, which provides an output treated with only a specific delay but not executing the coding/decoding thereon, separately from a coding process portion or a decoding process portion, wherein a selection can be made, at which one of the signals from the respective process portions and the delay output portion should be outputted, by a setup in an outside operation system with use of a selector.

Abstract: A TDM data distribution system (10) includes a hub unit (12) with a multipoint transmitter (24) and any number of subscriber units (14), each of which has a multipoint receiver (28). A forward communication link (16) transmitted by the hub unit (12) exhibits a substantially constant baud and carrier frequency over a number of diverse modulation format (MF) time slots (42). However, the different MF slots (42) convey data using different modulation formats. Modulation order and coding rate may vary for different modulation formats. The multipoint transmitter (24) includes a number of encoding FEC processors (48), wherein each encoding FEC processor (48) is active only for selected ones of the different MF slots (42). When inactive, the internal states of the encoding FEC processors (48) are frozen. Each multipoint receiver (28) includes a decoding FEC processor (108) which is active only for MF slots (42) assigned to the same modulation format for which the decoding FEC processors (108) are programmed.

Abstract: A replication method is provided for synchronizing master and satellite data tables, including several acts. An identifier column is generated for each table of a tree of master tables. The tree of master tables is copied to a tree of satellite tables, so that the tree of satellite tables is a replica of the tree of master tables. An insert trigger is associated with each of the master tables. Inserts are allowed to be made to at least one of the master tables, and synchronizing the tree of satellite tables to the tree of master tables. Key and checksum columns of each of the master tables are compared with key and checksum columns of each of the satellite tables. Row sets of rows are produced, wherein each row set includes those rows present in the master table but not in the satellite table.

Abstract: The present invention enhances synchronization when frames are transmitted over an intermediate network by incorporating a synchronization code along with a data frame in a transport frame used to transport the data frame over an intermediate network. The synchronization code is generated and used to check framing and correct framing errors when the data frames are extracted from the transport frames.

Abstract: An apparatus and method for error correction encoding a datastream of information into blocks of error correction encoded information. An input terminal receives the datastream. An error correction encoding unit performs an error correction encoding on portions of the datastream. A block of error correction encoded information includes n sync blocks, each sync block including a sync word and a portion of the error correction encoded information, where n exceeds 3. An output terminal supplies the blocks of error correction encoded information. The error correction encoding unit supplies one of m mutually different sync words to each n sync block, such that the sequence of two sync words of corresponding two sync blocks of the n sync blocks is unique with respect to the bit patterns within the two sync words, m satisfying 2<m<n.

Abstract: A method of detecting synchronization errors during the transfer of data in which a transmitting agent sends to the receiving agent either: (a) data parity encoded with a data parity function when the transmitting agent encodes data in one or more clock signals, or (b) header parity encoded with a header parity function when the transmitting agent encodes header information in the one or more clock signals. A synchronization error condition is detected when the receiving agent either: (a) is configured to receive the data parity and actually receives the header parity, or (b) is configured to receive the header parity and actually receives the data parity.

Abstract: Disclosed is a peripheral device for reliably detecting synchronization patterns in CD-ROM media. The peripheral device has an internal circuitry for controlling and processing data that is read from a medium of the peripheral device is disclosed. The peripheral device comprises a digital signal processor, a decoder circuit, and a state machine. The digital signal processor is configured to receive the data that is being read from the medium of the peripheral device. The decoder circuit is coupled to the digital signal processor and forms a part of the internal circuitry. Further, the decoder circuit includes an internal RAM that is configured to store a sector of the data including a current sync pattern and a next sync pattern. The state machine resides in the decoder for analyzing the current sync pattern and the next sync pattern of the sector of the data. In the analysis mode, the state code is configured to determine whether a fatal error is present in the data.

Abstract: A system and method for enabling an optical network unit (ONU) in a passive optical network to scramble data and send the scrambled data upstream to an optical line termination unit (OLT). In passive optical networks the clocks in the OLT and ONU are synchronized by recovering the clock from the data signal. However, the clocks may drift when no data transitions occur on a long string of data. In addition, the OLT may require data transitions to ensure proper adjusting of its receive threshold. In either circumstance, collectively called Loss of Synchronization, the data may not be received correctly by the receiver and the transmitter will need to resend the data. In the present invention, the transmitter will vary the seed used in the scrambling operation. The use of a different seed per each transmission significantly reduces the chances that a loss of synchronization will occur.

Abstract: A method and apparatus are provided that provide bandwidth efficient variable bit rate communication of digital signals in a noisy channel. According to one aspect of the present invention, the invention includes receiving a puncturing request, puncturing a data packet in accordance with the puncturing request, creating a puncturing code indicating the puncturing that has been applied to the data packet and transmitting the punctured data packet and the puncturing code.

Abstract: A way to synchronize threads in a multi-threaded program. In the preferred embodiment, a debugger provides a break-point that does not interrupt the user when the first thread reaches it; instead, the debugger halts this thread at the break-point and waits for other threads to accumulate at the break-point before the debugger notifies the user. The user can specify a condition under which this notification should occur; for example, when a specific thread or a certain number of threads have accumulated at the break-point. Once the condition is satisfied, the debugger suspends other threads that have not reached the break-point. The debugger then provides for synchronized stepping or running of the threads that are halted at the break-point.

Abstract: Method for testing packet-based semiconductor devices by using simplified test data packets. Simplified test data packets are generated by conventional memory testers in one format. The simplified test data packets are realigned to another, different format by test mode circuitry located on an integrated circuit chip, test interface, or tester prior to testing the memory device. The test method potentially reduces the number of pieces of data which must be generated using an algorithmic pattern generator on a per-pin basis. Furthermore, the test method potentially reduces the number of packet words that has a combination of data generated from an APG and vector memory. Packet-based semiconductor devices are also disclosed.

Abstract: A method of detecting synchronization errors during the transfer of data in which a transmitting agent sends to the receiving agent either: (a) data parity encoded with a data parity function when the transmitting agent encodes data in one or more clock signals, or (b) header parity encoded with a header parity function when the transmitting agent encodes header information in the one or more clock signals. A synchronization error condition is detected when the receiving agent either: (a) is configured to receive the data parity and actually receives the header parity, or (b) is configured to receive the header parity and actually receives the data parity.

Abstract: A first embodiment of the present invention includes a decoder 320 and a detection circuit 330. The decoder 320 receives data at a packet rate. Each packet includes more than one word so that the packet rate is less than a word rate. The detector circuit 330 monitors a data valid signal from the decoder 320 and asserts an output signal (send idle) upon determination that the data valid signal changes values at a rate higher than the packet rate.

Abstract: A method of detecting synchronization errors during the transfer of data in which a transmitting agent sends to the receiving agent either: (a) data parity encoded with a data parity function when the transmitting agent encodes data in one or more clock signals, or (b) header parity encoded with a header parity function when the transmitting agent encodes header information in the one or more clock signals. A synchronization error condition is detected when the receiving agent either: (a) is configured to receive the data parity and actually receives the header parity, or (b) is configured to receive the header parity and actually receives the data parity.

Abstract: The present invention is a method of determining codeword boundary without marker bits by receiving transmission bits; determining a dual code of a code used to generate the transmission bits; selecting a vector from the dual code; initializing n scoring variables; initializing i=1; initializing z=1; selecting n bits from the transmission bits starting at bit position i; performing a bit-wise AND operation on the vector and the n selected bits; if the result of the bit-wise AND operation contains an even number of ones then assigning a value of zero to the result, otherwise assigning a value of one to the result; setting Sz equal to Sz plus the result of the last step; if z is less than n, incrementing z and i each by 1 and returning to the seventh step, otherwise proceeding to the next step; if z=n, i<L, and it is desired to process additional transmission bits then incrementing i by 1, and returning to the sixth step, otherwise proceeding to the next step; identifying the scoring var

Abstract: A method of processing a DVD bitstream includes the steps of reading the DVD bitstream, the bitstream including a sync frame. A sync window is created, the sync window being open at least during the expected timing of a sync detection signal within the sync frame. The sync pattern is detected within the sync frame and the sync detection signal is generated only when the sync pattern has been detected and the sync window is open. A DVD sync pattern detection circuit includes a sync window generator to generate a sync window signal, a sync pattern detector, the sync pattern detector generating a sync detection signal only when both a sync pattern is detected in a DVD input stream and the sync window signal is asserted. A read channel bit counter generates a read counter signal to control the sync window generator, the read channel bit counter being reset when the sync pattern detector detects the sync pattern.

Abstract: An output coding apparatus includes a coder for coding an inputted bitstream to an error correction and/or detection code composed of information bits and check bits; and a bitstream assembling section for assembling an outputted bitstream by inserting a synchronization code at any one of a plurality of synchronization code insertion positions previously determined in the outputted bitstream, arranging the information bits at any desired positions of the bitstream, and by arranging the check bits at positions other than the synchronization code insertion positions in the bitstream. Therefore, when the coding apparatus is combined with a resynchronization method using both an error correction and/or detection code and a synchronization code, it is possible to solve a problem caused by pseudo-synchronization or synchronization-loss pull-out or step-out due to erroneous detection of the synchronization code.

Abstract: The invention relates to a digital radio system and to a method for correcting a synchronization error in a digital radio system comprising at least one base station (100) communicating with terminals (102, 104) in its coverage area, and a mobile telephone exchange (108) communicating with the base station and controlling the operation of the base stations. The information to be transmitted is coded and decoded in a transcoder unit (200) into a form suitable for the transmission. The base station sends information frames to the transcoder at a certain pace, and, correspondingly, the transcoder sends information frames to the base station at a certain pace. To ensure easy transmission of information and to increase flexibility, the base station (100) indicates in an information frame sent to the transcoder (200) the synchronization error present in the information frames coming from the transcoder, and the transcoder corrects its synchronization after receiving said message.

Abstract: A system and method for handling facsimile transmissions in a digital communications network, such as a GSM network. In general, the process includes first synchronizing incoming binary-coded facsimile information and then recording the degree of bit-rotation exhibited by the facsimile information. Segregated portions of the incoming facsimile information are identified as either a synchronization sequence, facsimile status information, or neither type. If a portion of the incoming transmission is identified as facsimile status information, any bit-rotated condition present in the portion is compensated for prior to further processing. In addition, once the incoming information has been synchronized, every time thereafter that a synchronization sequence or facsimile status information is identified in a portion of the incoming information, this event is used as an indication that the facsimile transmission is still in synchronization.

Abstract: A system and method for demultiplexing and distributing transport packets, such as MPEG-2 transport packets, by generating and associating a locally-generated header with each of the transport packets to create a self-contained modified packet which incorporates essential distribution information therein. The method for enhancing transport packet demultiplexing and distribution in a digital transport demultiplexing system that inputs a stream of digital multimedia transport packets is provided. Each of the transport packets includes a packet identifier (PID) to identify the digital program or elementary stream to which it corresponds. Local packet information is generated for each of the transport packets, which is used in identifying and distributing the transport packets. A local header is created that includes the generated local packet information, and the local header is linked to its corresponding transport packet to create a modified transport packet.