Translation Of Code Patents (Class 717/136)
  • Patent number: 8910130
    Abstract: Certain example embodiments transform a third-generation language (3GL) and/or an Assembler program so that it can be executed within a fourth-generation language (4GL) runtime environment. Certain example embodiments include a method for transforming a 3GL and/or an Assembler program that is callable by a 4GL program so that the 3GL and/or Assembler program is executable upon call by the 4GL program and from within a 4GL runtime environment. For instance a 4GL identifier may be included in the executable of the 3GL and/or the Assembler program to facilitate execution of the 3GL and/or the Assembler program upon call of the fourth-generation language (4GL) program and within the 4GL runtime environment.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: December 9, 2014
    Assignee: Software AG
    Inventors: Michael Münster, Uwe Henker
  • Patent number: 8910143
    Abstract: A conversion system for use with a first monitoring system includes an interface module for receiving a plurality of hardware configuration settings associated with the first monitoring system and a conversion module coupled to the interface module for converting the plurality of hardware configuration settings into a plurality of software configuration settings for use in a second monitoring system. The plurality of hardware configuration settings are established to enable the first monitoring system to monitor the operation of a first machine, and the plurality of software configuration settings are established to enable the second monitoring system to monitor the operation of at least one of the first machine and a second machine.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: December 9, 2014
    Assignee: General Electric Company
    Inventors: Mitchell Dean Cohen, Ronald Wilson, Han Tran, Charles Ogles, Landon Boyer
  • Patent number: 8904364
    Abstract: An apparatus and a method for executing a workflow in a business process management (BPM) engine is described. A business process management (BPM) process definition is generated based on a business process at a BPM generator of a BPM system. The BPM process definition is translated into a Java source code at a translator engine of the BPM system. The Java source code is compiled into a Java byte code at a compiler engine of the BPM engine. The processing device of the BPM system is configured to execute the Java byte code.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: December 2, 2014
    Assignee: Red Hat, Inc.
    Inventors: Jiri Pechanec, Martin Vecera
  • Patent number: 8904363
    Abstract: A software application written for a server environment is transformed into one which runs in a rich client environment. An entity model defines data sources as they are accessed from the server and as they are accessed from the clients. An application programming interface defines stereotyped interfaces which provide the same functionality on the server and the clients. A metadata model describes the components which make up the application and defines the differences in structure between the server and clients. The metadata model also defines mappings between components used on the server and clients. Settings and context information which tailor the activation and functionality of the components is also captured in the metadata model. Automated transformation is performed by using the mappings to identify the component set to use for the clients, selecting the client version of the application programming interfaces, and selecting the appropriate settings and context information.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: December 2, 2014
    Assignee: Microsoft Corporation
    Inventors: Howard M. Crow, Ricard Roma-Dalfo, Mohammed Nazeeruddin, Targo Tennisberg, Arshish C. Kapadia, Wei-Lun Lo, Jiajun Hua
  • Patent number: 8898651
    Abstract: A method and system for the automatic generation of user guides. Specifically, the method of the present invention includes accessing an abstract processor model of a processor, wherein said abstract processor model is represented using a hierarchical architecture description language (ADL). The abstract processor model includes a plurality of instructions arranged in a hierarchical structure. An internal representation of the abstract processor model is generated by flattening the abstract processor model. The flattening process generates a plurality of rules grouped by common convergent instructions. Each rule describes an instruction path through the hierarchical structure that converges at a corresponding convergent instruction. An instruction-set documentation is automatically generated from the plurality of rules, wherein the instruction-set documentation is arranged convergent instruction by convergent instruction.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 25, 2014
    Assignee: Synopsys, Inc.
    Inventors: Gunnar Braun, Andreas Hoffmann, Volker Greive
  • Patent number: 8898794
    Abstract: One embodiment of a computer-implemented data structure synchronization mechanism comprises an interface for accessing a data structure and storing ownership data in a shared memory location. The method further comprises denying write operations if the thread attempting the write operation is not designated as the owner thread by said ownership data. The method further comprises denying requests to modify the ownership data if the thread making the request is not designated as the owner thread by said ownership data. The method further comprises effecting a write fence in the context of the thread making the request to modify ownership data prior to modifying the ownership data. Other embodiments are described.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: November 25, 2014
    Inventor: Andrei Teodor Borac
  • Patent number: 8892545
    Abstract: In an embodiment, the compiler infrastructure allows execution of multidimensional analytical metadata from various databases by providing a generic transformation. A compilation request to execute a multidimensional analytical metadata is received. A type of the compilation request is determined to identify an associated transformation and corresponding transformation rules. Based upon the type of compilation request, a database of an application server is queried to retrieve the corresponding multidimensional analytical metadata. Based upon the identified transformation rules, the multidimensional analytical metadata is transformed into a generic metadata that is executable by any desired engine. An instance of a calculation scenario is generated based upon the transformation. The compiler infrastructure is generated by deploying the instance of the calculation scenario in the desired engine (e.g. in-memory computing engine.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: November 18, 2014
    Assignee: SAP SE
    Inventors: Gerrit Simon Kazmaier, Sebastian Schroetel, Ulrich Bestfleisch, Nadine Sachs
  • Patent number: 8881293
    Abstract: Methods, systems, and computer-readable storage media for analyzing source code of an application. In some implementations, actions include determining a control flow graph of the application using the source code of the application; determining a plurality of source-sink pairs of exploitable data sources and exploitable data sinks; and determining, for each source-sink pair, whether the source-sink pair is potentially exploitable by: determining one or more conditions under which the invoking procedure passes the exploitable data source to the exploitable data sink of the invoked procedure; and determining, using the control flow graph, whether the conditions are met in at least one possible context of the application, and if so, determining that the source-sink pair is potentially exploitable.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: November 4, 2014
    Assignee: SAP SE
    Inventors: Achim D. Brucker, Thomas Deuster
  • Patent number: 8880951
    Abstract: In one embodiment, a user interface includes at least one instance of each of at least one widget. Recording a plurality of widget interaction instances (WIIs) for the user interface, each WII resulting from a user interaction applied to a particular instance of a particular widget. Clustering the plurality of WIIs based on a text value and a path value of each WII, such that each cluster of WIIs is associated with a particular widget. Determining, for each of at least one cluster of WIIs, whether the particular widget associated with the cluster of WIIs is erroneous based on whether user interactions corresponding to the WIIs in the cluster have produced responses from a software application that includes the user interface.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: November 4, 2014
    Assignee: Fujitsu Limited
    Inventor: Mukul R. Prasad
  • Patent number: 8875111
    Abstract: A system and method for facilitating analysis and modification of a computer program. A directed graph is generated from an intermediate language representation of a computer program function, with a node representing each instruction. Meta-edges or meta-nodes are inserted into the directed graph to facilitate location of instruction nodes. One type of meta-edge is a back edge that identifies branch instruction nodes. Some meta-nodes may identify instructions of a specific type. Some meta-nodes may identify exception blocks and corresponding handlers. Analysis of a program function may include insertion of new instructions prior to execution of the function.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: October 28, 2014
    Assignee: Microsoft Corporation
    Inventors: Leon Dubinsky, John Lyon-Smith
  • Patent number: 8869124
    Abstract: A computer-implemented method and program product for estimating cost and/or time requirements for migrating an application from one platform to another. The method includes receiving identifications for tasks, receiving at least one assessment type selected for estimating cost and/or time requirement for migration, where the assessment type delineates a degree of accuracy for estimating the cost and/or time requirement for migration, correlating base costs and/or time requirements to the tasks identified, receiving identifications of attributes that affect base costs and/or time requirements, correlating cost and/or time factors to the tasks, a respective cost factor and/or time factor indicating an amount by which an attribute affects the respective base cost and/or time requirement for a task, and estimating cost and/or time requirements for each task, by applying the respective cost and/or time factors for each task to the respective base cost and/or base time requirements for each task.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Kevin David Galloway, Jonathan Michael Power
  • Patent number: 8869098
    Abstract: A Model Transformation Authoring Framework (MTAF) method and apparatus for authoring and providing model-to-model transformations from one domain to another domain is disclosed. Given a domain and a target domain, at least the given domain having a respective structured hierarchy, the invention system enables a user to specify a declarative mapping (transformation declarative) between a domain specific language modeling the given domain and a modeling language modeling the target domain. The declarative mapping models how the domain specific language modeling the given domain relates to the modeling language of the target domain. The system generates a transformation code implementation of a transformation from the given domain to the target domain. The MTAF provides to the user design decisions with respect to Specification, Transformation Rules, Rule Organization, Rule Application Control, Source-Target Relationship, Incrementality, and Directionality and Tracing.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Maged E. Elaasar, Jeffrey M. Fischer
  • Patent number: 8863077
    Abstract: Embodiments may provide a makefile interposer, which enables a makefile to be used for building software for different platforms without modifying the makefile. In some embodiments, the interposer intercepts the commands run by makefile and automatically interposes the correct library files, dependencies, paths, and other information used by make to build the program for a particular platform. Additionally, calls that the invoked tools themselves make are intercepted and the interposer may redirect them to the platform-specific tools or file system locations including redirecting file descriptors. In some instances, when a tool is called that is not in the platform, the interposer may also fall back on the other system tools.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: October 14, 2014
    Assignee: Apple Inc.
    Inventors: Genevieve Lee, Anders Bertelrud
  • Patent number: 8863098
    Abstract: A computer-implemented method of processing a reified generic in an interface method written in a first programming language includes a processor accessing a definition and an invocation of the interface method from a memory device; the processor generating a definition of a general dispatch method in a second programming language; the processor generating definitions of special dispatch methods in the second programming language, each of the special dispatch methods corresponding to each primitive return type of the interface method the processor generating an invocation of either the general dispatch method or one of the special dispatch methods in the second programming language based on a return type of the interface method.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: October 14, 2014
    Assignee: International Business Machines Corporation
    Inventors: Yuki Makino, Mikio Takeuchi
  • Publication number: 20140304690
    Abstract: Methods for outputting an application are disclosed. One exemplary embodiment provides a software tool for outputting an application to one or more environments. The tool may be able to receive and use output task plug-ins that specify output characteristics for outputting to different environments. The use of such plug-ins may make the tool easily extensible with respect to outputting an application to many different mobile devices, including devices that are not yet released, as well as to other local, device, and network environments. Another exemplary embodiment involves a output tool that may receive and save user specified output parameters for an output task as an output task instance. The tool makes the output task instance available for outputting an application according to the received output parameters without requiring that the parameters be specified again.
    Type: Application
    Filed: May 27, 2008
    Publication date: October 9, 2014
    Applicant: Adobe Systems Incorporated
    Inventors: Tim Wohlberg, Klaas Stoeckmann, Kai Ortmanns, Soeren Ammedick
  • Patent number: 8856750
    Abstract: A system and method for evaluating interfaces includes computing a reference script for a task from a reference interface design and translating the reference script into one or more target action scripts based on a target design. The one or more target action scripts on the target design are executed to produce target metrics. The target metrics are compared to determine whether the target action script successfully translates the reference script.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Rachel K. E. Bellamy, Bonnie E. John, Calvin B. Swart, John C. Thomas, Jr., Sharon M. Trewin
  • Patent number: 8854368
    Abstract: Method, system, and computer-readable medium for emulating a point sprite represented by a three dimensional vertex in a cross platform environment. The system includes a three dimensional vertex representing a point sprite and a vertex and fragment shaders written in the first programming language. One or more variables are assigned to a set of points representing the 3D vertex using the vertex shader and convey information from the vertex shader to the fragment shader. The point sprite emulator translates the vertex and fragment shaders from the first programming language into a second programming language. The translation includes a transfer of each variable from the vertex shader to the fragment shader such that the information included in each variable is preserved. The point sprite is rendered from the 3D vertex using the translated vertex fragment shaders and displayed on a display screen.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: October 7, 2014
    Assignee: Google Inc.
    Inventor: Kenneth Russell
  • Patent number: 8856758
    Abstract: Techniques for automatic license entitlement calculation. A method includes decomposing a license metric definition into metric-generic and metric-specific logic, compiling the metric-specific logic to generate intermediate code, interpreting the metric-generic logic and dynamically loading the intermediate code to execute a license entitlement calculation.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Hui Lei, Liangzhao Zeng
  • Patent number: 8856757
    Abstract: Techniques for automatic license entitlement calculation. A method includes decomposing a license metric definition into metric-generic and metric-specific logic, compiling the metric-specific logic to generate intermediate code, interpreting the metric-generic logic and dynamically loading the intermediate code to execute a license entitlement calculation.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Hui Lei, Liangzhao Zeng
  • Patent number: 8856731
    Abstract: Systems and methods of scalable language infrastructure for electronic system level tools. In accordance with embodiments of the present invention, knowledge about types, functions and the like is encapsulated in a plurality of intelligent components called active component extension modules that are external to the infrastructure. The infrastructure implements a communication mechanism between the clients and these intelligent components, and acts as a common backbone. The infrastructure itself does not maintain any knowledge about any client, types, functions, etc. In accordance with a method embodiment of the present invention, a request is received from a client of a language infrastructure. The request is forwarded from the language infrastructure to an active component extension module. The active component extension module performs a service responsive to the request.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: October 7, 2014
    Assignee: Synopsys, Inc.
    Inventors: Rajesh Kumar, Sanjay Kumar Jain
  • Patent number: 8850417
    Abstract: This invention relates to a method and framework for invisible code rewriting. A method, system, and computer program for allowing modification of executable program code in a computer platform comprising: providing a virtual address space on the platform, said virtual space comprising a first and second address space; identifying a program into the first address space; identifying an enhancement to the program; copying the program into the second address space; modifying the program copy in the second address space to provide the enhancement; and configuring the platform to execute the program and executing the enhanced program in second address space.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventor: Geraint North
  • Patent number: 8850410
    Abstract: A system and method for improving software maintainability, performance, and/or security by associating a unique marker to each software code-block; the system comprising of a plurality of processors, a plurality of code-blocks, and a marker associated with each code-block. The system may also include a special hardware register (code-block marker hardware register) in each processor for identifying the markers of the code-blocks executed by the processor, without changing any of the plurality of code-blocks.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ramanjaneya S. Burugula, Joefon Jann, Pratap C. Pattnaik
  • Patent number: 8850415
    Abstract: The invention concerns model program analysis of software code using model checking. Initially, a transition system (22) and an extensible markup language (XML) (24) representation of the data is generated. Next, labels (26) for the transition system are generated by querying the XML representation of the data using (markup) query language. The labels and the structure of the transition system are then used as input to model checking techniques to analyse the software code (28). It is an advantage of the invention that the problem of labelling a transition system can be transformed into the XML domain so that detailed information about the software code can be extracted using queries in a format that can be run in the XML domain which are well known. At the same time the transformation to the XML domain does not prevent the use of efficient model checking technologies.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: September 30, 2014
    Assignee: National ICT Australia Limited
    Inventors: Ralf Huuck, Ansgar Fehnker, Patrick Jayet, Felix Rauch Valenti
  • Patent number: 8850409
    Abstract: A method is provided for translating sets of constraint declarations to imperative code sequences based on defining an instantiatable object per set, inserting calls to a notification callback mechanism on state modification and defining calls in the constraint context as imperative code sequences that, in response to these callbacks, take actions to maintain these constraints.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: September 30, 2014
    Assignee: OptumSoft, Inc.
    Inventor: David R. Cheriton
  • Publication number: 20140289713
    Abstract: Methods and apparatus for the dynamic instantiation of media platform components, for example Adobe® Flash® visual components, in runtime environments. A dynamic media content instantiation framework may enable media platform components to be dynamically instantiated within runtime environments without requiring extensive code. A developer may obtain a library of media platform component definitions. Instead of coding a view's interface in the programming language of the runtime environment, the developer can simply reference the desired media platform resource in the library with as little as a single line of code. At runtime, the framework dynamically instantiates a requested media platform component from the definition of the component in the library, attaches the component instance to a stage, and provides a reference to the stage back to the runtime environment layer so that the content can be displayed.
    Type: Application
    Filed: August 28, 2009
    Publication date: September 25, 2014
    Inventor: Stacy T. Young
  • Patent number: 8843904
    Abstract: Architecture-dependent assets are automatically built and retargeted. An asset originally built for one architecture is downloaded and automatically retargeted on another architecture. This automatically retargeting may be performed on demand, at runtime.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: September 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Henrique Andrade, Judah M. Diament, Bugra Gedik, Anton V. Riabov
  • Publication number: 20140282437
    Abstract: A method and system to support scheduling of memory store instructions across atomic regions in binary translation in a processing unit or processor. In one embodiment of the invention, the processing unit has a store buffer that allows store instructions to be issued in different order than the source binary program order but still retire in source binary program order. This facilitates a small atomic region that maps to each iteration of a source binary code and these atomic regions are joined together into a pipelined region. In one embodiment of the invention, the processing unit executes commit instruction(s) once every loop iteration instead of executing the commit instruction(s) once after the loop exit.
    Type: Application
    Filed: September 27, 2012
    Publication date: September 18, 2014
    Inventors: Guokai Ma, Yihua Jin, Daniel M. Lavery, Jianhui Li
  • Patent number: 8839207
    Abstract: Disclosed is a method and system for debugging XML files or documents by inserting a breakpoint into an XML file and converting the XML file into a bytecode format, where the breakpoint is propagated into the bytecode format and stored in runtime libraries. During runtime, on encountering the breakpoint, the location of the breakpoint is internally determined in the bytecode and points to the location of the breakpoint in the XML file.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventor: Anil K. Maddipatla
  • Patent number: 8839199
    Abstract: To make it possible to perform efficient program development, a development system includes a label managing unit configured to update, when an execution program D2 is regenerated, a label information table D3, which corresponds to the execution program D2, for generating execution screen data D5 and executes or does not execute, according to update content of the label information table D3, update of ID information associated with the label information table D3 and the regenerated execution program D2 and a drawing apparatus configured to associate, when execution screen data D5 is generated based on the label information table D3, ID information of a value same as the ID information, which is associated with the label information table D3 at a point when the execution screen data D5 is generated, with the generated execution screen data D5.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: September 16, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yuji Ichioka
  • Patent number: 8832600
    Abstract: Provided are a method, system, and program for rendering a display of at least one data set name, wherein each data set is associated with one or more file components. A selection of one displayed data set name is received and names of the file components associated with the selected data set are displayed. Selection is received of at least one of the displayed file component names and the selected data set name and selected at least one selected file component name are rendered in a history panel, wherein the selected data set name and selected at least one file component are displayed in a hierarchical tree arrangement.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventor: Steven K. Ma
  • Patent number: 8832655
    Abstract: A system, method, and computer-readable medium, is described that finds similarities among programming applications based on semantic anchors found within the source code of such applications. The semantic anchors may be API calls, such as Java's package and class calls of the JDK. Latent Semantic Indexing may be used to process the application and semantic anchor data and automatically develop a similarity matrix that contains numbers representing the similarity of one program to another.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: September 9, 2014
    Assignee: Accenture Global Services Limited
    Inventor: Mark Grechanik
  • Patent number: 8826222
    Abstract: Methods, systems, and computer program products may provide pre-merge conflict avoidance in a revision-control system. A pre-merge conflict avoidance method may include identifying by a computer system a portion of interest of a revision-controlled base source code stored in a source-code repository, the base source code being developed by a plurality of developers. The computer system may determine whether at least one of the plurality of developers has made a change to a portion of a first copy of the base source code corresponding to the portion of interest prior to commitment of the first copy of the base source code to the source-code repository. In response to a determination that the at least one developer has made a change to the portion of interest, a notification may be produced about the change to the portion of interest by the at least one developer.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Nathan V Bak, Avantika R Mathur, Eric B Munson, Ramanchandra N Pai, Timothy C Pepper
  • Patent number: 8819647
    Abstract: Nested virtual machines cooperate with one another to improve system performance. In particular, an outer virtual machine performs tasks on behalf of an inner virtual machine to improve system performance. One such task includes translation of instructions for the inner virtual machine.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: August 26, 2014
    Assignee: International Business Machines Corporation
    Inventors: Marcel Mitran, Ali I. Sheikh
  • Patent number: 8819648
    Abstract: Execution of non-native operating system images within a virtualized computer system is improved by providing a mechanism for retrieving translated code physical addresses corresponding to un-translated code branch target addresses using a host code map. Hardware acceleration mechanisms, such as content-accessible look-up tables, directory hardware, or processor instructions that operate on tables in memory can be provided to accelerate the performance of the translation mechanism. The virtual address of the branch instruction target is used as a key to look up a corresponding record that contains a physical address of the translated code page containing the translated branch instruction target, and execution is directed to the physical address obtained from the record, once the physical page containing the translated code corresponding the target address is loaded in memory.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: August 26, 2014
    Assignee: International Business Machines Corporation
    Inventor: Alexander Barraclough Brown
  • Patent number: 8813044
    Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming said process definition by using a processing unit to apply said assumptions to said process definition to change the configuration of the process definition. The process definition may be transformed by using factors relating to the specific context in or for which the process definition is executed. Also, the process definition may be transformed by identifying, in a flow diagram for the service process definition, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: August 19, 2014
    Assignee: International Business Machines Corporation
    Inventors: David F. Bantz, Steven J. Mastrianni, James R. Moulic, Dennis G. Shea
  • Patent number: 8813043
    Abstract: This document describes a unified type checker and property checker for a low level program's heap and its types. The type checker can use the full power of the property checker to express and verify subtle, program specific type and memory safety invariants well beyond what the native low level program system can check. Meanwhile, the property checker can rely on the type checker to provide structure and disambiguation for the program's heap, enabling more concise and more powerful type-based specifications. This approach makes use of a fully automated Satisfiability Modulo Theories (SMT) solver and a decision procedure for checking type safety, which means that the programmer's only duty is to provide high-level type and property annotations as part of the original program's source.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 19, 2014
    Assignee: Microsoft Corporation
    Inventors: Jeremy P. Condit, Shaz Qadeer, Shuvendu K. Lahiri
  • Patent number: 8813026
    Abstract: Method and apparatus for representing data for components of a system in respective model components, generating model sub components from model components for at least some of the system components, and accumulating information from the model components and model sub components to determine a world view of the system. In one embodiment, model components can be updated during system operation.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: August 19, 2014
    Assignee: EMC Corporation
    Inventors: Raja B. Vobugari, Christopher J. Hackett
  • Patent number: 8813046
    Abstract: A system and computer-implemented method for transforming source code in an original natively encoded format to a locale neutral format, wherein data types and functions in the original format are estimated for compliance with the locale neutral format and an estimation is made as to the amount of code conversions necessary to comply with the locale neutral format. In addition, image files referenced by the source code is analyzed and embedded text extracted for enabling translation during the localization process.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: August 19, 2014
    Assignee: Infosys Limited
    Inventors: Suraj Nair, Krishna Markande, Aviraj Singh
  • Patent number: 8806453
    Abstract: Methods, apparatus, and computer-readable media for integrating two programming languages into a new programming language are disclosed. A plurality of programming statements are received, some of the plurality of programming statements having a first syntax representative of a first programming language and some of the plurality of programming statements having a second syntax representative of a second programming language. The some of the plurality of programming statements having the first syntax representative of the first programming language are translated into new programming statements in the second programming language. A source file is generated that comprises the some of the plurality of programming statements written in the second programming language and the new programming statements.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: August 12, 2014
    Assignee: Lockheed Martin Corporation
    Inventors: Michael A. Bodkin, William J. Headrick
  • Patent number: 8806451
    Abstract: Systems and methods are provided for using monads to facilitate complex computation tasks in a cloud computing environment. In particular, monads can be employed to facilitate creation and execution of data mining jobs for large data sets. Monads can allow for improved error handling for complex computation tasks. Monads can also facilitate identification of opportunities for improving the efficiency of complex computations.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: August 12, 2014
    Assignee: Microsoft Corporation
    Inventors: Zijian Zheng, Shengquan Yan, Peng Yu
  • Patent number: 8799863
    Abstract: Techniques for debugging a computer program that includes multiple modules executing on multiple machines include receiving, at a unifying component, first data from a first machine. The first data indicates debugging information generated by the first machine. Second data is also received at the unifying component from a second machine. The second data indicates debugging information generated by the second machine. Based on the first data and the second data, third data is formed indicating a single integrated representation of debugging information for the computer program. The unifying component allows debugging information from several machines to be integrated and then presented to a user through a single debugger client.
    Type: Grant
    Filed: March 31, 2012
    Date of Patent: August 5, 2014
    Assignee: Oracle International Corporation
    Inventor: David M. Alpern
  • Patent number: 8799879
    Abstract: One embodiment provides a system that protects translated guest program code in a virtual machine that supports self-modifying program code. While executing a guest program in the virtual machine, the system uses a guest shadow page table associated with the guest program and the virtual machine to map a virtual memory page for the guest program to a physical memory page on the host computing device. The system then uses a dynamic compiler to translate guest program code in the virtual memory page into translated guest program code (e.g., native program instructions for the computing device). During compilation, the dynamic compiler stores in a compiler shadow page table and the guest shadow page table information that tracks whether the guest program code in the virtual memory page has been translated. The compiler subsequently uses the information stored in the guest shadow page table to detect attempts to modify the contents of the virtual memory page.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 5, 2014
    Assignee: Oracle America, Inc.
    Inventors: Gregory M. Wright, Christopher A. Vick, Peter B. Kessler
  • Patent number: 8799881
    Abstract: According to one embodiment, a parallelizing unit divides a loop into first and second processes based on a program to be converted and division information. The first and second processes respectively have termination control information, loop control information, and change information. The parallelizing unit inserts into the first process a determination process determining whether the second process is terminated at execution of an (n?1)th iteration of the second process when the second process is subsequent to the first process or determining whether the second process is terminated at execution of an nth iteration of the second process when the second process precedes the first process. The parallelizing unit inserts into the second process a control process controlling execution of the second process based on the result of determination notified by the determination process.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuaki Tojo, Hidenori Matsuzaki
  • Patent number: 8792870
    Abstract: The invention relates to a switching system and a switching method for a mobile radio network. Data is switched and adapted to the technical specifications of a mobile station according to a profile. The adapted data is transmitted to the mobile station upon request through the mobile radio network.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: July 29, 2014
    Assignee: Vodafone Holding GmbH
    Inventor: Achim Tromm
  • Patent number: 8789022
    Abstract: Methods and apparatus for automatically generating translation programs for translating computing services templates to service blueprints are disclosed. An example method includes generating a population of translation logic elements from a plurality of verified computing services template translation programs, where each of the verified programs is configured to correctly translate at least one computing services template of a plurality of known templates to a respective service blueprint. The example method further includes identifying a new computing services template and programmatically augmenting the population of translation logic elements. The example method also includes generating one or more additional translation programs based on the augmented population of translation logic elements and validating each of the one or more additional computing services template translation programs.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: July 22, 2014
    Assignee: BMC Software, Inc.
    Inventor: Atanu Neogi
  • Patent number: 8789025
    Abstract: A mechanism is provided for path-sensitive analysis for reducing rollback overheads. The mechanism receives, in a compiler, program code to be compiled to form compiled code. The mechanism divides the code into basic blocks. The mechanism then determines a restore register set for each of the one or more basic blocks to form one or more restore register sets. The mechanism then stores the one or more register sets such that responsive to a rollback during execution of the compiled code. A rollback routine identifies a restore register set from the one or more restore register sets and restores registers identified in the identified restore register set.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: July 22, 2014
    Assignee: International Business Machines Corporation
    Inventors: John K. P. O'Brien, Kai-Ting Amy Wang, Mark Yamashita, Xiaotong Zhuang
  • Patent number: 8782618
    Abstract: A computer-readable media may store instructions for receiving text-based technical computing code from a first technical computing environment running on a remote computer, where the first technical computing environment includes a set of functions. The media may store instructions for processing data captured using an instrument, where the data is processed using the received technical computing code in a second technical computing environment that includes a subset of the functions, where the captured data processed in non-real-time, and where the processing produces a result. The media may store instructions for translating the technical computing code from a first format compatible with the second technical computing environment into a second format adapted for parallel execution by a field programmable gate array (FPGA), the translating performed by a code generator when the result is satisfactory. The media may store instructions for processing input data in real-time using the FPGA.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: July 15, 2014
    Assignee: The MathWorks, Inc.
    Inventor: Thomas Gaudette
  • Patent number: 8782619
    Abstract: A method is provided for allowing programmers to specify program execution control semantics using standard programming language syntax even when the standard language does not provide a language construct for specifying execution control. In a similar manner, the approach provides programmers the ability to extend the expressiveness of a language by introducing statements expressed in the syntax of a target programming language. A program written in a first programming language may be translated into statements of a second programming language, where the target programming language is more expressive than the first. This language-based approach preserves the standard syntax of the first programming language, allowing a program written with semantic extensions to be compiled and run according to the standard on any standards-compliant system.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: July 15, 2014
    Assignee: Oracle International Corporation
    Inventors: Zhe Wu, Vladimir Kolovski
  • Patent number: 8782616
    Abstract: A content management method is described. The method includes identifying digital sending devices. The method includes authoring an automated business process design. And the method includes translating the automated business process design into information technology templates for configuring each of the identified digital sending devices to achieve the automated business process.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: July 15, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: David W. Wright
  • Patent number: RE45278
    Abstract: A Central Processing Unit (CPU) hotpatch circuit compares the run-time instruction stream against an internal cache. The internal cache stores embedded memory addresses with associated control flags, executable instruction codes, and tag information. In the event that a comparison against the current program counter succeeds, then execution is altered as required per the control flags. If no comparison match is made, then execution of the instruction that was accessed by the program counter is executed.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: December 2, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Christian D. Kasper